From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59935) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z2APW-0003f0-6D for qemu-devel@nongnu.org; Mon, 08 Jun 2015 23:41:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z2APV-0000Xj-FW for qemu-devel@nongnu.org; Mon, 08 Jun 2015 23:41:10 -0400 Received: from [59.151.112.132] (port=14161 helo=heian.cn.fujitsu.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z2APV-0000Uq-47 for qemu-devel@nongnu.org; Mon, 08 Jun 2015 23:41:09 -0400 From: Chen Fan Date: Tue, 9 Jun 2015 11:37:31 +0800 Message-ID: <8c5428d545c9134dfff64581e54cbe1159b3a3a5.1433812962.git.chen.fan.fnst@cn.fujitsu.com> In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain Subject: [Qemu-devel] [RFC v9 03/18] pcie: modify the capability size assert List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: izumi.taku@jp.fujitsu.com, alex.williamson@redhat.com because the capabilities need to be DWORD aligned, so the size should DWORD aligned too, and then the last capability size can to be the greatest 0x1000. e.g. if I have a capability starting 4 bytes from the end, 0xFFC. The max size should be 4 bytes, 0x1000 - 0xFFC, not 3 bytes, 0xFFF - 0xFFC. Signed-off-by: Chen Fan --- hw/pci/pcie.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c index 1463e65..6cdd4a1 100644 --- a/hw/pci/pcie.c +++ b/hw/pci/pcie.c @@ -595,7 +595,7 @@ void pcie_add_capability(PCIDevice *dev, assert(offset >= PCI_CONFIG_SPACE_SIZE); assert(offset < offset + size); - assert(offset + size < PCIE_CONFIG_SPACE_SIZE); + assert(offset + size <= PCIE_CONFIG_SPACE_SIZE); assert(size >= 8); assert(pci_is_express(dev)); -- 1.9.3