* [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1)
@ 2018-01-02 1:10 Laurent Vivier
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 01/17] target-m68k: sync CC_OP before gen_jmp_tb() Laurent Vivier
` (17 more replies)
0 siblings, 18 replies; 42+ messages in thread
From: Laurent Vivier @ 2018-01-02 1:10 UTC (permalink / raw
To: qemu-devel; +Cc: Thomas Huth, Laurent Vivier
This series is the first series that will allow
to introduce supervisor mode and execute
privileged instructions.
Some of these patches are only cleanup:
sync CC_OP before gen_jmp_tb()
fix gen_get_ccr()
softmmu cleanup
add CPU_LOG_INT trace
use insn_pc to generate instruction fault address
move CCR/SR functions
fix m68k_cpu_dump_state()
We also fix a problem with linux-user mode,
where the State Register is not updated with
the CCR value (found while testing "chk/chk2"
using signal()):
correctly manage SR in context
We introduce some new non privileged instructions:
add chk and chk2
add move16
move16 is used by the kernel when it is compiled only for
68040 (it's a 68040 only instruction).
We add some trivial privileged instructions (most are empty):
add cpush/cinv
add reset
implement fsave/frestore
And finally, we add the privileged instructions to
modify the state register, the Interrupt Stack
Pointer and the 680x0 stack frame formats:
add 680x0 "move to SR" instruction
add andi/ori/eori to SR/CCR
add the Interrupt Stack Pointer
manage 680x0 stack frames
The next series will introduce the MC68040 MMU.
Laurent Vivier (17):
target-m68k: sync CC_OP before gen_jmp_tb()
target/m68k: fix gen_get_ccr()
linux-user,m68k: correctly manage SR in context
target-m68k: use insn_pc to generate instruction fault address
target/m68k: add CPU_LOG_INT trace
target/m68k: manage 680x0 stack frames
target/m68k: add chk and chk2
target/m68k: add move16
target/m68k: softmmu cleanup
target/m68k: add cpush/cinv
target/m68k: add reset
target/m68k: implement fsave/frestore
target/m68k: move CCR/SR functions
target/m68k: add 680x0 "move to SR" instruction
target/m68k: add andi/ori/eori to SR/CCR
target/m68k: add the Interrupt Stack Pointer
target/m68k: fix m68k_cpu_dump_state()
linux-user/main.c | 7 +
linux-user/signal.c | 7 +-
target/m68k/cpu.c | 15 +-
target/m68k/cpu.h | 83 ++++++-
target/m68k/gdbstub.c | 1 +
target/m68k/helper.c | 89 +++++++-
target/m68k/helper.h | 8 +-
target/m68k/monitor.c | 1 +
target/m68k/op_helper.c | 270 ++++++++++++++++++++++-
target/m68k/translate.c | 558 +++++++++++++++++++++++++++++++++++++++---------
10 files changed, 921 insertions(+), 118 deletions(-)
--
2.14.3
^ permalink raw reply [flat|nested] 42+ messages in thread
* [Qemu-devel] [PATCH v5 01/17] target-m68k: sync CC_OP before gen_jmp_tb()
2018-01-02 1:10 [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) Laurent Vivier
@ 2018-01-02 1:10 ` Laurent Vivier
2018-01-02 16:01 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 02/17] target/m68k: fix gen_get_ccr() Laurent Vivier
` (16 subsequent siblings)
17 siblings, 1 reply; 42+ messages in thread
From: Laurent Vivier @ 2018-01-02 1:10 UTC (permalink / raw
To: qemu-devel; +Cc: Thomas Huth, Laurent Vivier
And remove update_cc_op() from gen_exception() because there is
one in gen_jmp_im().
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target/m68k/translate.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index bbda7399ec..0e9d651a2a 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -270,7 +270,6 @@ static void gen_raise_exception(int nr)
static void gen_exception(DisasContext *s, uint32_t where, int nr)
{
- update_cc_op(s);
gen_jmp_im(s, where);
gen_raise_exception(nr);
}
@@ -2897,6 +2896,7 @@ DISAS_INSN(branch)
gen_jmp_tb(s, 0, s->pc);
} else {
/* Unconditional branch. */
+ update_cc_op(s);
gen_jmp_tb(s, 0, base + offset);
}
}
@@ -4875,6 +4875,7 @@ static void gen_fjmpcc(DisasContext *s, int cond, TCGLabel *l1)
DisasCompare c;
gen_fcc_cond(&c, s, cond);
+ update_cc_op(s);
tcg_gen_brcond_i32(c.tcond, c.v1, c.v2, l1);
free_cond(&c);
}
--
2.14.3
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PATCH v5 02/17] target/m68k: fix gen_get_ccr()
2018-01-02 1:10 [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) Laurent Vivier
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 01/17] target-m68k: sync CC_OP before gen_jmp_tb() Laurent Vivier
@ 2018-01-02 1:10 ` Laurent Vivier
2018-01-02 16:04 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 03/17] linux-user, m68k: correctly manage SR in context Laurent Vivier
` (15 subsequent siblings)
17 siblings, 1 reply; 42+ messages in thread
From: Laurent Vivier @ 2018-01-02 1:10 UTC (permalink / raw
To: qemu-devel; +Cc: Thomas Huth, Laurent Vivier
As gen_helper_get_ccr() is able to compute CCR from cc_op and
flags, we don't need to flush flags before to call it.
flush_flags() and get_ccr() use COMPUTE_CCR() to compute
flags. get_ccr() computes CCR value,
whereas flush_flags update live cc_op and flags.
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target/m68k/translate.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 0e9d651a2a..1e9fb01252 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -2478,7 +2478,6 @@ static TCGv gen_get_ccr(DisasContext *s)
{
TCGv dest;
- gen_flush_flags(s);
update_cc_op(s);
dest = tcg_temp_new();
gen_helper_get_ccr(dest, cpu_env);
--
2.14.3
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PATCH v5 03/17] linux-user, m68k: correctly manage SR in context
2018-01-02 1:10 [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) Laurent Vivier
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 01/17] target-m68k: sync CC_OP before gen_jmp_tb() Laurent Vivier
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 02/17] target/m68k: fix gen_get_ccr() Laurent Vivier
@ 2018-01-02 1:10 ` Laurent Vivier
2018-01-02 16:06 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 04/17] target-m68k: use insn_pc to generate instruction fault address Laurent Vivier
` (14 subsequent siblings)
17 siblings, 1 reply; 42+ messages in thread
From: Laurent Vivier @ 2018-01-02 1:10 UTC (permalink / raw
To: qemu-devel; +Cc: Thomas Huth, Laurent Vivier
Use cpu_m68k_get_ccr()/cpu_m68k_set_ccr() to setup and restore correctly
the value of SR in the context structure. Fix target_rt_setup_ucontext().
Fixes: 3219de458c ("linux-user: correctly manage SR in ucontext")
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
linux-user/signal.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/linux-user/signal.c b/linux-user/signal.c
index dae14d4a89..74fa03f96d 100644
--- a/linux-user/signal.c
+++ b/linux-user/signal.c
@@ -5612,13 +5612,14 @@ struct target_rt_sigframe
static void setup_sigcontext(struct target_sigcontext *sc, CPUM68KState *env,
abi_ulong mask)
{
+ uint32_t sr = (env->sr & 0xff00) | cpu_m68k_get_ccr(env);
__put_user(mask, &sc->sc_mask);
__put_user(env->aregs[7], &sc->sc_usp);
__put_user(env->dregs[0], &sc->sc_d0);
__put_user(env->dregs[1], &sc->sc_d1);
__put_user(env->aregs[0], &sc->sc_a0);
__put_user(env->aregs[1], &sc->sc_a1);
- __put_user(env->sr, &sc->sc_sr);
+ __put_user(sr, &sc->sc_sr);
__put_user(env->pc, &sc->sc_pc);
}
@@ -5634,7 +5635,7 @@ restore_sigcontext(CPUM68KState *env, struct target_sigcontext *sc)
__get_user(env->aregs[1], &sc->sc_a1);
__get_user(env->pc, &sc->sc_pc);
__get_user(temp, &sc->sc_sr);
- env->sr = (env->sr & 0xff00) | (temp & 0xff);
+ cpu_m68k_set_ccr(env, temp);
}
/*
@@ -5726,7 +5727,7 @@ static inline int target_rt_setup_ucontext(struct target_ucontext *uc,
CPUM68KState *env)
{
target_greg_t *gregs = uc->tuc_mcontext.gregs;
- uint32_t sr = cpu_m68k_get_ccr(env);
+ uint32_t sr = (env->sr & 0xff00) | cpu_m68k_get_ccr(env);
__put_user(TARGET_MCONTEXT_VERSION, &uc->tuc_mcontext.version);
__put_user(env->dregs[0], &gregs[0]);
--
2.14.3
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PATCH v5 04/17] target-m68k: use insn_pc to generate instruction fault address
2018-01-02 1:10 [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) Laurent Vivier
` (2 preceding siblings ...)
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 03/17] linux-user, m68k: correctly manage SR in context Laurent Vivier
@ 2018-01-02 1:10 ` Laurent Vivier
2018-01-02 16:08 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 05/17] target/m68k: add CPU_LOG_INT trace Laurent Vivier
` (13 subsequent siblings)
17 siblings, 1 reply; 42+ messages in thread
From: Laurent Vivier @ 2018-01-02 1:10 UTC (permalink / raw
To: qemu-devel; +Cc: Thomas Huth, Laurent Vivier
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target/m68k/translate.c | 40 ++++++++++++++++++++--------------------
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 1e9fb01252..a1e424e3db 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -1509,12 +1509,12 @@ DISAS_INSN(dbcc)
DISAS_INSN(undef_mac)
{
- gen_exception(s, s->pc - 2, EXCP_LINEA);
+ gen_exception(s, s->insn_pc, EXCP_LINEA);
}
DISAS_INSN(undef_fpu)
{
- gen_exception(s, s->pc - 2, EXCP_LINEF);
+ gen_exception(s, s->insn_pc, EXCP_LINEF);
}
DISAS_INSN(undef)
@@ -1523,8 +1523,8 @@ DISAS_INSN(undef)
for the 680x0 series, as well as those that are implemented
but actually illegal for CPU32 or pre-68020. */
qemu_log_mask(LOG_UNIMP, "Illegal instruction: %04x @ %08x",
- insn, s->pc - 2);
- gen_exception(s, s->pc - 2, EXCP_UNSUPPORTED);
+ insn, s->insn_pc);
+ gen_exception(s, s->insn_pc, EXCP_UNSUPPORTED);
}
DISAS_INSN(mulw)
@@ -2583,7 +2583,7 @@ DISAS_INSN(swap)
DISAS_INSN(bkpt)
{
- gen_exception(s, s->pc - 2, EXCP_DEBUG);
+ gen_exception(s, s->insn_pc, EXCP_DEBUG);
}
DISAS_INSN(pea)
@@ -2636,7 +2636,7 @@ DISAS_INSN(pulse)
DISAS_INSN(illegal)
{
- gen_exception(s, s->pc - 2, EXCP_ILLEGAL);
+ gen_exception(s, s->insn_pc, EXCP_ILLEGAL);
}
/* ??? This should be atomic. */
@@ -2666,7 +2666,7 @@ DISAS_INSN(mull)
if (ext & 0x400) {
if (!m68k_feature(s->env, M68K_FEATURE_QUAD_MULDIV)) {
- gen_exception(s, s->pc - 4, EXCP_UNSUPPORTED);
+ gen_exception(s, s->insn_pc, EXCP_UNSUPPORTED);
return;
}
@@ -4240,7 +4240,7 @@ DISAS_INSN(move_from_sr)
TCGv sr;
if (IS_USER(s) && !m68k_feature(env, M68K_FEATURE_M68000)) {
- gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
+ gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
return;
}
sr = gen_get_sr(s);
@@ -4250,7 +4250,7 @@ DISAS_INSN(move_from_sr)
DISAS_INSN(move_to_sr)
{
if (IS_USER(s)) {
- gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
+ gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
return;
}
gen_set_sr(env, s, insn, 0);
@@ -4260,7 +4260,7 @@ DISAS_INSN(move_to_sr)
DISAS_INSN(move_from_usp)
{
if (IS_USER(s)) {
- gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
+ gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
return;
}
tcg_gen_ld_i32(AREG(insn, 0), cpu_env,
@@ -4270,7 +4270,7 @@ DISAS_INSN(move_from_usp)
DISAS_INSN(move_to_usp)
{
if (IS_USER(s)) {
- gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
+ gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
return;
}
tcg_gen_st_i32(AREG(insn, 0), cpu_env,
@@ -4287,7 +4287,7 @@ DISAS_INSN(stop)
uint16_t ext;
if (IS_USER(s)) {
- gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
+ gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
return;
}
@@ -4301,10 +4301,10 @@ DISAS_INSN(stop)
DISAS_INSN(rte)
{
if (IS_USER(s)) {
- gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
+ gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
return;
}
- gen_exception(s, s->pc - 2, EXCP_RTE);
+ gen_exception(s, s->insn_pc, EXCP_RTE);
}
DISAS_INSN(movec)
@@ -4313,7 +4313,7 @@ DISAS_INSN(movec)
TCGv reg;
if (IS_USER(s)) {
- gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
+ gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
return;
}
@@ -4331,7 +4331,7 @@ DISAS_INSN(movec)
DISAS_INSN(intouch)
{
if (IS_USER(s)) {
- gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
+ gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
return;
}
/* ICache fetch. Implement as no-op. */
@@ -4340,7 +4340,7 @@ DISAS_INSN(intouch)
DISAS_INSN(cpushl)
{
if (IS_USER(s)) {
- gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
+ gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
return;
}
/* Cache push/invalidate. Implement as no-op. */
@@ -4348,7 +4348,7 @@ DISAS_INSN(cpushl)
DISAS_INSN(wddata)
{
- gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
+ gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
}
DISAS_INSN(wdebug)
@@ -4356,7 +4356,7 @@ DISAS_INSN(wdebug)
M68kCPU *cpu = m68k_env_get_cpu(env);
if (IS_USER(s)) {
- gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
+ gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
return;
}
/* TODO: Implement wdebug. */
@@ -4365,7 +4365,7 @@ DISAS_INSN(wdebug)
DISAS_INSN(trap)
{
- gen_exception(s, s->pc - 2, EXCP_TRAP0 + (insn & 0xf));
+ gen_exception(s, s->insn_pc, EXCP_TRAP0 + (insn & 0xf));
}
static void gen_load_fcr(DisasContext *s, TCGv res, int reg)
--
2.14.3
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PATCH v5 05/17] target/m68k: add CPU_LOG_INT trace
2018-01-02 1:10 [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) Laurent Vivier
` (3 preceding siblings ...)
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 04/17] target-m68k: use insn_pc to generate instruction fault address Laurent Vivier
@ 2018-01-02 1:10 ` Laurent Vivier
2018-01-02 16:10 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 06/17] target/m68k: manage 680x0 stack frames Laurent Vivier
` (12 subsequent siblings)
17 siblings, 1 reply; 42+ messages in thread
From: Laurent Vivier @ 2018-01-02 1:10 UTC (permalink / raw
To: qemu-devel; +Cc: Thomas Huth, Laurent Vivier
Display the interrupts/exceptions information
in QEMU logs (-d int)
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target/m68k/cpu.h | 8 ++++
target/m68k/op_helper.c | 112 ++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 120 insertions(+)
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index 5d03764eab..acc2629216 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -45,6 +45,8 @@
#define EXCP_ADDRESS 3 /* Address error. */
#define EXCP_ILLEGAL 4 /* Illegal instruction. */
#define EXCP_DIV0 5 /* Divide by zero */
+#define EXCP_CHK 6 /* CHK, CHK2 Instructions */
+#define EXCP_TRAPCC 7 /* FTRAPcc, TRAPcc, TRAPV Instructions */
#define EXCP_PRIVILEGE 8 /* Privilege violation. */
#define EXCP_TRACE 9
#define EXCP_LINEA 10 /* Unimplemented line-A (MAC) opcode. */
@@ -53,6 +55,9 @@
#define EXCP_DEBEGBP 13 /* Breakpoint debug interrupt. */
#define EXCP_FORMAT 14 /* RTE format error. */
#define EXCP_UNINITIALIZED 15
+#define EXCP_SPURIOUS 24 /* Spurious interrupt */
+#define EXCP_INT_LEVEL_1 25 /* Level 1 Interrupt autovector */
+#define EXCP_INT_LEVEL_7 31 /* Level 7 Interrupt autovector */
#define EXCP_TRAP0 32 /* User trap #0. */
#define EXCP_TRAP15 47 /* User trap #15. */
#define EXCP_FP_BSUN 48 /* Branch Set on Unordered */
@@ -63,6 +68,9 @@
#define EXCP_FP_OVFL 53 /* Overflow */
#define EXCP_FP_SNAN 54 /* Signaling Not-A-Number */
#define EXCP_FP_UNIMP 55 /* Unimplemented Data type */
+#define EXCP_MMU_CONF 56 /* MMU Configuration Error */
+#define EXCP_MMU_ILLEGAL 57 /* MMU Illegal Operation Error */
+#define EXCP_MMU_ACCESS 58 /* MMU Access Level Violation Error */
#define EXCP_UNSUPPORTED 61
#define EXCP_RTE 0x100
diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c
index 63089511cb..f899b4b086 100644
--- a/target/m68k/op_helper.c
+++ b/target/m68k/op_helper.c
@@ -68,6 +68,111 @@ static void do_rte(CPUM68KState *env)
helper_set_sr(env, fmt);
}
+static const char *m68k_exception_name(int index)
+{
+ switch (index) {
+ case EXCP_ACCESS:
+ return "Access Fault";
+ case EXCP_ADDRESS:
+ return "Address Error";
+ case EXCP_ILLEGAL:
+ return "Illegal Instruction";
+ case EXCP_DIV0:
+ return "Divide by Zero";
+ case EXCP_CHK:
+ return "CHK/CHK2";
+ case EXCP_TRAPCC:
+ return "FTRAPcc, TRAPcc, TRAPV";
+ case EXCP_PRIVILEGE:
+ return "Privilege Violation";
+ case EXCP_TRACE:
+ return "Trace";
+ case EXCP_LINEA:
+ return "A-Line";
+ case EXCP_LINEF:
+ return "F-Line";
+ case EXCP_DEBEGBP: /* 68020/030 only */
+ return "Copro Protocol Violation";
+ case EXCP_FORMAT:
+ return "Format Error";
+ case EXCP_UNINITIALIZED:
+ return "Unitialized Interruot";
+ case EXCP_SPURIOUS:
+ return "Spurious Interrupt";
+ case EXCP_INT_LEVEL_1:
+ return "Level 1 Interrupt";
+ case EXCP_INT_LEVEL_1 + 1:
+ return "Level 2 Interrupt";
+ case EXCP_INT_LEVEL_1 + 2:
+ return "Level 3 Interrupt";
+ case EXCP_INT_LEVEL_1 + 3:
+ return "Level 4 Interrupt";
+ case EXCP_INT_LEVEL_1 + 4:
+ return "Level 5 Interrupt";
+ case EXCP_INT_LEVEL_1 + 5:
+ return "Level 6 Interrupt";
+ case EXCP_INT_LEVEL_1 + 6:
+ return "Level 7 Interrupt";
+ case EXCP_TRAP0:
+ return "TRAP #0";
+ case EXCP_TRAP0 + 1:
+ return "TRAP #1";
+ case EXCP_TRAP0 + 2:
+ return "TRAP #2";
+ case EXCP_TRAP0 + 3:
+ return "TRAP #3";
+ case EXCP_TRAP0 + 4:
+ return "TRAP #4";
+ case EXCP_TRAP0 + 5:
+ return "TRAP #5";
+ case EXCP_TRAP0 + 6:
+ return "TRAP #6";
+ case EXCP_TRAP0 + 7:
+ return "TRAP #7";
+ case EXCP_TRAP0 + 8:
+ return "TRAP #8";
+ case EXCP_TRAP0 + 9:
+ return "TRAP #9";
+ case EXCP_TRAP0 + 10:
+ return "TRAP #10";
+ case EXCP_TRAP0 + 11:
+ return "TRAP #11";
+ case EXCP_TRAP0 + 12:
+ return "TRAP #12";
+ case EXCP_TRAP0 + 13:
+ return "TRAP #13";
+ case EXCP_TRAP0 + 14:
+ return "TRAP #14";
+ case EXCP_TRAP0 + 15:
+ return "TRAP #15";
+ case EXCP_FP_BSUN:
+ return "FP Branch/Set on unordered condition";
+ case EXCP_FP_INEX:
+ return "FP Inexact Result";
+ case EXCP_FP_DZ:
+ return "FP Divide by Zero";
+ case EXCP_FP_UNFL:
+ return "FP Underflow";
+ case EXCP_FP_OPERR:
+ return "FP Operand Error";
+ case EXCP_FP_OVFL:
+ return "FP Overflow";
+ case EXCP_FP_SNAN:
+ return "FP Signaling NAN";
+ case EXCP_FP_UNIMP:
+ return "FP Unimplemented Data Type";
+ case EXCP_MMU_CONF: /* 68030/68851 only */
+ return "MMU Configuration Error";
+ case EXCP_MMU_ILLEGAL: /* 68851 only */
+ return "MMU Illegal Operation";
+ case EXCP_MMU_ACCESS: /* 68851 only */
+ return "MMU Access Level Violation";
+ case 64 ... 255:
+ return "User Defined Vector";
+ }
+ return "Unassigned";
+}
+
static void do_interrupt_all(CPUM68KState *env, int is_hw)
{
CPUState *cs = CPU(m68k_env_get_cpu(env));
@@ -109,6 +214,13 @@ static void do_interrupt_all(CPUM68KState *env, int is_hw)
vector = cs->exception_index << 2;
+ if (qemu_loglevel_mask(CPU_LOG_INT)) {
+ static int count;
+ qemu_log("INT %6d: %s(%#x) pc=%08x sp=%08x sr=%04x\n",
+ ++count, m68k_exception_name(cs->exception_index),
+ vector, env->pc, env->aregs[7], env->sr);
+ }
+
fmt |= 0x40000000;
fmt |= vector << 16;
fmt |= env->sr;
--
2.14.3
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PATCH v5 06/17] target/m68k: manage 680x0 stack frames
2018-01-02 1:10 [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) Laurent Vivier
` (4 preceding siblings ...)
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 05/17] target/m68k: add CPU_LOG_INT trace Laurent Vivier
@ 2018-01-02 1:10 ` Laurent Vivier
2018-01-02 16:16 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 07/17] target/m68k: add chk and chk2 Laurent Vivier
` (11 subsequent siblings)
17 siblings, 1 reply; 42+ messages in thread
From: Laurent Vivier @ 2018-01-02 1:10 UTC (permalink / raw
To: qemu-devel; +Cc: Thomas Huth, Laurent Vivier
680x0 manages several stack frame formats:
- format 0: four-word stack frame
- format 1: four-word throwaway stack frame
- format 2: six-word stack frame
- format 3: Floating-Point post-instruction stack frame
- format 4: eight-word stack frame
- format 7: access-error stack frame
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target/m68k/op_helper.c | 158 +++++++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 155 insertions(+), 3 deletions(-)
diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c
index f899b4b086..0099a92c8c 100644
--- a/target/m68k/op_helper.c
+++ b/target/m68k/op_helper.c
@@ -54,7 +54,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
}
}
-static void do_rte(CPUM68KState *env)
+static void cf_rte(CPUM68KState *env)
{
uint32_t sp;
uint32_t fmt;
@@ -68,6 +68,45 @@ static void do_rte(CPUM68KState *env)
helper_set_sr(env, fmt);
}
+static void m68k_rte(CPUM68KState *env)
+{
+ uint32_t sp;
+ uint16_t fmt;
+ uint16_t sr;
+
+ sp = env->aregs[7];
+throwaway:
+ sr = cpu_lduw_kernel(env, sp);
+ sp += 2;
+ env->pc = cpu_ldl_kernel(env, sp);
+ sp += 4;
+ if (m68k_feature(env, M68K_FEATURE_QUAD_MULDIV)) {
+ /* all except 68000 */
+ fmt = cpu_lduw_kernel(env, sp);
+ sp += 2;
+ switch (fmt >> 12) {
+ case 0:
+ break;
+ case 1:
+ env->aregs[7] = sp;
+ helper_set_sr(env, sr);
+ goto throwaway;
+ case 2:
+ case 3:
+ sp += 4;
+ break;
+ case 4:
+ sp += 8;
+ break;
+ case 7:
+ sp += 52;
+ break;
+ }
+ }
+ env->aregs[7] = sp;
+ helper_set_sr(env, sr);
+}
+
static const char *m68k_exception_name(int index)
{
switch (index) {
@@ -173,7 +212,7 @@ static const char *m68k_exception_name(int index)
return "Unassigned";
}
-static void do_interrupt_all(CPUM68KState *env, int is_hw)
+static void cf_interrupt_all(CPUM68KState *env, int is_hw)
{
CPUState *cs = CPU(m68k_env_get_cpu(env));
uint32_t sp;
@@ -188,7 +227,7 @@ static void do_interrupt_all(CPUM68KState *env, int is_hw)
switch (cs->exception_index) {
case EXCP_RTE:
/* Return from an exception. */
- do_rte(env);
+ cf_rte(env);
return;
case EXCP_HALT_INSN:
if (semihosting_enabled()
@@ -246,6 +285,119 @@ static void do_interrupt_all(CPUM68KState *env, int is_hw)
env->pc = cpu_ldl_kernel(env, env->vbr + vector);
}
+static inline void do_stack_frame(CPUM68KState *env, uint32_t *sp,
+ uint16_t format, uint16_t sr,
+ uint32_t addr, uint32_t retaddr)
+{
+ CPUState *cs = CPU(m68k_env_get_cpu(env));
+ switch (format) {
+ case 4:
+ *sp -= 4;
+ cpu_stl_kernel(env, *sp, env->pc);
+ *sp -= 4;
+ cpu_stl_kernel(env, *sp, addr);
+ break;
+ case 3:
+ case 2:
+ *sp -= 4;
+ cpu_stl_kernel(env, *sp, addr);
+ break;
+ }
+ *sp -= 2;
+ cpu_stw_kernel(env, *sp, (format << 12) + (cs->exception_index << 2));
+ *sp -= 4;
+ cpu_stl_kernel(env, *sp, retaddr);
+ *sp -= 2;
+ cpu_stw_kernel(env, *sp, sr);
+}
+
+static void m68k_interrupt_all(CPUM68KState *env, int is_hw)
+{
+ CPUState *cs = CPU(m68k_env_get_cpu(env));
+ uint32_t sp;
+ uint32_t retaddr;
+ uint32_t vector;
+ uint16_t sr, oldsr;
+
+ retaddr = env->pc;
+
+ if (!is_hw) {
+ switch (cs->exception_index) {
+ case EXCP_RTE:
+ /* Return from an exception. */
+ m68k_rte(env);
+ return;
+ case EXCP_TRAP0 ... EXCP_TRAP15:
+ /* Move the PC after the trap instruction. */
+ retaddr += 2;
+ break;
+ }
+ }
+
+ vector = cs->exception_index << 2;
+
+ if (qemu_loglevel_mask(CPU_LOG_INT)) {
+ static int count;
+ qemu_log("INT %6d: %s(%#x) pc=%08x sp=%08x sr=%04x\n",
+ ++count, m68k_exception_name(cs->exception_index),
+ vector, env->pc, env->aregs[7], env->sr);
+ }
+
+ /*
+ * MC68040UM/AD, chapter 9.3.10
+ */
+
+ sr = env->sr | cpu_m68k_get_ccr(env);
+ /* "the processor first make an internal copy" */
+ oldsr = sr;
+ /* "set the mode to supervisor" */
+ sr |= SR_S;
+ /* "suppress tracing" */
+ sr &= ~SR_T;
+ /* "sets the processor interrupt mask" */
+ if (is_hw) {
+ sr |= (env->sr & ~SR_I) | (env->pending_level << SR_I_SHIFT);
+ }
+ helper_set_sr(env, sr);
+ sp = env->aregs[7];
+
+ sp &= ~1;
+ if (cs->exception_index == EXCP_ADDRESS) {
+ do_stack_frame(env, &sp, 2, oldsr, 0, retaddr);
+ } else if (cs->exception_index == EXCP_ILLEGAL ||
+ cs->exception_index == EXCP_DIV0 ||
+ cs->exception_index == EXCP_CHK ||
+ cs->exception_index == EXCP_TRAPCC ||
+ cs->exception_index == EXCP_TRACE) {
+ /* FIXME: addr is not only env->pc */
+ do_stack_frame(env, &sp, 2, oldsr, env->pc, retaddr);
+ } else if (is_hw && oldsr & SR_M &&
+ cs->exception_index >= EXCP_SPURIOUS &&
+ cs->exception_index <= EXCP_INT_LEVEL_7) {
+ do_stack_frame(env, &sp, 0, oldsr, 0, retaddr);
+ oldsr = sr;
+ env->aregs[7] = sp;
+ helper_set_sr(env, sr &= ~SR_M);
+ sp = env->aregs[7] & ~1;
+ do_stack_frame(env, &sp, 1, oldsr, 0, retaddr);
+ } else {
+ do_stack_frame(env, &sp, 0, oldsr, 0, retaddr);
+ }
+
+ env->aregs[7] = sp;
+ /* Jump to vector. */
+ env->pc = cpu_ldl_kernel(env, env->vbr + vector);
+}
+
+static void do_interrupt_all(CPUM68KState *env, int is_hw)
+{
+ if (m68k_feature(env, M68K_FEATURE_M68000)) {
+ m68k_interrupt_all(env, is_hw);
+ return;
+ }
+ cf_interrupt_all(env, is_hw);
+}
+
void m68k_cpu_do_interrupt(CPUState *cs)
{
M68kCPU *cpu = M68K_CPU(cs);
--
2.14.3
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PATCH v5 07/17] target/m68k: add chk and chk2
2018-01-02 1:10 [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) Laurent Vivier
` (5 preceding siblings ...)
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 06/17] target/m68k: manage 680x0 stack frames Laurent Vivier
@ 2018-01-02 1:10 ` Laurent Vivier
2018-01-02 16:41 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 08/17] target/m68k: add move16 Laurent Vivier
` (10 subsequent siblings)
17 siblings, 1 reply; 42+ messages in thread
From: Laurent Vivier @ 2018-01-02 1:10 UTC (permalink / raw
To: qemu-devel; +Cc: Thomas Huth, Laurent Vivier
chk and chk2 compares a value to boundaries, and
triggers a CHK exception if the values is out of bounds.
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
linux-user/main.c | 7 +++
target/m68k/cpu.c | 2 +
target/m68k/cpu.h | 1 +
target/m68k/translate.c | 137 +++++++++++++++++++++++++++++++++++++++++++++++-
4 files changed, 146 insertions(+), 1 deletion(-)
diff --git a/linux-user/main.c b/linux-user/main.c
index 71696ed33d..99a551b04f 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -2985,6 +2985,13 @@ void cpu_loop(CPUM68KState *env)
info._sifields._sigfault._addr = env->pc;
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
break;
+ case EXCP_CHK:
+ info.si_signo = TARGET_SIGFPE;
+ info.si_errno = 0;
+ info.si_code = TARGET_FPE_INTOVF;
+ info._sifields._sigfault._addr = env->pc;
+ queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
+ break;
case EXCP_DIV0:
info.si_signo = TARGET_SIGFPE;
info.si_errno = 0;
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index 0a3dd83548..57ffcb2114 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -134,6 +134,7 @@ static void m68020_cpu_initfn(Object *obj)
m68k_set_feature(env, M68K_FEATURE_CAS);
m68k_set_feature(env, M68K_FEATURE_BKPT);
m68k_set_feature(env, M68K_FEATURE_RTD);
+ m68k_set_feature(env, M68K_FEATURE_CHK2);
}
#define m68030_cpu_initfn m68020_cpu_initfn
#define m68040_cpu_initfn m68020_cpu_initfn
@@ -156,6 +157,7 @@ static void m68060_cpu_initfn(Object *obj)
m68k_set_feature(env, M68K_FEATURE_CAS);
m68k_set_feature(env, M68K_FEATURE_BKPT);
m68k_set_feature(env, M68K_FEATURE_RTD);
+ m68k_set_feature(env, M68K_FEATURE_CHK2);
}
static void m5208_cpu_initfn(Object *obj)
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index acc2629216..42c358d1a7 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -304,6 +304,7 @@ enum m68k_features {
M68K_FEATURE_CAS,
M68K_FEATURE_BKPT,
M68K_FEATURE_RTD,
+ M68K_FEATURE_CHK2,
};
static inline int m68k_feature(CPUM68KState *env, int feature)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index a1e424e3db..6ef4c3a53c 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -4203,6 +4203,140 @@ DISAS_INSN(ff1)
gen_helper_ff1(reg, reg);
}
+DISAS_INSN(chk)
+{
+ TCGv tsrc, src, reg;
+ int opsize;
+ TCGLabel *l1, *l2;
+
+ switch ((insn >> 7) & 3) {
+ case 3:
+ opsize = OS_WORD;
+ break;
+ case 2:
+ if (m68k_feature(env, M68K_FEATURE_CHK2)) {
+ opsize = OS_LONG;
+ break;
+ }
+ /* fallthru */
+ default:
+ gen_exception(s, s->insn_pc, EXCP_ILLEGAL);
+ return;
+ }
+ SRC_EA(env, tsrc, opsize, 1, NULL);
+ src = tcg_temp_local_new();
+ tcg_gen_mov_i32(src, tsrc);
+
+ reg = tcg_temp_local_new();
+ gen_ext(reg, DREG(insn, 9), opsize, 1);
+ gen_flush_flags(s);
+ update_cc_op(s);
+
+ l1 = gen_new_label();
+ l2 = gen_new_label();
+ tcg_gen_brcondi_i32(TCG_COND_GE, reg, 0, l1);
+ tcg_gen_movi_i32(QREG_CC_N, -1);
+ tcg_gen_movi_i32(QREG_PC, s->pc);
+ gen_raise_exception(EXCP_CHK);
+ tcg_gen_br(l2);
+ gen_set_label(l1);
+ tcg_gen_brcond_i32(TCG_COND_LE, reg, src, l2);
+ tcg_gen_movi_i32(QREG_CC_N, 0);
+ tcg_gen_movi_i32(QREG_PC, s->pc);
+ gen_raise_exception(EXCP_CHK);
+ gen_set_label(l2);
+ tcg_temp_free(src);
+ tcg_temp_free(reg);
+}
+
+DISAS_INSN(chk2)
+{
+ uint16_t ext;
+ TCGv addr1, addr2, bound1, bound2, res1, res2, reg, one, tmp;
+ int opsize;
+ TCGLabel *l1;
+
+ switch ((insn >> 9) & 3) {
+ case 0:
+ opsize = OS_BYTE;
+ break;
+ case 1:
+ opsize = OS_WORD;
+ break;
+ case 2:
+ opsize = OS_LONG;
+ break;
+ default:
+ gen_exception(s, s->insn_pc, EXCP_ILLEGAL);
+ return;
+ }
+
+ ext = read_im16(env, s);
+ if ((ext & 0x0800) == 0) {
+ gen_exception(s, s->insn_pc, EXCP_ILLEGAL);
+ return;
+ }
+
+ addr1 = gen_lea(env, s, insn, OS_UNSIZED);
+ addr2 = tcg_temp_new();
+ tcg_gen_addi_i32(addr2, addr1, opsize_bytes(opsize));
+
+ bound1 = gen_load(s, opsize, addr1, 1);
+ tcg_temp_free(addr1);
+ bound2 = gen_load(s, opsize, addr2, 1);
+ tcg_temp_free(addr2);
+
+ reg = tcg_temp_new();
+ if (ext & 0x8000) {
+ tcg_gen_mov_i32(reg, AREG(ext, 12));
+ } else {
+ gen_ext(reg, DREG(ext, 12), opsize, 1);
+ }
+
+ gen_flush_flags(s);
+
+ /* Z is set if reg is equal to either bound, cleared otherwise,
+ * QREG_CC_Z is 0 if Z is true, 1 if Z if false
+ */
+ tmp = tcg_const_i32(0);
+ tcg_gen_setcond_i32(TCG_COND_NE, QREG_CC_Z, reg, bound1);
+ tcg_gen_movcond_i32(TCG_COND_EQ, QREG_CC_Z, reg, bound2, tmp, QREG_CC_Z);
+
+ /* from real m68040:
+ * if bound1 <= bound2, trap if reg < bound1 or reg > bound2
+ * if bound1 > bound2, trap if reg > bound2 and reg < bound1
+ */
+ one = tcg_const_i32(1);
+
+ /* reg < bound1 or reg > bound2 */
+ res1 = tcg_temp_new();
+ tcg_gen_setcond_i32(TCG_COND_LT, res1, reg, bound1);
+ tcg_gen_movcond_i32(TCG_COND_GT, res1, reg, bound2, one, res1);
+
+ /* reg > bound2 and reg < bound1 */
+ res2 = tcg_temp_new();
+ tcg_gen_setcond_i32(TCG_COND_GT, res2, reg, bound2);
+ tcg_gen_setcond_i32(TCG_COND_LT, tmp, reg, bound1);
+ tcg_gen_and_i32(res2, res2, tmp);
+ tcg_temp_free(tmp);
+
+ /* if bound1 <= bound2, C = res1 else C = res2 */
+ tcg_gen_movcond_i32(TCG_COND_LE, QREG_CC_C, bound1, bound2, res1, res2);
+
+ tcg_temp_free(res1);
+ tcg_temp_free(res2);
+ tcg_temp_free(bound1);
+ tcg_temp_free(bound2);
+ tcg_temp_free(reg);
+
+ update_cc_op(s);
+ l1 = gen_new_label();
+ tcg_gen_brcond_i32(TCG_COND_NE, QREG_CC_C, one, l1);
+ tcg_gen_movi_i32(QREG_PC, s->pc);
+ gen_raise_exception(EXCP_CHK);
+ gen_set_label(l1);
+}
+
static TCGv gen_get_sr(DisasContext *s)
{
TCGv ccr;
@@ -5306,7 +5440,7 @@ void register_m68k_insns (CPUM68KState *env)
BASE(undef, 0000, 0000);
INSN(arith_im, 0080, fff8, CF_ISA_A);
INSN(arith_im, 0000, ff00, M68000);
- INSN(undef, 00c0, ffc0, M68000);
+ INSN(chk2, 00c0, f9c0, CHK2);
INSN(bitrev, 00c0, fff8, CF_ISA_APLUSC);
BASE(bitop_reg, 0100, f1c0);
BASE(bitop_reg, 0140, f1c0);
@@ -5339,6 +5473,7 @@ void register_m68k_insns (CPUM68KState *env)
BASE(move, 1000, f000);
BASE(move, 2000, f000);
BASE(move, 3000, f000);
+ INSN(chk, 4000, f040, M68000);
INSN(strldsr, 40e7, ffff, CF_ISA_APLUSC);
INSN(negx, 4080, fff8, CF_ISA_A);
INSN(negx, 4000, ff00, M68000);
--
2.14.3
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PATCH v5 08/17] target/m68k: add move16
2018-01-02 1:10 [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) Laurent Vivier
` (6 preceding siblings ...)
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 07/17] target/m68k: add chk and chk2 Laurent Vivier
@ 2018-01-02 1:10 ` Laurent Vivier
2018-01-02 16:50 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 09/17] target/m68k: softmmu cleanup Laurent Vivier
` (9 subsequent siblings)
17 siblings, 1 reply; 42+ messages in thread
From: Laurent Vivier @ 2018-01-02 1:10 UTC (permalink / raw
To: qemu-devel; +Cc: Thomas Huth, Laurent Vivier
move16 moves the source line to the destination line. Lines are aligned
to 16-byte boundaries and are 16 bytes long.
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target/m68k/cpu.c | 10 ++++++-
target/m68k/cpu.h | 1 +
target/m68k/translate.c | 73 +++++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 83 insertions(+), 1 deletion(-)
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index 57ffcb2114..1936efd170 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -137,7 +137,15 @@ static void m68020_cpu_initfn(Object *obj)
m68k_set_feature(env, M68K_FEATURE_CHK2);
}
#define m68030_cpu_initfn m68020_cpu_initfn
-#define m68040_cpu_initfn m68020_cpu_initfn
+
+static void m68040_cpu_initfn(Object *obj)
+{
+ M68kCPU *cpu = M68K_CPU(obj);
+ CPUM68KState *env = &cpu->env;
+
+ m68020_cpu_initfn(obj);
+ m68k_set_feature(env, M68K_FEATURE_M68040);
+}
static void m68060_cpu_initfn(Object *obj)
{
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index 42c358d1a7..c21e36d1af 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -305,6 +305,7 @@ enum m68k_features {
M68K_FEATURE_BKPT,
M68K_FEATURE_RTD,
M68K_FEATURE_CHK2,
+ M68K_FEATURE_M68040, /* instructions specific to MC68040 */
};
static inline int m68k_feature(CPUM68KState *env, int feature)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 6ef4c3a53c..9f13299bcf 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -4337,6 +4337,78 @@ DISAS_INSN(chk2)
gen_set_label(l1);
}
+static void m68k_copy_line(TCGv dst, TCGv src, int index)
+{
+ TCGv addr;
+ TCGv_i64 t0, t1;
+
+ addr = tcg_temp_new();
+
+ t0 = tcg_temp_new_i64();
+ t1 = tcg_temp_new_i64();
+
+ tcg_gen_andi_i32(addr, src, ~15);
+ tcg_gen_qemu_ld64(t0, addr, index);
+ tcg_gen_addi_i32(addr, addr, 8);
+ tcg_gen_qemu_ld64(t1, addr, index);
+
+ tcg_gen_andi_i32(addr, dst, ~15);
+ tcg_gen_qemu_st64(t0, addr, index);
+ tcg_gen_addi_i32(addr, addr, 8);
+ tcg_gen_qemu_st64(t1, addr, index);
+
+ tcg_temp_free_i64(t0);
+ tcg_temp_free_i64(t1);
+ tcg_temp_free(addr);
+}
+
+DISAS_INSN(move16)
+{
+ int index = IS_USER(s);
+ uint16_t mode;
+
+ mode = (insn >> 3) & 7;
+
+ if (mode & 4) {
+ TCGv tmp;
+ uint16_t ext;
+
+ ext = read_im16(env, s);
+ if ((ext & (1 << 15)) == 0) {
+ gen_exception(s, s->insn_pc, EXCP_ILLEGAL);
+ }
+
+ m68k_copy_line(AREG(ext, 12), AREG(insn, 0), index);
+
+ /* Ax can be Ay, so save Ay before incrementing Ax */
+ tmp = tcg_temp_new();
+ tcg_gen_mov_i32(tmp, AREG(ext, 12));
+ tcg_gen_addi_i32(AREG(insn, 0), AREG(insn, 0), 16);
+ tcg_gen_addi_i32(AREG(ext, 12), tmp, 16);
+ tcg_temp_free(tmp);
+ } else {
+ TCGv reg, addr;
+
+ reg = AREG(insn, 0);
+ addr = tcg_const_i32(read_im32(env, s));
+
+ if (mode & 1) {
+ /* MOVE16 (xxx).L, (Ay) */
+ m68k_copy_line(reg, addr, index);
+ } else {
+ /* MOVE16 (Ay), (xxx).L */
+ m68k_copy_line(addr, reg, index);
+ }
+
+ tcg_temp_free(addr);
+
+ if ((mode & 2) == 0) {
+ /* (Ay)+ */
+ tcg_gen_addi_i32(reg, reg, 16);
+ }
+ }
+}
+
static TCGv gen_get_sr(DisasContext *s)
{
TCGv ccr;
@@ -5638,6 +5710,7 @@ void register_m68k_insns (CPUM68KState *env)
INSN(fsave, f300, ffc0, FPU);
INSN(intouch, f340, ffc0, CF_ISA_A);
INSN(cpushl, f428, ff38, CF_ISA_A);
+ INSN(move16, f600, ffc0, M68040);
INSN(wddata, fb00, ff00, CF_ISA_A);
INSN(wdebug, fbc0, ffc0, CF_ISA_A);
#undef INSN
--
2.14.3
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PATCH v5 09/17] target/m68k: softmmu cleanup
2018-01-02 1:10 [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) Laurent Vivier
` (7 preceding siblings ...)
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 08/17] target/m68k: add move16 Laurent Vivier
@ 2018-01-02 1:10 ` Laurent Vivier
2018-01-02 16:52 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 10/17] target/m68k: add cpush/cinv Laurent Vivier
` (8 subsequent siblings)
17 siblings, 1 reply; 42+ messages in thread
From: Laurent Vivier @ 2018-01-02 1:10 UTC (permalink / raw
To: qemu-devel; +Cc: Thomas Huth, Laurent Vivier
don't compile supervisor only instructions in linux-user mode
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target/m68k/translate.c | 37 ++++++++++++++++++++++++++++++++-----
1 file changed, 32 insertions(+), 5 deletions(-)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 9f13299bcf..d463927fcc 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -4453,6 +4453,7 @@ DISAS_INSN(move_from_sr)
DEST_EA(env, insn, OS_WORD, sr, NULL);
}
+#if defined(CONFIG_SOFTMMU)
DISAS_INSN(move_to_sr)
{
if (IS_USER(s)) {
@@ -4485,6 +4486,11 @@ DISAS_INSN(move_to_usp)
DISAS_INSN(halt)
{
+ if (IS_USER(s)) {
+ gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
+ return;
+ }
+
gen_exception(s, s->pc, EXCP_HALT_INSN);
}
@@ -4568,6 +4574,7 @@ DISAS_INSN(wdebug)
/* TODO: Implement wdebug. */
cpu_abort(CPU(cpu), "WDEBUG not implemented");
}
+#endif
DISAS_INSN(trap)
{
@@ -5125,10 +5132,16 @@ DISAS_INSN(fscc)
tcg_temp_free(tmp);
}
+#if defined(CONFIG_SOFTMMU)
DISAS_INSN(frestore)
{
M68kCPU *cpu = m68k_env_get_cpu(env);
+ if (IS_USER(s)) {
+ gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
+ return;
+ }
+
/* TODO: Implement frestore. */
cpu_abort(CPU(cpu), "FRESTORE not implemented");
}
@@ -5137,9 +5150,15 @@ DISAS_INSN(fsave)
{
M68kCPU *cpu = m68k_env_get_cpu(env);
+ if (IS_USER(s)) {
+ gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
+ return;
+ }
+
/* TODO: Implement fsave. */
cpu_abort(CPU(cpu), "FSAVE not implemented");
}
+#endif
static inline TCGv gen_mac_extract_word(DisasContext *s, TCGv val, int upper)
{
@@ -5564,7 +5583,9 @@ void register_m68k_insns (CPUM68KState *env)
INSN(not, 4680, fff8, CF_ISA_A);
INSN(not, 4600, ff00, M68000);
INSN(undef, 46c0, ffc0, M68000);
+#if defined(CONFIG_SOFTMMU)
INSN(move_to_sr, 46c0, ffc0, CF_ISA_A);
+#endif
INSN(nbcd, 4800, ffc0, M68000);
INSN(linkl, 4808, fff8, M68000);
BASE(pea, 4840, ffc0);
@@ -5579,7 +5600,9 @@ void register_m68k_insns (CPUM68KState *env)
BASE(tst, 4a00, ff00);
INSN(tas, 4ac0, ffc0, CF_ISA_B);
INSN(tas, 4ac0, ffc0, M68000);
+#if defined(CONFIG_SOFTMMU)
INSN(halt, 4ac8, ffff, CF_ISA_A);
+#endif
INSN(pulse, 4acc, ffff, CF_ISA_A);
BASE(illegal, 4afc, ffff);
INSN(mull, 4c00, ffc0, CF_ISA_A);
@@ -5590,14 +5613,16 @@ void register_m68k_insns (CPUM68KState *env)
BASE(trap, 4e40, fff0);
BASE(link, 4e50, fff8);
BASE(unlk, 4e58, fff8);
+#if defined(CONFIG_SOFTMMU)
INSN(move_to_usp, 4e60, fff8, USP);
INSN(move_from_usp, 4e68, fff8, USP);
- BASE(nop, 4e71, ffff);
BASE(stop, 4e72, ffff);
BASE(rte, 4e73, ffff);
+ INSN(movec, 4e7b, ffff, CF_ISA_A);
+#endif
+ BASE(nop, 4e71, ffff);
INSN(rtd, 4e74, ffff, RTD);
BASE(rts, 4e75, ffff);
- INSN(movec, 4e7b, ffff, CF_ISA_A);
BASE(jump, 4e80, ffc0);
BASE(jump, 4ec0, ffc0);
INSN(addsubq, 5000, f080, M68000);
@@ -5701,18 +5726,20 @@ void register_m68k_insns (CPUM68KState *env)
BASE(undef_fpu, f000, f000);
INSN(fpu, f200, ffc0, CF_FPU);
INSN(fbcc, f280, ffc0, CF_FPU);
- INSN(frestore, f340, ffc0, CF_FPU);
- INSN(fsave, f300, ffc0, CF_FPU);
INSN(fpu, f200, ffc0, FPU);
INSN(fscc, f240, ffc0, FPU);
INSN(fbcc, f280, ff80, FPU);
+#if defined(CONFIG_SOFTMMU)
+ INSN(frestore, f340, ffc0, CF_FPU);
+ INSN(fsave, f300, ffc0, CF_FPU);
INSN(frestore, f340, ffc0, FPU);
INSN(fsave, f300, ffc0, FPU);
INSN(intouch, f340, ffc0, CF_ISA_A);
INSN(cpushl, f428, ff38, CF_ISA_A);
- INSN(move16, f600, ffc0, M68040);
INSN(wddata, fb00, ff00, CF_ISA_A);
INSN(wdebug, fbc0, ffc0, CF_ISA_A);
+#endif
+ INSN(move16, f600, ffc0, M68040);
#undef INSN
}
--
2.14.3
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PATCH v5 10/17] target/m68k: add cpush/cinv
2018-01-02 1:10 [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) Laurent Vivier
` (8 preceding siblings ...)
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 09/17] target/m68k: softmmu cleanup Laurent Vivier
@ 2018-01-02 1:10 ` Laurent Vivier
2018-01-02 16:53 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 11/17] target/m68k: add reset Laurent Vivier
` (7 subsequent siblings)
17 siblings, 1 reply; 42+ messages in thread
From: Laurent Vivier @ 2018-01-02 1:10 UTC (permalink / raw
To: qemu-devel; +Cc: Thomas Huth, Laurent Vivier
Add cache lines invalidate and cache lines push
as no-op operations, as we don't have cache.
These instructions are 68040 only.
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target/m68k/translate.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index d463927fcc..2a9a9c8e42 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -4558,6 +4558,24 @@ DISAS_INSN(cpushl)
/* Cache push/invalidate. Implement as no-op. */
}
+DISAS_INSN(cpush)
+{
+ if (IS_USER(s)) {
+ gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
+ return;
+ }
+ /* Cache push/invalidate. Implement as no-op. */
+}
+
+DISAS_INSN(cinv)
+{
+ if (IS_USER(s)) {
+ gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
+ return;
+ }
+ /* Invalidate cache line. Implement as no-op. */
+}
+
DISAS_INSN(wddata)
{
gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
@@ -5736,6 +5754,8 @@ void register_m68k_insns (CPUM68KState *env)
INSN(fsave, f300, ffc0, FPU);
INSN(intouch, f340, ffc0, CF_ISA_A);
INSN(cpushl, f428, ff38, CF_ISA_A);
+ INSN(cpush, f420, ff20, M68040);
+ INSN(cinv, f400, ff20, M68040);
INSN(wddata, fb00, ff00, CF_ISA_A);
INSN(wdebug, fbc0, ffc0, CF_ISA_A);
#endif
--
2.14.3
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PATCH v5 11/17] target/m68k: add reset
2018-01-02 1:10 [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) Laurent Vivier
` (9 preceding siblings ...)
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 10/17] target/m68k: add cpush/cinv Laurent Vivier
@ 2018-01-02 1:10 ` Laurent Vivier
2018-01-02 16:54 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 12/17] target/m68k: implement fsave/frestore Laurent Vivier
` (6 subsequent siblings)
17 siblings, 1 reply; 42+ messages in thread
From: Laurent Vivier @ 2018-01-02 1:10 UTC (permalink / raw
To: qemu-devel; +Cc: Thomas Huth, Laurent Vivier
The instruction traps if the CPU is not in
Supervisor state but the helper is empty because
there is no easy way to reset all the peripherals
without resetting the CPU itself.
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target/m68k/helper.c | 7 +++++++
target/m68k/helper.h | 4 ++++
target/m68k/translate.c | 13 +++++++++++++
3 files changed, 24 insertions(+)
diff --git a/target/m68k/helper.c b/target/m68k/helper.c
index 7e50ff5871..f8bd456145 100644
--- a/target/m68k/helper.c
+++ b/target/m68k/helper.c
@@ -707,3 +707,10 @@ void HELPER(set_mac_extu)(CPUM68KState *env, uint32_t val, uint32_t acc)
res |= (uint64_t)(val & 0xffff0000) << 16;
env->macc[acc + 1] = res;
}
+
+#if defined(CONFIG_SOFTMMU)
+void HELPER(reset)(CPUM68KState *env)
+{
+ /* FIXME: reset all except CPU */
+}
+#endif
diff --git a/target/m68k/helper.h b/target/m68k/helper.h
index eebe52dae5..8d0cad7c6b 100644
--- a/target/m68k/helper.h
+++ b/target/m68k/helper.h
@@ -94,3 +94,7 @@ DEF_HELPER_FLAGS_4(bfchg_mem, TCG_CALL_NO_WG, i32, env, i32, s32, i32)
DEF_HELPER_FLAGS_4(bfclr_mem, TCG_CALL_NO_WG, i32, env, i32, s32, i32)
DEF_HELPER_FLAGS_4(bfset_mem, TCG_CALL_NO_WG, i32, env, i32, s32, i32)
DEF_HELPER_FLAGS_4(bfffo_mem, TCG_CALL_NO_WG, i64, env, i32, s32, i32)
+
+#if defined(CONFIG_SOFTMMU)
+DEF_HELPER_FLAGS_1(reset, TCG_CALL_NO_RWG, void, env)
+#endif
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 2a9a9c8e42..68b67bc0a3 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -2762,6 +2762,18 @@ DISAS_INSN(unlk)
tcg_temp_free(src);
}
+#if defined(CONFIG_SOFTMMU)
+DISAS_INSN(reset)
+{
+ if (IS_USER(s)) {
+ gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
+ return;
+ }
+
+ gen_helper_reset(cpu_env);
+}
+#endif
+
DISAS_INSN(nop)
{
}
@@ -5634,6 +5646,7 @@ void register_m68k_insns (CPUM68KState *env)
#if defined(CONFIG_SOFTMMU)
INSN(move_to_usp, 4e60, fff8, USP);
INSN(move_from_usp, 4e68, fff8, USP);
+ INSN(reset, 4e70, ffff, M68000);
BASE(stop, 4e72, ffff);
BASE(rte, 4e73, ffff);
INSN(movec, 4e7b, ffff, CF_ISA_A);
--
2.14.3
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PATCH v5 12/17] target/m68k: implement fsave/frestore
2018-01-02 1:10 [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) Laurent Vivier
` (10 preceding siblings ...)
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 11/17] target/m68k: add reset Laurent Vivier
@ 2018-01-02 1:10 ` Laurent Vivier
2018-01-02 16:58 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 13/17] target/m68k: move CCR/SR functions Laurent Vivier
` (5 subsequent siblings)
17 siblings, 1 reply; 42+ messages in thread
From: Laurent Vivier @ 2018-01-02 1:10 UTC (permalink / raw
To: qemu-devel; +Cc: Thomas Huth, Laurent Vivier
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target/m68k/translate.c | 23 +++++++++++++++--------
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 68b67bc0a3..4fced68ceb 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -5165,28 +5165,35 @@ DISAS_INSN(fscc)
#if defined(CONFIG_SOFTMMU)
DISAS_INSN(frestore)
{
- M68kCPU *cpu = m68k_env_get_cpu(env);
+ TCGv addr;
if (IS_USER(s)) {
gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
return;
}
-
- /* TODO: Implement frestore. */
- cpu_abort(CPU(cpu), "FRESTORE not implemented");
+ if (m68k_feature(s->env, M68K_FEATURE_M68040)) {
+ SRC_EA(env, addr, OS_LONG, 0, NULL);
+ /* FIXME: check the state frame */
+ } else {
+ disas_undef(env, s, insn);
+ }
}
DISAS_INSN(fsave)
{
- M68kCPU *cpu = m68k_env_get_cpu(env);
-
if (IS_USER(s)) {
gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
return;
}
- /* TODO: Implement fsave. */
- cpu_abort(CPU(cpu), "FSAVE not implemented");
+ if (m68k_feature(s->env, M68K_FEATURE_M68040)) {
+ /* always write IDLE */
+ TCGv idle = tcg_const_i32(0x41000000);
+ DEST_EA(env, insn, OS_LONG, idle, NULL);
+ tcg_temp_free(idle);
+ } else {
+ disas_undef(env, s, insn);
+ }
}
#endif
--
2.14.3
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PATCH v5 13/17] target/m68k: move CCR/SR functions
2018-01-02 1:10 [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) Laurent Vivier
` (11 preceding siblings ...)
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 12/17] target/m68k: implement fsave/frestore Laurent Vivier
@ 2018-01-02 1:10 ` Laurent Vivier
2018-01-02 17:00 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 14/17] target/m68k: add 680x0 "move to SR" instruction Laurent Vivier
` (4 subsequent siblings)
17 siblings, 1 reply; 42+ messages in thread
From: Laurent Vivier @ 2018-01-02 1:10 UTC (permalink / raw
To: qemu-devel; +Cc: Thomas Huth, Laurent Vivier
The following patches will be clearer if we move
functions before adding new ones.
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target/m68k/translate.c | 111 ++++++++++++++++++++++++------------------------
1 file changed, 55 insertions(+), 56 deletions(-)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 4fced68ceb..cfe9fd34df 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -2131,6 +2131,61 @@ DISAS_INSN(bitop_im)
}
}
+static TCGv gen_get_ccr(DisasContext *s)
+{
+ TCGv dest;
+
+ update_cc_op(s);
+ dest = tcg_temp_new();
+ gen_helper_get_ccr(dest, cpu_env);
+ return dest;
+}
+
+static TCGv gen_get_sr(DisasContext *s)
+{
+ TCGv ccr;
+ TCGv sr;
+
+ ccr = gen_get_ccr(s);
+ sr = tcg_temp_new();
+ tcg_gen_andi_i32(sr, QREG_SR, 0xffe0);
+ tcg_gen_or_i32(sr, sr, ccr);
+ return sr;
+}
+
+static void gen_set_sr_im(DisasContext *s, uint16_t val, int ccr_only)
+{
+ if (ccr_only) {
+ tcg_gen_movi_i32(QREG_CC_C, val & CCF_C ? 1 : 0);
+ tcg_gen_movi_i32(QREG_CC_V, val & CCF_V ? -1 : 0);
+ tcg_gen_movi_i32(QREG_CC_Z, val & CCF_Z ? 0 : 1);
+ tcg_gen_movi_i32(QREG_CC_N, val & CCF_N ? -1 : 0);
+ tcg_gen_movi_i32(QREG_CC_X, val & CCF_X ? 1 : 0);
+ } else {
+ gen_helper_set_sr(cpu_env, tcg_const_i32(val));
+ }
+ set_cc_op(s, CC_OP_FLAGS);
+}
+
+static void gen_set_sr(CPUM68KState *env, DisasContext *s, uint16_t insn,
+ int ccr_only)
+{
+ if ((insn & 0x38) == 0) {
+ if (ccr_only) {
+ gen_helper_set_ccr(cpu_env, DREG(insn, 0));
+ } else {
+ gen_helper_set_sr(cpu_env, DREG(insn, 0));
+ }
+ set_cc_op(s, CC_OP_FLAGS);
+ } else if ((insn & 0x3f) == 0x3c) {
+ uint16_t val;
+ val = read_im16(env, s);
+ gen_set_sr_im(s, val, ccr_only);
+ } else {
+ disas_undef(env, s, insn);
+ }
+}
+
DISAS_INSN(arith_im)
{
int op;
@@ -2474,16 +2529,6 @@ DISAS_INSN(clr)
tcg_temp_free(zero);
}
-static TCGv gen_get_ccr(DisasContext *s)
-{
- TCGv dest;
-
- update_cc_op(s);
- dest = tcg_temp_new();
- gen_helper_get_ccr(dest, cpu_env);
- return dest;
-}
-
DISAS_INSN(move_from_ccr)
{
TCGv ccr;
@@ -2510,40 +2555,6 @@ DISAS_INSN(neg)
tcg_temp_free(dest);
}
-static void gen_set_sr_im(DisasContext *s, uint16_t val, int ccr_only)
-{
- if (ccr_only) {
- tcg_gen_movi_i32(QREG_CC_C, val & CCF_C ? 1 : 0);
- tcg_gen_movi_i32(QREG_CC_V, val & CCF_V ? -1 : 0);
- tcg_gen_movi_i32(QREG_CC_Z, val & CCF_Z ? 0 : 1);
- tcg_gen_movi_i32(QREG_CC_N, val & CCF_N ? -1 : 0);
- tcg_gen_movi_i32(QREG_CC_X, val & CCF_X ? 1 : 0);
- } else {
- gen_helper_set_sr(cpu_env, tcg_const_i32(val));
- }
- set_cc_op(s, CC_OP_FLAGS);
-}
-
-static void gen_set_sr(CPUM68KState *env, DisasContext *s, uint16_t insn,
- int ccr_only)
-{
- if ((insn & 0x38) == 0) {
- if (ccr_only) {
- gen_helper_set_ccr(cpu_env, DREG(insn, 0));
- } else {
- gen_helper_set_sr(cpu_env, DREG(insn, 0));
- }
- set_cc_op(s, CC_OP_FLAGS);
- } else if ((insn & 0x3f) == 0x3c) {
- uint16_t val;
- val = read_im16(env, s);
- gen_set_sr_im(s, val, ccr_only);
- } else {
- disas_undef(env, s, insn);
- }
-}
-
-
DISAS_INSN(move_to_ccr)
{
gen_set_sr(env, s, insn, 1);
@@ -4421,18 +4432,6 @@ DISAS_INSN(move16)
}
}
-static TCGv gen_get_sr(DisasContext *s)
-{
- TCGv ccr;
- TCGv sr;
-
- ccr = gen_get_ccr(s);
- sr = tcg_temp_new();
- tcg_gen_andi_i32(sr, QREG_SR, 0xffe0);
- tcg_gen_or_i32(sr, sr, ccr);
- return sr;
-}
-
DISAS_INSN(strldsr)
{
uint16_t ext;
--
2.14.3
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PATCH v5 14/17] target/m68k: add 680x0 "move to SR" instruction
2018-01-02 1:10 [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) Laurent Vivier
` (12 preceding siblings ...)
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 13/17] target/m68k: move CCR/SR functions Laurent Vivier
@ 2018-01-02 1:10 ` Laurent Vivier
2018-01-02 17:02 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 15/17] target/m68k: add andi/ori/eori to SR/CCR Laurent Vivier
` (3 subsequent siblings)
17 siblings, 1 reply; 42+ messages in thread
From: Laurent Vivier @ 2018-01-02 1:10 UTC (permalink / raw
To: qemu-devel; +Cc: Thomas Huth, Laurent Vivier
Some cleanup, and allows SR to be moved from any addressing mode.
Previous code was wrong for coldfire: coldfire also allows to
use addressing mode to set SR/CCR. It only supports Data register
to get SR/CCR (move from)
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target/m68k/translate.c | 38 ++++++++++++++++++++++----------------
1 file changed, 22 insertions(+), 16 deletions(-)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index cfe9fd34df..1a462064be 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -2162,27 +2162,34 @@ static void gen_set_sr_im(DisasContext *s, uint16_t val, int ccr_only)
tcg_gen_movi_i32(QREG_CC_N, val & CCF_N ? -1 : 0);
tcg_gen_movi_i32(QREG_CC_X, val & CCF_X ? 1 : 0);
} else {
- gen_helper_set_sr(cpu_env, tcg_const_i32(val));
+ TCGv sr = tcg_const_i32(val);
+ gen_helper_set_sr(cpu_env, sr);
+ tcg_temp_free(sr);
}
set_cc_op(s, CC_OP_FLAGS);
}
-static void gen_set_sr(CPUM68KState *env, DisasContext *s, uint16_t insn,
- int ccr_only)
+static void gen_set_sr(DisasContext *s, TCGv val, int ccr_only)
{
- if ((insn & 0x38) == 0) {
- if (ccr_only) {
- gen_helper_set_ccr(cpu_env, DREG(insn, 0));
- } else {
- gen_helper_set_sr(cpu_env, DREG(insn, 0));
- }
- set_cc_op(s, CC_OP_FLAGS);
- } else if ((insn & 0x3f) == 0x3c) {
+ if (ccr_only) {
+ gen_helper_set_ccr(cpu_env, val);
+ } else {
+ gen_helper_set_sr(cpu_env, val);
+ }
+ set_cc_op(s, CC_OP_FLAGS);
+}
+
+static void gen_move_to_sr(CPUM68KState *env, DisasContext *s, uint16_t insn,
+ bool ccr_only)
+{
+ if ((insn & 0x3f) == 0x3c) {
uint16_t val;
val = read_im16(env, s);
gen_set_sr_im(s, val, ccr_only);
} else {
- disas_undef(env, s, insn);
+ TCGv src;
+ SRC_EA(env, src, OS_WORD, 0, NULL);
+ gen_set_sr(s, src, ccr_only);
}
}
@@ -2557,7 +2564,7 @@ DISAS_INSN(neg)
DISAS_INSN(move_to_ccr)
{
- gen_set_sr(env, s, insn, 1);
+ gen_move_to_sr(env, s, insn, true);
}
DISAS_INSN(not)
@@ -4471,7 +4478,7 @@ DISAS_INSN(move_to_sr)
gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
return;
}
- gen_set_sr(env, s, insn, 0);
+ gen_move_to_sr(env, s, insn, false);
gen_lookup_tb(s);
}
@@ -5618,9 +5625,8 @@ void register_m68k_insns (CPUM68KState *env)
BASE(move_to_ccr, 44c0, ffc0);
INSN(not, 4680, fff8, CF_ISA_A);
INSN(not, 4600, ff00, M68000);
- INSN(undef, 46c0, ffc0, M68000);
#if defined(CONFIG_SOFTMMU)
- INSN(move_to_sr, 46c0, ffc0, CF_ISA_A);
+ BASE(move_to_sr, 46c0, ffc0);
#endif
INSN(nbcd, 4800, ffc0, M68000);
INSN(linkl, 4808, fff8, M68000);
--
2.14.3
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PATCH v5 15/17] target/m68k: add andi/ori/eori to SR/CCR
2018-01-02 1:10 [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) Laurent Vivier
` (13 preceding siblings ...)
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 14/17] target/m68k: add 680x0 "move to SR" instruction Laurent Vivier
@ 2018-01-02 1:10 ` Laurent Vivier
2018-01-02 17:06 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 16/17] target/m68k: add the Interrupt Stack Pointer Laurent Vivier
` (2 subsequent siblings)
17 siblings, 1 reply; 42+ messages in thread
From: Laurent Vivier @ 2018-01-02 1:10 UTC (permalink / raw
To: qemu-devel; +Cc: Thomas Huth, Laurent Vivier
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target/m68k/translate.c | 53 ++++++++++++++++++++++++++++++++++++++++++-------
1 file changed, 46 insertions(+), 7 deletions(-)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 1a462064be..ee59b5bad2 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -2201,6 +2201,7 @@ DISAS_INSN(arith_im)
TCGv dest;
TCGv addr;
int opsize;
+ bool with_SR = ((insn & 0x3f) == 0x3c);
op = (insn >> 9) & 7;
opsize = insn_opsize(insn);
@@ -2217,32 +2218,73 @@ DISAS_INSN(arith_im)
default:
abort();
}
- SRC_EA(env, src1, opsize, 1, (op == 6) ? NULL : &addr);
+
+ if (with_SR) {
+ /* SR/CCR can only be used with andi/eori/ori */
+ if (op == 2 || op == 3 || op == 6) {
+ disas_undef(env, s, insn);
+ return;
+ }
+ switch (opsize) {
+ case OS_BYTE:
+ src1 = gen_get_ccr(s);
+ break;
+ case OS_WORD:
+ if (IS_USER(s)) {
+ gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
+ return;
+ }
+ src1 = gen_get_sr(s);
+ break;
+ case OS_LONG:
+ disas_undef(env, s, insn);
+ return;
+ }
+ } else {
+ SRC_EA(env, src1, opsize, 1, (op == 6) ? NULL : &addr);
+ }
dest = tcg_temp_new();
switch (op) {
case 0: /* ori */
tcg_gen_or_i32(dest, src1, im);
- gen_logic_cc(s, dest, opsize);
+ if (with_SR) {
+ gen_set_sr(s, dest, opsize == OS_BYTE);
+ } else {
+ DEST_EA(env, insn, opsize, dest, &addr);
+ gen_logic_cc(s, dest, opsize);
+ }
break;
case 1: /* andi */
tcg_gen_and_i32(dest, src1, im);
- gen_logic_cc(s, dest, opsize);
+ if (with_SR) {
+ gen_set_sr(s, dest, opsize == OS_BYTE);
+ } else {
+ DEST_EA(env, insn, opsize, dest, &addr);
+ gen_logic_cc(s, dest, opsize);
+ }
break;
case 2: /* subi */
tcg_gen_setcond_i32(TCG_COND_LTU, QREG_CC_X, src1, im);
tcg_gen_sub_i32(dest, src1, im);
gen_update_cc_add(dest, im, opsize);
set_cc_op(s, CC_OP_SUBB + opsize);
+ DEST_EA(env, insn, opsize, dest, &addr);
break;
case 3: /* addi */
tcg_gen_add_i32(dest, src1, im);
gen_update_cc_add(dest, im, opsize);
tcg_gen_setcond_i32(TCG_COND_LTU, QREG_CC_X, dest, im);
set_cc_op(s, CC_OP_ADDB + opsize);
+ DEST_EA(env, insn, opsize, dest, &addr);
break;
case 5: /* eori */
tcg_gen_xor_i32(dest, src1, im);
- gen_logic_cc(s, dest, opsize);
+ if (with_SR) {
+ gen_set_sr(s, dest, opsize == OS_BYTE);
+ } else {
+ DEST_EA(env, insn, opsize, dest, &addr);
+ gen_logic_cc(s, dest, opsize);
+ }
break;
case 6: /* cmpi */
gen_update_cc_cmp(s, src1, im, opsize);
@@ -2251,9 +2293,6 @@ DISAS_INSN(arith_im)
abort();
}
tcg_temp_free(im);
- if (op != 6) {
- DEST_EA(env, insn, opsize, dest, &addr);
- }
tcg_temp_free(dest);
}
--
2.14.3
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PATCH v5 16/17] target/m68k: add the Interrupt Stack Pointer
2018-01-02 1:10 [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) Laurent Vivier
` (14 preceding siblings ...)
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 15/17] target/m68k: add andi/ori/eori to SR/CCR Laurent Vivier
@ 2018-01-02 1:10 ` Laurent Vivier
2018-01-02 17:13 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 17/17] target/m68k: fix m68k_cpu_dump_state() Laurent Vivier
2018-01-02 1:31 ` [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) no-reply
17 siblings, 1 reply; 42+ messages in thread
From: Laurent Vivier @ 2018-01-02 1:10 UTC (permalink / raw
To: qemu-devel; +Cc: Thomas Huth, Laurent Vivier
Add the third stack pointer, the Interrupt Stack Pointer (ISP)
(680x0 only). This stack will be needed in softmmu mode.
Update movec to set/get the value of the three stacks.
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target/m68k/cpu.c | 3 ++
target/m68k/cpu.h | 70 ++++++++++++++++++++++++++++++++++++++++-
target/m68k/gdbstub.c | 1 +
target/m68k/helper.c | 82 ++++++++++++++++++++++++++++++++++++++++++++-----
target/m68k/helper.h | 4 ++-
target/m68k/monitor.c | 1 +
target/m68k/translate.c | 40 ++++++++++++++++++++++--
7 files changed, 189 insertions(+), 12 deletions(-)
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index 1936efd170..4138496938 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -57,6 +57,9 @@ static void m68k_cpu_reset(CPUState *s)
memset(env, 0, offsetof(CPUM68KState, end_reset_fields));
#if !defined(CONFIG_USER_ONLY)
env->sr = 0x2700;
+ if (m68k_feature(env, M68K_FEATURE_M68000)) {
+ env->current_sp = M68K_ISP;
+ }
#endif
m68k_switch_sp(env);
for (i = 0; i < 8; i++) {
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index c21e36d1af..fdb780c81c 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -89,7 +89,7 @@ typedef struct CPUM68KState {
/* SSP and USP. The current_sp is stored in aregs[7], the other here. */
int current_sp;
- uint32_t sp[2];
+ uint32_t sp[3];
/* Condition flags. */
uint32_t cc_op;
@@ -222,6 +222,74 @@ typedef enum {
#define M68K_SSP 0
#define M68K_USP 1
+#define M68K_ISP 2
+
+/* m68k Control Registers */
+
+/* ColdFire */
+/* Memory Management Control Registers */
+#define M68K_CR_ASID 0x003
+#define M68K_CR_ACR0 0x004
+#define M68K_CR_ACR1 0x005
+#define M68K_CR_ACR2 0x006
+#define M68K_CR_ACR3 0x007
+#define M68K_CR_MMUBAR 0x008
+
+/* Processor Miscellaneous Registers */
+#define M68K_CR_PC 0x80F
+
+/* Local Memory and Module Control Registers */
+#define M68K_CR_ROMBAR0 0xC00
+#define M68K_CR_ROMBAR1 0xC01
+#define M68K_CR_RAMBAR0 0xC04
+#define M68K_CR_RAMBAR1 0xC05
+#define M68K_CR_MPCR 0xC0C
+#define M68K_CR_EDRAMBAR 0xC0D
+#define M68K_CR_SECMBAR 0xC0E
+#define M68K_CR_MBAR 0xC0F
+
+/* Local Memory Address Permutation Control Registers */
+#define M68K_CR_PCR1U0 0xD02
+#define M68K_CR_PCR1L0 0xD03
+#define M68K_CR_PCR2U0 0xD04
+#define M68K_CR_PCR2L0 0xD05
+#define M68K_CR_PCR3U0 0xD06
+#define M68K_CR_PCR3L0 0xD07
+#define M68K_CR_PCR1U1 0xD0A
+#define M68K_CR_PCR1L1 0xD0B
+#define M68K_CR_PCR2U1 0xD0C
+#define M68K_CR_PCR2L1 0xD0D
+#define M68K_CR_PCR3U1 0xD0E
+#define M68K_CR_PCR3L1 0xD0F
+
+/* MC680x0 */
+/* MC680[1234]0/CPU32 */
+#define M68K_CR_SFC 0x000
+#define M68K_CR_DFC 0x001
+#define M68K_CR_USP 0x800
+#define M68K_CR_VBR 0x801 /* + Coldfire */
+
+/* MC680[234]0 */
+#define M68K_CR_CACR 0x002 /* + Coldfire */
+#define M68K_CR_CAAR 0x802 /* MC68020 and MC68030 only */
+#define M68K_CR_MSP 0x803
+#define M68K_CR_ISP 0x804
+
+/* MC68040/MC68LC040 */
+#define M68K_CR_TC 0x003
+#define M68K_CR_ITT0 0x004
+#define M68K_CR_ITT1 0x005
+#define M68K_CR_DTT0 0x006
+#define M68K_CR_DTT1 0x007
+#define M68K_CR_MMUSR 0x805
+#define M68K_CR_URP 0x806
+#define M68K_CR_SRP 0x807
+
+/* MC68EC040 */
+#define M68K_CR_IACR0 0x004
+#define M68K_CR_IACR1 0x005
+#define M68K_CR_DACR0 0x006
+#define M68K_CR_DACR1 0x007
#define M68K_FPIAR_SHIFT 0
#define M68K_FPIAR (1 << M68K_FPIAR_SHIFT)
diff --git a/target/m68k/gdbstub.c b/target/m68k/gdbstub.c
index c7f44c9bb3..c44fd0f4a1 100644
--- a/target/m68k/gdbstub.c
+++ b/target/m68k/gdbstub.c
@@ -64,6 +64,7 @@ int m68k_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
switch (n) {
case 16:
env->sr = tmp;
+ m68k_switch_sp(env);
break;
case 17:
env->pc = tmp;
diff --git a/target/m68k/helper.c b/target/m68k/helper.c
index f8bd456145..c5be2f3e77 100644
--- a/target/m68k/helper.c
+++ b/target/m68k/helper.c
@@ -171,28 +171,84 @@ void m68k_cpu_init_gdb(M68kCPU *cpu)
/* TODO: Add [E]MAC registers. */
}
-void HELPER(movec)(CPUM68KState *env, uint32_t reg, uint32_t val)
+void HELPER(cf_movec_to)(CPUM68KState *env, uint32_t reg, uint32_t val)
{
M68kCPU *cpu = m68k_env_get_cpu(env);
switch (reg) {
- case 0x02: /* CACR */
+ case M68K_CR_CACR:
env->cacr = val;
m68k_switch_sp(env);
break;
- case 0x04: case 0x05: case 0x06: case 0x07: /* ACR[0-3] */
+ case M68K_CR_ACR0:
+ case M68K_CR_ACR1:
+ case M68K_CR_ACR2:
+ case M68K_CR_ACR3:
/* TODO: Implement Access Control Registers. */
break;
- case 0x801: /* VBR */
+ case M68K_CR_VBR:
env->vbr = val;
break;
/* TODO: Implement control registers. */
default:
- cpu_abort(CPU(cpu), "Unimplemented control register write 0x%x = 0x%x\n",
+ cpu_abort(CPU(cpu),
+ "Unimplemented control register write 0x%x = 0x%x\n",
reg, val);
}
}
+void HELPER(m68k_movec_to)(CPUM68KState *env, uint32_t reg, uint32_t val)
+{
+ M68kCPU *cpu = m68k_env_get_cpu(env);
+
+ switch (reg) {
+ /* MC680[1234]0 */
+ case M68K_CR_VBR:
+ env->vbr = val;
+ return;
+ /* MC680[234]0 */
+ case M68K_CR_CACR:
+ env->cacr = val;
+ m68k_switch_sp(env);
+ return;
+ /* MC680[34]0 */
+ case M68K_CR_USP:
+ env->sp[M68K_USP] = val;
+ return;
+ case M68K_CR_MSP:
+ env->sp[M68K_SSP] = val;
+ return;
+ case M68K_CR_ISP:
+ env->sp[M68K_ISP] = val;
+ return;
+ }
+ cpu_abort(CPU(cpu), "Unimplemented control register write 0x%x = 0x%x\n",
+ reg, val);
+}
+
+uint32_t HELPER(m68k_movec_from)(CPUM68KState *env, uint32_t reg)
+{
+ M68kCPU *cpu = m68k_env_get_cpu(env);
+
+ switch (reg) {
+ /* MC680[1234]0 */
+ case M68K_CR_VBR:
+ return env->vbr;
+ /* MC680[234]0 */
+ case M68K_CR_CACR:
+ return env->cacr;
+ /* MC680[34]0 */
+ case M68K_CR_USP:
+ return env->sp[M68K_USP];
+ case M68K_CR_MSP:
+ return env->sp[M68K_SSP];
+ case M68K_CR_ISP:
+ return env->sp[M68K_ISP];
+ }
+ cpu_abort(CPU(cpu), "Unimplemented control register read 0x%x\n",
+ reg);
+}
+
void HELPER(set_macsr)(CPUM68KState *env, uint32_t val)
{
uint32_t acc;
@@ -232,8 +288,20 @@ void m68k_switch_sp(CPUM68KState *env)
int new_sp;
env->sp[env->current_sp] = env->aregs[7];
- new_sp = (env->sr & SR_S && env->cacr & M68K_CACR_EUSP)
- ? M68K_SSP : M68K_USP;
+ if (m68k_feature(env, M68K_FEATURE_M68000)) {
+ if (env->sr & SR_S) {
+ if (env->sr & SR_M) {
+ new_sp = M68K_SSP;
+ } else {
+ new_sp = M68K_ISP;
+ }
+ } else {
+ new_sp = M68K_USP;
+ }
+ } else {
+ new_sp = (env->sr & SR_S && env->cacr & M68K_CACR_EUSP)
+ ? M68K_SSP : M68K_USP;
+ }
env->aregs[7] = env->sp[new_sp];
env->current_sp = new_sp;
}
diff --git a/target/m68k/helper.h b/target/m68k/helper.h
index 8d0cad7c6b..c63db23503 100644
--- a/target/m68k/helper.h
+++ b/target/m68k/helper.h
@@ -8,7 +8,9 @@ DEF_HELPER_4(divsl, void, env, int, int, s32)
DEF_HELPER_4(divull, void, env, int, int, i32)
DEF_HELPER_4(divsll, void, env, int, int, s32)
DEF_HELPER_2(set_sr, void, env, i32)
-DEF_HELPER_3(movec, void, env, i32, i32)
+DEF_HELPER_3(cf_movec_to, void, env, i32, i32)
+DEF_HELPER_3(m68k_movec_to, void, env, i32, i32)
+DEF_HELPER_2(m68k_movec_from, i32, env, i32)
DEF_HELPER_4(cas2w, void, env, i32, i32, i32)
DEF_HELPER_4(cas2l, void, env, i32, i32, i32)
DEF_HELPER_4(cas2l_parallel, void, env, i32, i32, i32)
diff --git a/target/m68k/monitor.c b/target/m68k/monitor.c
index 5605323a81..52781e85f0 100644
--- a/target/m68k/monitor.c
+++ b/target/m68k/monitor.c
@@ -30,6 +30,7 @@ static const MonitorDef monitor_defs[] = {
{ "sr", offsetof(CPUM68KState, sr) },
{ "ssp", offsetof(CPUM68KState, sp[0]) },
{ "usp", offsetof(CPUM68KState, sp[1]) },
+ { "isp", offsetof(CPUM68KState, sp[2]) },
{ NULL },
};
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index ee59b5bad2..bd43e60a23 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -4576,7 +4576,7 @@ DISAS_INSN(rte)
gen_exception(s, s->insn_pc, EXCP_RTE);
}
-DISAS_INSN(movec)
+DISAS_INSN(cf_movec)
{
uint16_t ext;
TCGv reg;
@@ -4593,7 +4593,32 @@ DISAS_INSN(movec)
} else {
reg = DREG(ext, 12);
}
- gen_helper_movec(cpu_env, tcg_const_i32(ext & 0xfff), reg);
+ gen_helper_cf_movec_to(cpu_env, tcg_const_i32(ext & 0xfff), reg);
+ gen_lookup_tb(s);
+}
+
+DISAS_INSN(m68k_movec)
+{
+ uint16_t ext;
+ TCGv reg;
+
+ if (IS_USER(s)) {
+ gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
+ return;
+ }
+
+ ext = read_im16(env, s);
+
+ if (ext & 0x8000) {
+ reg = AREG(ext, 12);
+ } else {
+ reg = DREG(ext, 12);
+ }
+ if (insn & 1) {
+ gen_helper_m68k_movec_to(cpu_env, tcg_const_i32(ext & 0xfff), reg);
+ } else {
+ gen_helper_m68k_movec_from(reg, cpu_env, tcg_const_i32(ext & 0xfff));
+ }
gen_lookup_tb(s);
}
@@ -5700,7 +5725,8 @@ void register_m68k_insns (CPUM68KState *env)
INSN(reset, 4e70, ffff, M68000);
BASE(stop, 4e72, ffff);
BASE(rte, 4e73, ffff);
- INSN(movec, 4e7b, ffff, CF_ISA_A);
+ INSN(cf_movec, 4e7b, ffff, CF_ISA_A);
+ INSN(m68k_movec, 4e7a, fffe, M68000);
#endif
BASE(nop, 4e71, ffff);
INSN(rtd, 4e74, ffff, RTD);
@@ -6006,6 +6032,14 @@ void m68k_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
cpu_fprintf(f, "RP ");
break;
}
+ cpu_fprintf(f, "\n");
+#ifdef CONFIG_SOFTMMU
+ cpu_fprintf(f, "%sA7(MSP) = %08x %sA7(USP) = %08x %sA7(ISP) = %08x\n",
+ env->current_sp == M68K_SSP ? "->" : " ", env->sp[M68K_SSP],
+ env->current_sp == M68K_USP ? "->" : " ", env->sp[M68K_USP],
+ env->current_sp == M68K_ISP ? "->" : " ", env->sp[M68K_ISP]);
+ cpu_fprintf(f, "VBR = 0x%08x\n", env->vbr);
+#endif
}
void restore_state_to_opc(CPUM68KState *env, TranslationBlock *tb,
--
2.14.3
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PATCH v5 17/17] target/m68k: fix m68k_cpu_dump_state()
2018-01-02 1:10 [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) Laurent Vivier
` (15 preceding siblings ...)
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 16/17] target/m68k: add the Interrupt Stack Pointer Laurent Vivier
@ 2018-01-02 1:10 ` Laurent Vivier
2018-01-02 17:14 ` Richard Henderson
2018-01-02 1:31 ` [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) no-reply
17 siblings, 1 reply; 42+ messages in thread
From: Laurent Vivier @ 2018-01-02 1:10 UTC (permalink / raw
To: qemu-devel; +Cc: Thomas Huth, Laurent Vivier
Display correctly the Trace bits for 680x0
(2 bits instead of 1 for Coldfire).
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target/m68k/cpu.h | 3 ++-
target/m68k/translate.c | 9 ++++++---
2 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index fdb780c81c..41714d8fd6 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -218,7 +218,8 @@ typedef enum {
#define SR_I 0x0700
#define SR_M 0x1000
#define SR_S 0x2000
-#define SR_T 0x8000
+#define SR_T_SHIFT 14
+#define SR_T 0xc000
#define M68K_SSP 0
#define M68K_USP 1
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index bd43e60a23..a7937de8d0 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -5997,9 +5997,12 @@ void m68k_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
}
cpu_fprintf (f, "PC = %08x ", env->pc);
sr = env->sr | cpu_m68k_get_ccr(env);
- cpu_fprintf(f, "SR = %04x %c%c%c%c%c ", sr, (sr & CCF_X) ? 'X' : '-',
- (sr & CCF_N) ? 'N' : '-', (sr & CCF_Z) ? 'Z' : '-',
- (sr & CCF_V) ? 'V' : '-', (sr & CCF_C) ? 'C' : '-');
+ cpu_fprintf(f, "SR = %04x T:%x I:%x %c%c %c%c%c%c%c\n",
+ sr, (sr & SR_T) >> SR_T_SHIFT, (sr & SR_I) >> SR_I_SHIFT,
+ (sr & SR_S) ? 'S' : 'U', (sr & SR_M) ? '%' : 'I',
+ (sr & CCF_X) ? 'X' : '-', (sr & CCF_N) ? 'N' : '-',
+ (sr & CCF_Z) ? 'Z' : '-', (sr & CCF_V) ? 'V' : '-',
+ (sr & CCF_C) ? 'C' : '-');
cpu_fprintf(f, "FPSR = %08x %c%c%c%c ", env->fpsr,
(env->fpsr & FPSR_CC_A) ? 'A' : '-',
(env->fpsr & FPSR_CC_I) ? 'I' : '-',
--
2.14.3
^ permalink raw reply related [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1)
2018-01-02 1:10 [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) Laurent Vivier
` (16 preceding siblings ...)
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 17/17] target/m68k: fix m68k_cpu_dump_state() Laurent Vivier
@ 2018-01-02 1:31 ` no-reply
17 siblings, 0 replies; 42+ messages in thread
From: no-reply @ 2018-01-02 1:31 UTC (permalink / raw
To: laurent; +Cc: famz, qemu-devel, huth
Hi,
This series failed automatic build test. Please find the testing commands and
their output below. If you have docker installed, you can probably reproduce it
locally.
Type: series
Message-id: 20180102011032.30056-1-laurent@vivier.eu
Subject: [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1)
=== TEST SCRIPT BEGIN ===
#!/bin/bash
set -e
git submodule update --init dtc
# Let docker tests dump environment info
export SHOW_ENV=1
export J=8
time make docker-test-quick@centos6
time make docker-test-build@min-glib
time make docker-test-mingw@fedora
# iotests is broken now, skip
# time make docker-test-block@fedora
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
t [tag update] patchew/20171230225622.97409-1-michael.weiser@gmx.de -> patchew/20171230225622.97409-1-michael.weiser@gmx.de
* [new tag] patchew/20180102011032.30056-1-laurent@vivier.eu -> patchew/20180102011032.30056-1-laurent@vivier.eu
Switched to a new branch 'test'
ab001a9b9e target/m68k: fix m68k_cpu_dump_state()
351872e18c target/m68k: add the Interrupt Stack Pointer
ce04aee14c target/m68k: add andi/ori/eori to SR/CCR
fe1aa74707 target/m68k: add 680x0 "move to SR" instruction
c9ab2cc16d target/m68k: move CCR/SR functions
030e0d3a9f target/m68k: implement fsave/frestore
8cecc141ff target/m68k: add reset
b4c72fcd3a target/m68k: add cpush/cinv
e49bb79579 target/m68k: softmmu cleanup
20c7dd1044 target/m68k: add move16
15bcbe6458 target/m68k: add chk and chk2
ad6dfcc512 target/m68k: manage 680x0 stack frames
84802d83ac target/m68k: add CPU_LOG_INT trace
69420ad43b target-m68k: use insn_pc to generate instruction fault address
af2813d309 linux-user, m68k: correctly manage SR in context
11b7910d12 target/m68k: fix gen_get_ccr()
3ca364b3b4 target-m68k: sync CC_OP before gen_jmp_tb()
=== OUTPUT BEGIN ===
Submodule 'dtc' (git://git.qemu-project.org/dtc.git) registered for path 'dtc'
Cloning into '/var/tmp/patchew-tester-tmp-zk7_6_vw/src/dtc'...
Submodule path 'dtc': checked out '558cd81bdd432769b59bff01240c44f82cfb1a9d'
BUILD centos6
make[1]: Entering directory '/var/tmp/patchew-tester-tmp-zk7_6_vw/src'
GEN /var/tmp/patchew-tester-tmp-zk7_6_vw/src/docker-src.2018-01-01-20.29.52.21597/qemu.tar
Cloning into '/var/tmp/patchew-tester-tmp-zk7_6_vw/src/docker-src.2018-01-01-20.29.52.21597/qemu.tar.vroot'...
done.
Your branch is up-to-date with 'origin/test'.
Submodule 'dtc' (git://git.qemu-project.org/dtc.git) registered for path 'dtc'
Cloning into '/var/tmp/patchew-tester-tmp-zk7_6_vw/src/docker-src.2018-01-01-20.29.52.21597/qemu.tar.vroot/dtc'...
Submodule path 'dtc': checked out '558cd81bdd432769b59bff01240c44f82cfb1a9d'
Submodule 'ui/keycodemapdb' (git://git.qemu.org/keycodemapdb.git) registered for path 'ui/keycodemapdb'
Cloning into '/var/tmp/patchew-tester-tmp-zk7_6_vw/src/docker-src.2018-01-01-20.29.52.21597/qemu.tar.vroot/ui/keycodemapdb'...
Submodule path 'ui/keycodemapdb': checked out '10739aa26051a5d49d88132604539d3ed085e72e'
COPY RUNNER
RUN test-quick in qemu:centos6
Packages installed:
SDL-devel-1.2.14-7.el6_7.1.x86_64
bison-2.4.1-5.el6.x86_64
bzip2-devel-1.0.5-7.el6_0.x86_64
ccache-3.1.6-2.el6.x86_64
csnappy-devel-0-6.20150729gitd7bc683.el6.x86_64
flex-2.5.35-9.el6.x86_64
gcc-4.4.7-18.el6.x86_64
gettext-0.17-18.el6.x86_64
git-1.7.1-9.el6_9.x86_64
glib2-devel-2.28.8-9.el6.x86_64
libepoxy-devel-1.2-3.el6.x86_64
libfdt-devel-1.4.0-1.el6.x86_64
librdmacm-devel-1.0.21-0.el6.x86_64
lzo-devel-2.03-3.1.el6_5.1.x86_64
make-3.81-23.el6.x86_64
mesa-libEGL-devel-11.0.7-4.el6.x86_64
mesa-libgbm-devel-11.0.7-4.el6.x86_64
package g++ is not installed
pixman-devel-0.32.8-1.el6.x86_64
spice-glib-devel-0.26-8.el6.x86_64
spice-server-devel-0.12.4-16.el6.x86_64
tar-1.23-15.el6_8.x86_64
vte-devel-0.25.1-9.el6.x86_64
xen-devel-4.6.6-2.el6.x86_64
zlib-devel-1.2.3-29.el6.x86_64
Environment variables:
PACKAGES=bison bzip2-devel ccache csnappy-devel flex g++ gcc gettext git glib2-devel libepoxy-devel libfdt-devel librdmacm-devel lzo-devel make mesa-libEGL-devel mesa-libgbm-devel pixman-devel SDL-devel spice-glib-devel spice-server-devel tar vte-devel xen-devel zlib-devel
HOSTNAME=dd3e97338b45
MAKEFLAGS= -j8
J=8
CCACHE_DIR=/var/tmp/ccache
EXTRA_CONFIGURE_OPTS=
V=
SHOW_ENV=1
PATH=/usr/lib/ccache:/usr/lib64/ccache:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin
PWD=/
TARGET_LIST=
SHLVL=1
HOME=/root
TEST_DIR=/tmp/qemu-test
FEATURES= dtc
DEBUG=
_=/usr/bin/env
Configure options:
--enable-werror --target-list=x86_64-softmmu,aarch64-softmmu --prefix=/tmp/qemu-test/install
No C++ compiler available; disabling C++ specific optional code
Install prefix /tmp/qemu-test/install
BIOS directory /tmp/qemu-test/install/share/qemu
firmware path /tmp/qemu-test/install/share/qemu-firmware
binary directory /tmp/qemu-test/install/bin
library directory /tmp/qemu-test/install/lib
module directory /tmp/qemu-test/install/lib/qemu
libexec directory /tmp/qemu-test/install/libexec
include directory /tmp/qemu-test/install/include
config directory /tmp/qemu-test/install/etc
local state directory /tmp/qemu-test/install/var
Manual directory /tmp/qemu-test/install/share/man
ELF interp prefix /usr/gnemul/qemu-%M
Source path /tmp/qemu-test/src
GIT binary git
GIT submodules
C compiler cc
Host C compiler cc
C++ compiler
Objective-C compiler cc
ARFLAGS rv
CFLAGS -O2 -U_FORTIFY_SOURCE -D_FORTIFY_SOURCE=2 -g
QEMU_CFLAGS -I/usr/include/pixman-1 -I$(SRC_PATH)/dtc/libfdt -pthread -I/usr/include/glib-2.0 -I/usr/lib64/glib-2.0/include -DNCURSES_WIDECHAR -fPIE -DPIE -m64 -mcx16 -D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE -Wstrict-prototypes -Wredundant-decls -Wall -Wundef -Wwrite-strings -Wmissing-prototypes -fno-strict-aliasing -fno-common -fwrapv -Wendif-labels -Wno-missing-include-dirs -Wempty-body -Wnested-externs -Wformat-security -Wformat-y2k -Winit-self -Wignored-qualifiers -Wold-style-declaration -Wold-style-definition -Wtype-limits -fstack-protector-all -Wno-missing-braces -I/usr/include/libpng12 -I/usr/include/libdrm -I/usr/include/spice-server -I/usr/include/cacard -I/usr/include/glib-2.0 -I/usr/lib64/glib-2.0/include -I/usr/include/pixman-1 -I/usr/include/nss3 -I/usr/include/nspr4 -I/usr/include/spice-1
LDFLAGS -Wl,--warn-common -Wl,-z,relro -Wl,-z,now -pie -m64 -g
make make
install install
python python -B
smbd /usr/sbin/smbd
module support no
host CPU x86_64
host big endian no
target list x86_64-softmmu aarch64-softmmu
gprof enabled no
sparse enabled no
strip binaries yes
profiler no
static build no
SDL support yes (1.2.14)
GTK support yes (2.24.23)
GTK GL support no
VTE support yes (0.25.1)
TLS priority NORMAL
GNUTLS support no
GNUTLS rnd no
libgcrypt no
libgcrypt kdf no
nettle no
nettle kdf no
libtasn1 no
curses support yes
virgl support no
curl support no
mingw32 support no
Audio drivers oss
Block whitelist (rw)
Block whitelist (ro)
VirtFS support no
Multipath support no
VNC support yes
VNC SASL support no
VNC JPEG support yes
VNC PNG support yes
xen support yes
xen ctrl version 40600
pv dom build no
brlapi support no
bluez support no
Documentation no
PIE yes
vde support no
netmap support no
Linux AIO support no
ATTR/XATTR support yes
Install blobs yes
KVM support yes
HAX support no
TCG support yes
TCG debug enabled no
TCG interpreter no
malloc trim support yes
RDMA support yes
fdt support yes
preadv support yes
fdatasync yes
madvise yes
posix_madvise yes
libcap-ng support no
vhost-net support yes
vhost-scsi support yes
vhost-vsock support yes
vhost-user support yes
Trace backends log
spice support yes (0.12.6/0.12.4)
rbd support no
xfsctl support no
smartcard support yes
libusb no
usb net redir no
OpenGL support yes
OpenGL dmabufs no
libiscsi support no
libnfs support no
build guest agent yes
QGA VSS support no
QGA w32 disk info no
QGA MSI support no
seccomp support no
coroutine backend ucontext
coroutine pool yes
debug stack usage no
crypto afalg no
GlusterFS support no
gcov gcov
gcov enabled no
TPM support yes
libssh2 support no
TPM passthrough yes
TPM emulator yes
QOM debugging yes
Live block migration yes
lzo support yes
snappy support no
bzip2 support yes
NUMA host support no
tcmalloc support no
jemalloc support no
avx2 optimization no
replication support yes
VxHS block device no
capstone no
GEN x86_64-softmmu/config-devices.mak.tmp
GEN aarch64-softmmu/config-devices.mak.tmp
mkdir -p dtc/libfdt
mkdir -p dtc/tests
GEN config-host.h
GEN qemu-options.def
GEN qmp-commands.h
GEN qapi-visit.h
GEN qapi-types.h
GEN qapi-event.h
GEN x86_64-softmmu/config-devices.mak
GEN qmp-marshal.c
GEN aarch64-softmmu/config-devices.mak
GEN qapi-types.c
GEN qapi-visit.c
GEN qapi-event.c
GEN qmp-introspect.h
GEN qmp-introspect.c
GEN trace/generated-tcg-tracers.h
GEN trace/generated-helpers-wrappers.h
GEN trace/generated-helpers.h
GEN trace/generated-helpers.c
GEN module_block.h
GEN ui/input-keymap-linux-to-qcode.c
GEN ui/input-keymap-qcode-to-qnum.c
GEN ui/input-keymap-qcode-to-linux.c
GEN ui/input-keymap-qnum-to-qcode.c
GEN tests/test-qapi-types.h
GEN tests/test-qapi-visit.h
GEN tests/test-qmp-commands.h
GEN tests/test-qmp-introspect.h
GEN tests/test-qapi-event.h
GEN trace-root.h
GEN util/trace.h
GEN crypto/trace.h
GEN io/trace.h
GEN migration/trace.h
GEN block/trace.h
GEN chardev/trace.h
GEN hw/block/trace.h
GEN hw/block/dataplane/trace.h
GEN hw/char/trace.h
GEN hw/intc/trace.h
GEN hw/net/trace.h
GEN hw/virtio/trace.h
GEN hw/audio/trace.h
GEN hw/misc/trace.h
GEN hw/usb/trace.h
GEN hw/scsi/trace.h
GEN hw/nvram/trace.h
GEN hw/display/trace.h
GEN hw/input/trace.h
GEN hw/timer/trace.h
GEN hw/dma/trace.h
GEN hw/sparc/trace.h
GEN hw/sd/trace.h
GEN hw/isa/trace.h
GEN hw/mem/trace.h
GEN hw/i386/trace.h
GEN hw/i386/xen/trace.h
GEN hw/9pfs/trace.h
GEN hw/ppc/trace.h
GEN hw/pci/trace.h
GEN hw/s390x/trace.h
GEN hw/vfio/trace.h
GEN hw/acpi/trace.h
GEN hw/arm/trace.h
GEN hw/alpha/trace.h
GEN hw/xen/trace.h
GEN hw/ide/trace.h
GEN ui/trace.h
GEN audio/trace.h
GEN net/trace.h
GEN target/arm/trace.h
GEN target/i386/trace.h
GEN target/mips/trace.h
GEN target/sparc/trace.h
GEN target/s390x/trace.h
GEN target/ppc/trace.h
GEN qom/trace.h
GEN linux-user/trace.h
GEN qapi/trace.h
GEN accel/tcg/trace.h
GEN accel/kvm/trace.h
GEN nbd/trace.h
GEN scsi/trace.h
GEN trace-root.c
GEN util/trace.c
GEN crypto/trace.c
GEN io/trace.c
GEN migration/trace.c
GEN block/trace.c
GEN chardev/trace.c
GEN hw/block/trace.c
GEN hw/block/dataplane/trace.c
GEN hw/char/trace.c
GEN hw/intc/trace.c
GEN hw/net/trace.c
GEN hw/virtio/trace.c
GEN hw/audio/trace.c
GEN hw/misc/trace.c
GEN hw/usb/trace.c
GEN hw/scsi/trace.c
GEN hw/nvram/trace.c
GEN hw/display/trace.c
GEN hw/input/trace.c
GEN hw/timer/trace.c
GEN hw/dma/trace.c
GEN hw/sparc/trace.c
GEN hw/sd/trace.c
GEN hw/isa/trace.c
GEN hw/mem/trace.c
GEN hw/i386/trace.c
GEN hw/i386/xen/trace.c
GEN hw/9pfs/trace.c
GEN hw/ppc/trace.c
GEN hw/pci/trace.c
GEN hw/s390x/trace.c
GEN hw/vfio/trace.c
GEN hw/acpi/trace.c
GEN hw/arm/trace.c
GEN hw/alpha/trace.c
GEN hw/xen/trace.c
GEN hw/ide/trace.c
GEN ui/trace.c
GEN audio/trace.c
GEN net/trace.c
GEN target/arm/trace.c
GEN target/i386/trace.c
GEN target/mips/trace.c
GEN target/sparc/trace.c
GEN target/s390x/trace.c
GEN target/ppc/trace.c
GEN qom/trace.c
GEN linux-user/trace.c
GEN qapi/trace.c
GEN accel/tcg/trace.c
GEN accel/kvm/trace.c
GEN nbd/trace.c
GEN scsi/trace.c
GEN config-all-devices.mak
DEP /tmp/qemu-test/src/dtc/tests/dumptrees.c
DEP /tmp/qemu-test/src/dtc/tests/trees.S
DEP /tmp/qemu-test/src/dtc/tests/testutils.c
DEP /tmp/qemu-test/src/dtc/tests/value-labels.c
DEP /tmp/qemu-test/src/dtc/tests/asm_tree_dump.c
DEP /tmp/qemu-test/src/dtc/tests/truncated_property.c
DEP /tmp/qemu-test/src/dtc/tests/check_path.c
DEP /tmp/qemu-test/src/dtc/tests/overlay_bad_fixup.c
DEP /tmp/qemu-test/src/dtc/tests/overlay.c
DEP /tmp/qemu-test/src/dtc/tests/subnode_iterate.c
DEP /tmp/qemu-test/src/dtc/tests/property_iterate.c
DEP /tmp/qemu-test/src/dtc/tests/integer-expressions.c
DEP /tmp/qemu-test/src/dtc/tests/utilfdt_test.c
DEP /tmp/qemu-test/src/dtc/tests/path_offset_aliases.c
DEP /tmp/qemu-test/src/dtc/tests/add_subnode_with_nops.c
DEP /tmp/qemu-test/src/dtc/tests/dtbs_equal_unordered.c
DEP /tmp/qemu-test/src/dtc/tests/dtb_reverse.c
DEP /tmp/qemu-test/src/dtc/tests/dtbs_equal_ordered.c
DEP /tmp/qemu-test/src/dtc/tests/extra-terminating-null.c
DEP /tmp/qemu-test/src/dtc/tests/incbin.c
DEP /tmp/qemu-test/src/dtc/tests/boot-cpuid.c
DEP /tmp/qemu-test/src/dtc/tests/phandle_format.c
DEP /tmp/qemu-test/src/dtc/tests/path-references.c
DEP /tmp/qemu-test/src/dtc/tests/references.c
DEP /tmp/qemu-test/src/dtc/tests/string_escapes.c
DEP /tmp/qemu-test/src/dtc/tests/propname_escapes.c
DEP /tmp/qemu-test/src/dtc/tests/appendprop2.c
DEP /tmp/qemu-test/src/dtc/tests/appendprop1.c
DEP /tmp/qemu-test/src/dtc/tests/del_node.c
DEP /tmp/qemu-test/src/dtc/tests/del_property.c
DEP /tmp/qemu-test/src/dtc/tests/setprop.c
DEP /tmp/qemu-test/src/dtc/tests/set_name.c
DEP /tmp/qemu-test/src/dtc/tests/rw_tree1.c
DEP /tmp/qemu-test/src/dtc/tests/open_pack.c
DEP /tmp/qemu-test/src/dtc/tests/nopulate.c
DEP /tmp/qemu-test/src/dtc/tests/mangle-layout.c
DEP /tmp/qemu-test/src/dtc/tests/move_and_save.c
DEP /tmp/qemu-test/src/dtc/tests/sw_tree1.c
DEP /tmp/qemu-test/src/dtc/tests/nop_node.c
DEP /tmp/qemu-test/src/dtc/tests/nop_property.c
DEP /tmp/qemu-test/src/dtc/tests/setprop_inplace.c
DEP /tmp/qemu-test/src/dtc/tests/stringlist.c
DEP /tmp/qemu-test/src/dtc/tests/addr_size_cells.c
DEP /tmp/qemu-test/src/dtc/tests/notfound.c
DEP /tmp/qemu-test/src/dtc/tests/sized_cells.c
DEP /tmp/qemu-test/src/dtc/tests/char_literal.c
DEP /tmp/qemu-test/src/dtc/tests/get_alias.c
DEP /tmp/qemu-test/src/dtc/tests/node_offset_by_compatible.c
DEP /tmp/qemu-test/src/dtc/tests/node_check_compatible.c
DEP /tmp/qemu-test/src/dtc/tests/node_offset_by_phandle.c
DEP /tmp/qemu-test/src/dtc/tests/node_offset_by_prop_value.c
DEP /tmp/qemu-test/src/dtc/tests/parent_offset.c
DEP /tmp/qemu-test/src/dtc/tests/supernode_atdepth_offset.c
DEP /tmp/qemu-test/src/dtc/tests/get_path.c
DEP /tmp/qemu-test/src/dtc/tests/get_phandle.c
DEP /tmp/qemu-test/src/dtc/tests/getprop.c
DEP /tmp/qemu-test/src/dtc/tests/get_name.c
DEP /tmp/qemu-test/src/dtc/tests/subnode_offset.c
DEP /tmp/qemu-test/src/dtc/tests/path_offset.c
DEP /tmp/qemu-test/src/dtc/tests/find_property.c
DEP /tmp/qemu-test/src/dtc/tests/root_node.c
DEP /tmp/qemu-test/src/dtc/tests/get_mem_rsv.c
DEP /tmp/qemu-test/src/dtc/libfdt/fdt_overlay.c
DEP /tmp/qemu-test/src/dtc/libfdt/fdt_empty_tree.c
DEP /tmp/qemu-test/src/dtc/libfdt/fdt_addresses.c
DEP /tmp/qemu-test/src/dtc/libfdt/fdt_strerror.c
DEP /tmp/qemu-test/src/dtc/libfdt/fdt_rw.c
DEP /tmp/qemu-test/src/dtc/libfdt/fdt_sw.c
DEP /tmp/qemu-test/src/dtc/libfdt/fdt_ro.c
DEP /tmp/qemu-test/src/dtc/libfdt/fdt_wip.c
DEP /tmp/qemu-test/src/dtc/libfdt/fdt.c
DEP /tmp/qemu-test/src/dtc/util.c
DEP /tmp/qemu-test/src/dtc/fdtput.c
DEP /tmp/qemu-test/src/dtc/fdtdump.c
DEP /tmp/qemu-test/src/dtc/fdtget.c
LEX convert-dtsv0-lexer.lex.c
DEP /tmp/qemu-test/src/dtc/srcpos.c
BISON dtc-parser.tab.c
LEX dtc-lexer.lex.c
DEP /tmp/qemu-test/src/dtc/treesource.c
DEP /tmp/qemu-test/src/dtc/livetree.c
DEP /tmp/qemu-test/src/dtc/flattree.c
DEP /tmp/qemu-test/src/dtc/fstree.c
DEP /tmp/qemu-test/src/dtc/dtc.c
DEP /tmp/qemu-test/src/dtc/data.c
DEP /tmp/qemu-test/src/dtc/checks.c
DEP convert-dtsv0-lexer.lex.c
DEP dtc-parser.tab.c
DEP dtc-lexer.lex.c
CHK version_gen.h
UPD version_gen.h
DEP /tmp/qemu-test/src/dtc/util.c
CC libfdt/fdt.o
CC libfdt/fdt_ro.o
CC libfdt/fdt_wip.o
CC libfdt/fdt_sw.o
CC libfdt/fdt_strerror.o
CC libfdt/fdt_rw.o
CC libfdt/fdt_addresses.o
CC libfdt/fdt_empty_tree.o
CC libfdt/fdt_overlay.o
AR libfdt/libfdt.a
ar: creating libfdt/libfdt.a
a - libfdt/fdt.o
a - libfdt/fdt_ro.o
a - libfdt/fdt_wip.o
a - libfdt/fdt_sw.o
a - libfdt/fdt_rw.o
a - libfdt/fdt_strerror.o
a - libfdt/fdt_empty_tree.o
a - libfdt/fdt_addresses.o
a - libfdt/fdt_overlay.o
mkdir -p dtc/libfdt
mkdir -p dtc/tests
CC tests/qemu-iotests/socket_scm_helper.o
GEN qga/qapi-generated/qga-qapi-types.h
GEN qga/qapi-generated/qga-qapi-types.c
GEN qga/qapi-generated/qga-qmp-commands.h
GEN qga/qapi-generated/qga-qapi-visit.h
GEN qga/qapi-generated/qga-qmp-marshal.c
CC qmp-introspect.o
GEN qga/qapi-generated/qga-qapi-visit.c
CC qapi-types.o
CC qapi-visit.o
CC qapi-event.o
CC qapi/qapi-visit-core.o
CC qapi/qapi-dealloc-visitor.o
CC qapi/qobject-input-visitor.o
CC qapi/qobject-output-visitor.o
CC qapi/qmp-registry.o
CC qapi/qmp-dispatch.o
CC qapi/string-input-visitor.o
CC qapi/string-output-visitor.o
CC qapi/qapi-clone-visitor.o
CC qapi/opts-visitor.o
CC qapi/qmp-event.o
CC qapi/qapi-util.o
CC qobject/qnull.o
CC qobject/qnum.o
CC qobject/qstring.o
CC qobject/qdict.o
CC qobject/qlist.o
CC qobject/qbool.o
CC qobject/qlit.o
CC qobject/qjson.o
CC qobject/qobject.o
CC qobject/json-lexer.o
CC qobject/json-streamer.o
CC trace/control.o
CC qobject/json-parser.o
CC trace/qmp.o
CC util/osdep.o
CC util/cutils.o
CC util/unicode.o
CC util/qemu-timer-common.o
CC util/bufferiszero.o
CC util/lockcnt.o
CC util/aiocb.o
CC util/async.o
CC util/thread-pool.o
CC util/qemu-timer.o
CC util/main-loop.o
CC util/aio-posix.o
CC util/compatfd.o
CC util/iohandler.o
CC util/mmap-alloc.o
CC util/event_notifier-posix.o
CC util/oslib-posix.o
CC util/qemu-thread-posix.o
CC util/qemu-openpty.o
CC util/memfd.o
CC util/envlist.o
CC util/path.o
CC util/module.o
CC util/host-utils.o
CC util/bitmap.o
CC util/bitops.o
CC util/hbitmap.o
CC util/acl.o
CC util/fifo8.o
CC util/cacheinfo.o
CC util/error.o
CC util/qemu-error.o
CC util/id.o
CC util/iov.o
CC util/qemu-config.o
CC util/uri.o
CC util/qemu-sockets.o
CC util/notify.o
CC util/qemu-option.o
CC util/qemu-progress.o
CC util/keyval.o
CC util/hexdump.o
CC util/crc32c.o
CC util/uuid.o
CC util/throttle.o
CC util/getauxval.o
CC util/readline.o
CC util/rcu.o
CC util/qemu-coroutine.o
CC util/qemu-coroutine-lock.o
CC util/qemu-coroutine-io.o
CC util/qemu-coroutine-sleep.o
CC util/coroutine-ucontext.o
CC util/buffer.o
CC util/timed-average.o
CC util/base64.o
CC util/log.o
CC util/pagesize.o
CC util/qdist.o
CC util/qht.o
CC util/range.o
CC util/stats64.o
CC util/trace.o
CC util/systemd.o
CC crypto/trace.o
CC trace-root.o
CC io/trace.o
CC migration/trace.o
CC block/trace.o
CC chardev/trace.o
CC hw/block/trace.o
CC hw/block/dataplane/trace.o
CC hw/char/trace.o
CC hw/intc/trace.o
CC hw/net/trace.o
CC hw/virtio/trace.o
CC hw/audio/trace.o
CC hw/misc/trace.o
CC hw/scsi/trace.o
CC hw/usb/trace.o
CC hw/nvram/trace.o
CC hw/display/trace.o
CC hw/input/trace.o
CC hw/timer/trace.o
CC hw/dma/trace.o
CC hw/sparc/trace.o
CC hw/sd/trace.o
CC hw/isa/trace.o
CC hw/mem/trace.o
CC hw/i386/trace.o
CC hw/i386/xen/trace.o
CC hw/9pfs/trace.o
CC hw/ppc/trace.o
CC hw/pci/trace.o
CC hw/s390x/trace.o
CC hw/vfio/trace.o
CC hw/acpi/trace.o
CC hw/arm/trace.o
CC hw/alpha/trace.o
CC hw/xen/trace.o
CC hw/ide/trace.o
CC ui/trace.o
CC audio/trace.o
CC net/trace.o
CC target/arm/trace.o
CC target/i386/trace.o
CC target/mips/trace.o
CC target/sparc/trace.o
CC target/s390x/trace.o
CC target/ppc/trace.o
CC qom/trace.o
CC linux-user/trace.o
CC qapi/trace.o
CC accel/tcg/trace.o
CC accel/kvm/trace.o
CC nbd/trace.o
CC scsi/trace.o
CC crypto/pbkdf-stub.o
CC stubs/arch-query-cpu-def.o
CC stubs/arch-query-cpu-model-expansion.o
CC stubs/arch-query-cpu-model-comparison.o
CC stubs/arch-query-cpu-model-baseline.o
CC stubs/bdrv-next-monitor-owned.o
CC stubs/cpu-get-clock.o
CC stubs/blk-commit-all.o
CC stubs/cpu-get-icount.o
CC stubs/blockdev-close-all-bdrv-states.o
CC stubs/clock-warp.o
CC stubs/dump.o
CC stubs/error-printf.o
CC stubs/fdset.o
CC stubs/gdbstub.o
CC stubs/get-vm-name.o
CC stubs/iothread.o
CC stubs/iothread-lock.o
CC stubs/migr-blocker.o
CC stubs/is-daemonized.o
CC stubs/machine-init-done.o
CC stubs/change-state-handler.o
CC stubs/monitor.o
CC stubs/notify-event.o
CC stubs/qtest.o
CC stubs/replay.o
CC stubs/runstate-check.o
CC stubs/set-fd-handler.o
CC stubs/slirp.o
CC stubs/sysbus.o
CC stubs/tpm.o
CC stubs/trace-control.o
CC stubs/uuid.o
CC stubs/vm-stop.o
CC stubs/vmstate.o
CC stubs/qmp_pc_dimm.o
CC stubs/target-monitor-defs.o
CC stubs/target-get-monitor-def.o
CC stubs/pc_madt_cpu_entry.o
CC stubs/vmgenid.o
CC stubs/xen-common.o
CC stubs/xen-hvm.o
CC stubs/pci-host-piix.o
CC contrib/ivshmem-client/main.o
CC contrib/ivshmem-client/ivshmem-client.o
CC contrib/ivshmem-server/ivshmem-server.o
CC qemu-nbd.o
CC contrib/ivshmem-server/main.o
CC block.o
CC blockjob.o
CC replication.o
CC qemu-io-cmds.o
CC block/raw-format.o
CC block/qcow.o
CC block/vdi.o
CC block/cloop.o
CC block/vmdk.o
CC block/bochs.o
CC block/vpc.o
CC block/vvfat.o
CC block/dmg.o
CC block/qcow2.o
CC block/qcow2-refcount.o
CC block/qcow2-cluster.o
CC block/qcow2-snapshot.o
CC block/qcow2-cache.o
CC block/qcow2-bitmap.o
CC block/qed.o
CC block/qed-l2-cache.o
CC block/qed-table.o
CC block/qed-cluster.o
CC block/vhdx.o
CC block/qed-check.o
CC block/vhdx-endian.o
CC block/vhdx-log.o
CC block/quorum.o
CC block/parallels.o
CC block/blkdebug.o
CC block/blkverify.o
CC block/blkreplay.o
CC block/block-backend.o
CC block/qapi.o
CC block/snapshot.o
CC block/file-posix.o
CC block/null.o
CC block/mirror.o
CC block/commit.o
CC block/io.o
CC block/throttle-groups.o
CC block/nbd.o
CC block/nbd-client.o
CC block/sheepdog.o
CC block/accounting.o
CC block/dirty-bitmap.o
CC block/write-threshold.o
CC block/backup.o
CC block/replication.o
CC block/throttle.o
CC block/crypto.o
CC nbd/server.o
CC nbd/client.o
CC nbd/common.o
CC scsi/utils.o
CC scsi/pr-manager.o
CC scsi/pr-manager-helper.o
CC block/dmg-bz2.o
CC crypto/init.o
CC crypto/hash.o
CC crypto/hash-glib.o
CC crypto/hmac.o
CC crypto/hmac-glib.o
CC crypto/aes.o
CC crypto/desrfb.o
CC crypto/cipher.o
CC crypto/tlscreds.o
CC crypto/tlscredsanon.o
CC crypto/tlscredsx509.o
CC crypto/tlssession.o
CC crypto/secret.o
CC crypto/random-platform.o
CC crypto/pbkdf.o
CC crypto/ivgen-essiv.o
CC crypto/ivgen.o
CC crypto/ivgen-plain.o
CC crypto/ivgen-plain64.o
CC crypto/afsplit.o
CC crypto/xts.o
CC crypto/block-qcow.o
CC crypto/block.o
CC crypto/block-luks.o
CC io/channel.o
CC io/channel-buffer.o
CC io/channel-command.o
CC io/channel-file.o
CC io/channel-socket.o
CC io/channel-tls.o
CC io/channel-watch.o
CC io/channel-websock.o
CC io/channel-util.o
CC io/dns-resolver.o
CC io/net-listener.o
CC io/task.o
CC qom/container.o
CC qom/qom-qobject.o
CC qom/object_interfaces.o
CC qom/object.o
GEN qemu-img-cmds.h
CC qemu-io.o
CC scsi/qemu-pr-helper.o
CC qemu-bridge-helper.o
CC blockdev.o
CC blockdev-nbd.o
CC bootdevice.o
CC iothread.o
CC device-hotplug.o
CC qdev-monitor.o
CC os-posix.o
CC bt-host.o
CC bt-vhci.o
CC dma-helpers.o
CC vl.o
CC tpm.o
CC device_tree.o
CC qmp-marshal.o
CC qmp.o
CC hmp.o
CC cpus-common.o
CC audio/audio.o
CC audio/noaudio.o
CC audio/wavaudio.o
CC audio/mixeng.o
CC audio/sdlaudio.o
CC audio/ossaudio.o
CC audio/spiceaudio.o
CC backends/rng.o
CC backends/rng-egd.o
CC backends/rng-random.o
CC audio/wavcapture.o
CC backends/tpm.o
CC backends/hostmem.o
CC backends/hostmem-ram.o
CC backends/hostmem-file.o
CC backends/cryptodev.o
CC backends/cryptodev-builtin.o
CC chardev/msmouse.o
CC block/stream.o
CC chardev/wctablet.o
CC chardev/spice.o
CC chardev/testdev.o
CC disas/arm.o
CC disas/i386.o
CC fsdev/qemu-fsdev-dummy.o
CC fsdev/qemu-fsdev-opts.o
CC fsdev/qemu-fsdev-throttle.o
CC hw/acpi/core.o
CC hw/acpi/piix4.o
CC hw/acpi/pcihp.o
CC hw/acpi/ich9.o
CC hw/acpi/tco.o
CC hw/acpi/cpu_hotplug.o
CC hw/acpi/memory_hotplug.o
CC hw/acpi/cpu.o
CC hw/acpi/nvdimm.o
CC hw/acpi/vmgenid.o
CC hw/acpi/acpi_interface.o
CC hw/acpi/bios-linker-loader.o
CC hw/acpi/aml-build.o
CC hw/acpi/ipmi.o
CC hw/acpi/acpi-stub.o
CC hw/acpi/ipmi-stub.o
CC hw/audio/sb16.o
CC hw/audio/es1370.o
CC hw/audio/ac97.o
CC hw/audio/fmopl.o
CC hw/audio/adlib.o
CC hw/audio/gus.o
CC hw/audio/gusemu_hal.o
CC hw/audio/gusemu_mixer.o
CC hw/audio/cs4231a.o
CC hw/audio/intel-hda.o
CC hw/audio/hda-codec.o
CC hw/audio/pcspk.o
CC hw/audio/wm8750.o
CC hw/audio/pl041.o
CC hw/audio/lm4549.o
CC hw/audio/marvell_88w8618.o
CC hw/audio/soundhw.o
CC hw/block/cdrom.o
CC hw/block/hd-geometry.o
CC hw/block/block.o
CC hw/block/fdc.o
CC hw/block/m25p80.o
CC hw/block/nand.o
CC hw/block/pflash_cfi01.o
CC hw/block/pflash_cfi02.o
CC hw/block/xen_disk.o
CC hw/block/ecc.o
CC hw/block/onenand.o
CC hw/block/nvme.o
CC hw/bt/core.o
CC hw/bt/l2cap.o
CC hw/bt/sdp.o
CC hw/bt/hci.o
CC hw/bt/hid.o
CC hw/bt/hci-csr.o
CC hw/char/ipoctal232.o
CC hw/char/parallel.o
CC hw/char/pl011.o
CC hw/char/serial.o
CC hw/char/serial-isa.o
CC hw/char/serial-pci.o
CC hw/char/virtio-console.o
CC hw/char/xen_console.o
CC hw/char/cadence_uart.o
CC hw/char/cmsdk-apb-uart.o
CC hw/char/debugcon.o
CC hw/char/imx_serial.o
CC hw/core/qdev.o
CC hw/core/qdev-properties.o
CC hw/core/bus.o
CC hw/core/reset.o
CC hw/core/fw-path-provider.o
CC hw/core/irq.o
CC hw/core/hotplug.o
CC hw/core/nmi.o
CC hw/core/stream.o
CC hw/core/ptimer.o
CC hw/core/machine.o
CC hw/core/sysbus.o
CC hw/core/loader.o
CC hw/core/qdev-properties-system.o
CC hw/core/register.o
CC hw/core/or-irq.o
CC hw/core/platform-bus.o
CC hw/cpu/core.o
CC hw/display/ads7846.o
CC hw/display/cirrus_vga.o
CC hw/display/pl110.o
CC hw/display/ssd0303.o
CC hw/display/ssd0323.o
CC hw/display/xenfb.o
CC hw/display/vga-pci.o
CC hw/display/vga-isa.o
CC hw/display/vmware_vga.o
CC hw/display/exynos4210_fimd.o
CC hw/display/blizzard.o
CC hw/display/framebuffer.o
CC hw/display/tc6393xb.o
CC hw/display/qxl.o
CC hw/display/qxl-logger.o
CC hw/display/qxl-render.o
CC hw/dma/pl080.o
CC hw/dma/pl330.o
CC hw/dma/i8257.o
CC hw/dma/xilinx_axidma.o
CC hw/gpio/max7310.o
CC hw/dma/xlnx-zynq-devcfg.o
CC hw/gpio/pl061.o
CC hw/gpio/zaurus.o
CC hw/gpio/gpio_key.o
CC hw/i2c/core.o
CC hw/i2c/smbus.o
CC hw/i2c/smbus_eeprom.o
CC hw/i2c/i2c-ddc.o
CC hw/i2c/smbus_ich9.o
CC hw/i2c/versatile_i2c.o
CC hw/i2c/pm_smbus.o
CC hw/i2c/bitbang_i2c.o
CC hw/i2c/exynos4210_i2c.o
CC hw/i2c/imx_i2c.o
CC hw/i2c/aspeed_i2c.o
CC hw/ide/core.o
CC hw/ide/atapi.o
CC hw/ide/qdev.o
CC hw/ide/pci.o
CC hw/ide/isa.o
CC hw/ide/piix.o
CC hw/ide/microdrive.o
CC hw/ide/ahci.o
CC hw/ide/ahci-allwinner.o
CC hw/input/hid.o
CC hw/ide/ich.o
CC hw/input/lm832x.o
CC hw/input/pckbd.o
CC hw/input/pl050.o
CC hw/input/ps2.o
CC hw/input/stellaris_input.o
CC hw/input/tsc2005.o
CC hw/input/virtio-input.o
CC hw/input/virtio-input-hid.o
CC hw/input/virtio-input-host.o
CC hw/intc/i8259_common.o
CC hw/intc/i8259.o
CC hw/intc/pl190.o
CC hw/intc/imx_avic.o
CC hw/intc/realview_gic.o
CC hw/intc/ioapic_common.o
CC hw/intc/arm_gic_common.o
CC hw/intc/arm_gic.o
CC hw/intc/arm_gicv2m.o
CC hw/intc/arm_gicv3_common.o
CC hw/intc/arm_gicv3.o
CC hw/intc/arm_gicv3_dist.o
CC hw/intc/arm_gicv3_redist.o
CC hw/intc/arm_gicv3_its_common.o
CC hw/intc/intc.o
CC hw/ipack/tpci200.o
CC hw/ipack/ipack.o
CC hw/ipmi/ipmi_bmc_sim.o
CC hw/ipmi/ipmi.o
CC hw/ipmi/ipmi_bmc_extern.o
CC hw/ipmi/isa_ipmi_kcs.o
CC hw/ipmi/isa_ipmi_bt.o
CC hw/isa/isa-bus.o
CC hw/isa/apm.o
CC hw/mem/pc-dimm.o
CC hw/mem/nvdimm.o
CC hw/misc/applesmc.o
CC hw/misc/max111x.o
CC hw/misc/tmp105.o
CC hw/misc/tmp421.o
CC hw/misc/debugexit.o
CC hw/misc/sga.o
CC hw/misc/pc-testdev.o
CC hw/misc/pci-testdev.o
CC hw/misc/unimp.o
CC hw/misc/edu.o
CC hw/misc/vmcoreinfo.o
CC hw/misc/arm_l2x0.o
CC hw/misc/arm_integrator_debug.o
CC hw/misc/a9scu.o
CC hw/misc/arm11scu.o
CC hw/net/xen_nic.o
CC hw/net/ne2000.o
CC hw/net/eepro100.o
CC hw/net/pcnet-pci.o
CC hw/net/pcnet.o
CC hw/net/e1000x_common.o
CC hw/net/e1000.o
CC hw/net/net_tx_pkt.o
CC hw/net/net_rx_pkt.o
CC hw/net/e1000e.o
CC hw/net/rtl8139.o
CC hw/net/e1000e_core.o
CC hw/net/vmxnet3.o
CC hw/net/smc91c111.o
CC hw/net/lan9118.o
CC hw/net/ne2000-isa.o
CC hw/net/xilinx_axienet.o
CC hw/net/allwinner_emac.o
CC hw/net/xgmac.o
CC hw/net/imx_fec.o
CC hw/net/cadence_gem.o
CC hw/net/stellaris_enet.o
CC hw/net/ftgmac100.o
CC hw/net/rocker/rocker.o
CC hw/net/rocker/rocker_fp.o
CC hw/net/rocker/rocker_desc.o
CC hw/net/rocker/rocker_world.o
CC hw/net/rocker/rocker_of_dpa.o
CC hw/nvram/eeprom93xx.o
CC hw/nvram/eeprom_at24c.o
CC hw/nvram/fw_cfg.o
CC hw/nvram/chrp_nvram.o
CC hw/pci-bridge/pci_bridge_dev.o
CC hw/pci-bridge/pcie_root_port.o
CC hw/pci-bridge/gen_pcie_root_port.o
CC hw/pci-bridge/pcie_pci_bridge.o
CC hw/pci-bridge/pci_expander_bridge.o
CC hw/pci-bridge/xio3130_upstream.o
CC hw/pci-bridge/ioh3420.o
CC hw/pci-bridge/xio3130_downstream.o
CC hw/pci-bridge/i82801b11.o
CC hw/pci-host/pam.o
CC hw/pci-host/versatile.o
CC hw/pci-host/piix.o
CC hw/pci-host/q35.o
CC hw/pci-host/gpex.o
CC hw/pci/pci.o
CC hw/pci/pci_bridge.o
CC hw/pci/msix.o
CC hw/pci/msi.o
CC hw/pci/shpc.o
CC hw/pci/slotid_cap.o
CC hw/pci/pci_host.o
CC hw/pci/pcie_host.o
CC hw/pci/pcie_aer.o
CC hw/pci/pcie.o
CC hw/pci/pcie_port.o
CC hw/pcmcia/pcmcia.o
CC hw/scsi/scsi-disk.o
CC hw/scsi/scsi-bus.o
CC hw/scsi/scsi-generic.o
CC hw/pci/pci-stub.o
CC hw/scsi/lsi53c895a.o
CC hw/scsi/mptsas.o
CC hw/scsi/mptconfig.o
CC hw/scsi/mptendian.o
CC hw/scsi/megasas.o
CC hw/scsi/vmw_pvscsi.o
CC hw/scsi/esp.o
CC hw/scsi/esp-pci.o
CC hw/sd/pl181.o
CC hw/sd/ssi-sd.o
CC hw/sd/sd.o
CC hw/sd/core.o
CC hw/sd/sdhci.o
CC hw/smbios/smbios.o
CC hw/smbios/smbios_type_38.o
CC hw/smbios/smbios-stub.o
CC hw/smbios/smbios_type_38-stub.o
CC hw/ssi/pl022.o
CC hw/ssi/ssi.o
CC hw/ssi/xilinx_spips.o
CC hw/ssi/aspeed_smc.o
CC hw/ssi/stm32f2xx_spi.o
CC hw/ssi/mss-spi.o
CC hw/timer/arm_timer.o
CC hw/timer/arm_mptimer.o
CC hw/timer/armv7m_systick.o
CC hw/timer/a9gtimer.o
CC hw/timer/cadence_ttc.o
CC hw/timer/ds1338.o
CC hw/timer/hpet.o
CC hw/timer/i8254_common.o
CC hw/timer/i8254.o
CC hw/timer/pl031.o
CC hw/timer/twl92230.o
CC hw/timer/imx_epit.o
CC hw/timer/stm32f2xx_timer.o
CC hw/timer/imx_gpt.o
CC hw/timer/aspeed_timer.o
CC hw/timer/cmsdk-apb-timer.o
CC hw/timer/mss-timer.o
CC hw/tpm/tpm_util.o
CC hw/tpm/tpm_tis.o
CC hw/tpm/tpm_passthrough.o
CC hw/tpm/tpm_emulator.o
CC hw/usb/core.o
CC hw/usb/combined-packet.o
CC hw/usb/bus.o
CC hw/usb/libhw.o
CC hw/usb/desc-msos.o
CC hw/usb/desc.o
CC hw/usb/hcd-uhci.o
CC hw/usb/hcd-ohci.o
CC hw/usb/hcd-ehci.o
CC hw/usb/hcd-ehci-pci.o
CC hw/usb/hcd-ehci-sysbus.o
CC hw/usb/hcd-xhci.o
CC hw/usb/hcd-xhci-nec.o
CC hw/usb/hcd-musb.o
CC hw/usb/dev-hub.o
CC hw/usb/dev-hid.o
CC hw/usb/dev-wacom.o
CC hw/usb/dev-storage.o
CC hw/usb/dev-uas.o
CC hw/usb/dev-audio.o
CC hw/usb/dev-serial.o
CC hw/usb/dev-network.o
CC hw/usb/dev-bluetooth.o
CC hw/usb/dev-smartcard-reader.o
CC hw/usb/ccid-card-passthru.o
CC hw/usb/ccid-card-emulated.o
CC hw/usb/dev-mtp.o
CC hw/usb/host-stub.o
CC hw/virtio/virtio-rng.o
CC hw/virtio/virtio-pci.o
CC hw/virtio/virtio-bus.o
CC hw/virtio/virtio-mmio.o
CC hw/watchdog/watchdog.o
CC hw/virtio/vhost-stub.o
CC hw/watchdog/wdt_i6300esb.o
CC hw/watchdog/wdt_ib700.o
CC hw/watchdog/wdt_aspeed.o
CC hw/xen/xen_devconfig.o
CC hw/xen/xen_backend.o
CC hw/xen/xen_pvdev.o
CC migration/migration.o
CC hw/xen/xen-common.o
CC migration/socket.o
CC migration/fd.o
CC migration/exec.o
CC migration/tls.o
CC migration/channel.o
CC migration/savevm.o
CC migration/colo-comm.o
CC migration/colo.o
CC migration/vmstate.o
CC migration/colo-failover.o
CC migration/vmstate-types.o
CC migration/page_cache.o
CC migration/qemu-file.o
CC migration/qemu-file-channel.o
CC migration/global_state.o
CC migration/xbzrle.o
CC migration/qjson.o
CC migration/rdma.o
CC migration/postcopy-ram.o
CC migration/block.o
CC net/net.o
CC net/queue.o
CC net/checksum.o
CC net/util.o
CC net/hub.o
CC net/socket.o
CC net/dump.o
CC net/eth.o
CC net/l2tpv3.o
CC net/vhost-user.o
CC net/slirp.o
CC net/filter.o
CC net/filter-buffer.o
CC net/filter-mirror.o
CC net/colo-compare.o
CC net/colo.o
CC net/filter-rewriter.o
CC net/filter-replay.o
CC net/tap-linux.o
CC qom/cpu.o
CC net/tap.o
CC replay/replay.o
CC replay/replay-internal.o
CC replay/replay-events.o
CC replay/replay-time.o
CC replay/replay-input.o
CC replay/replay-char.o
CC replay/replay-snapshot.o
CC replay/replay-net.o
/tmp/qemu-test/src/replay/replay-internal.c: In function 'replay_put_array':
/tmp/qemu-test/src/replay/replay-internal.c:65: warning: ignoring return value of 'fwrite', declared with attribute warn_unused_result
CC replay/replay-audio.o
CC slirp/if.o
CC slirp/cksum.o
CC slirp/ip_icmp.o
CC slirp/ip6_icmp.o
CC slirp/ip6_input.o
CC slirp/ip6_output.o
CC slirp/ip_input.o
CC slirp/ip_output.o
CC slirp/dnssearch.o
CC slirp/dhcpv6.o
CC slirp/slirp.o
CC slirp/mbuf.o
CC slirp/misc.o
CC slirp/sbuf.o
CC slirp/socket.o
CC slirp/tcp_input.o
CC slirp/tcp_output.o
CC slirp/tcp_subr.o
CC slirp/udp.o
CC slirp/udp6.o
CC slirp/tcp_timer.o
CC slirp/bootp.o
CC slirp/tftp.o
/tmp/qemu-test/src/slirp/tcp_input.c: In function 'tcp_input':
/tmp/qemu-test/src/slirp/tcp_input.c:219: warning: 'save_ip.ip_p' may be used uninitialized in this function
/tmp/qemu-test/src/slirp/tcp_input.c:219: warning: 'save_ip.ip_len' may be used uninitialized in this function
/tmp/qemu-test/src/slirp/tcp_input.c:219: warning: 'save_ip.ip_tos' may be used uninitialized in this function
/tmp/qemu-test/src/slirp/tcp_input.c:219: warning: 'save_ip.ip_id' may be used uninitialized in this function
/tmp/qemu-test/src/slirp/tcp_input.c:219: warning: 'save_ip.ip_off' may be used uninitialized in this function
/tmp/qemu-test/src/slirp/tcp_input.c:219: warning: 'save_ip.ip_ttl' may be used uninitialized in this function
/tmp/qemu-test/src/slirp/tcp_input.c:219: warning: 'save_ip.ip_sum' may be used uninitialized in this function
/tmp/qemu-test/src/slirp/tcp_input.c:219: warning: 'save_ip.ip_src.s_addr' may be used uninitialized in this function
/tmp/qemu-test/src/slirp/tcp_input.c:219: warning: 'save_ip.ip_dst.s_addr' may be used uninitialized in this function
/tmp/qemu-test/src/slirp/tcp_input.c:220: warning: 'save_ip6.ip_nh' may be used uninitialized in this function
CC slirp/arp_table.o
CC slirp/ndp_table.o
CC slirp/ncsi.o
CC ui/keymaps.o
CC ui/console.o
CC ui/cursor.o
CC ui/qemu-pixman.o
CC ui/input.o
CC ui/input-keymap.o
CC ui/input-legacy.o
CC ui/input-linux.o
CC ui/spice-core.o
CC ui/spice-input.o
CC ui/spice-display.o
CC ui/sdl_zoom.o
CC ui/sdl.o
CC ui/x_keymap.o
CC ui/curses.o
CC ui/vnc.o
CC ui/vnc-enc-zlib.o
CC ui/vnc-enc-hextile.o
CC ui/vnc-enc-tight.o
CC ui/vnc-palette.o
CC ui/vnc-enc-zrle.o
CC ui/vnc-auth-vencrypt.o
CC ui/vnc-ws.o
CC ui/gtk.o
CC ui/vnc-jobs.o
VERT ui/shader/texture-blit-vert.h
VERT ui/shader/texture-blit-flip-vert.h
CC ui/console-gl.o
FRAG ui/shader/texture-blit-frag.h
CC ui/egl-helpers.o
CC ui/egl-context.o
CC ui/gtk-egl.o
CC chardev/char.o
CC chardev/char-fd.o
CC chardev/char-fe.o
CC chardev/char-file.o
CC chardev/char-io.o
CC chardev/char-mux.o
CC chardev/char-null.o
In file included from /usr/include/gtk-2.0/gtk/gtk.h:235,
from /tmp/qemu-test/src/include/ui/gtk.h:10,
from /tmp/qemu-test/src/ui/gtk-egl.c:21:
/usr/include/gtk-2.0/gtk/gtkitemfactory.h:47: warning: function declaration isn't a prototype
CC chardev/char-parallel.o
In file included from /usr/include/gtk-2.0/gtk/gtk.h:235,
from /tmp/qemu-test/src/include/ui/gtk.h:10,
from /tmp/qemu-test/src/ui/gtk.c:43:
/usr/include/gtk-2.0/gtk/gtkitemfactory.h:47: warning: function declaration isn't a prototype
CC chardev/char-pipe.o
CC chardev/char-pty.o
CC chardev/char-ringbuf.o
CC chardev/char-serial.o
CC chardev/char-socket.o
CC chardev/char-udp.o
CC chardev/char-stdio.o
LINK tests/qemu-iotests/socket_scm_helper
CC qga/guest-agent-command-state.o
CC qga/commands.o
CC qga/main.o
CC qga/commands-posix.o
CC qga/channel-posix.o
CC qga/qapi-generated/qga-qapi-types.o
CC qga/qapi-generated/qga-qapi-visit.o
CC qga/qapi-generated/qga-qmp-marshal.o
AR libqemuutil.a
CC qemu-img.o
CC ui/shader.o
AS optionrom/multiboot.o
CC optionrom/linuxboot_dma.o
AS optionrom/linuxboot.o
AS optionrom/kvmvapic.o
cc: unrecognized option '-no-integrated-as'
cc: unrecognized option '-no-integrated-as'
BUILD optionrom/linuxboot_dma.img
BUILD optionrom/linuxboot_dma.raw
SIGN optionrom/linuxboot_dma.bin
BUILD optionrom/multiboot.img
BUILD optionrom/linuxboot.img
BUILD optionrom/multiboot.raw
BUILD optionrom/kvmvapic.img
BUILD optionrom/linuxboot.raw
SIGN optionrom/multiboot.bin
BUILD optionrom/kvmvapic.raw
SIGN optionrom/linuxboot.bin
SIGN optionrom/kvmvapic.bin
LINK qemu-ga
LINK ivshmem-client
LINK ivshmem-server
LINK qemu-nbd
LINK qemu-img
LINK qemu-io
LINK scsi/qemu-pr-helper
LINK qemu-bridge-helper
GEN x86_64-softmmu/hmp-commands.h
GEN x86_64-softmmu/hmp-commands-info.h
GEN x86_64-softmmu/config-target.h
CC x86_64-softmmu/exec.o
CC x86_64-softmmu/tcg/tcg.o
CC x86_64-softmmu/tcg/tcg-op.o
CC x86_64-softmmu/tcg/tcg-common.o
CC x86_64-softmmu/disas.o
CC x86_64-softmmu/fpu/softfloat.o
CC x86_64-softmmu/tcg/optimize.o
GEN x86_64-softmmu/gdbstub-xml.c
CC x86_64-softmmu/arch_init.o
GEN aarch64-softmmu/hmp-commands.h
GEN aarch64-softmmu/hmp-commands-info.h
GEN aarch64-softmmu/config-target.h
CC x86_64-softmmu/monitor.o
CC x86_64-softmmu/cpus.o
CC x86_64-softmmu/gdbstub.o
CC x86_64-softmmu/balloon.o
CC x86_64-softmmu/ioport.o
CC x86_64-softmmu/numa.o
CC aarch64-softmmu/exec.o
CC x86_64-softmmu/qtest.o
CC x86_64-softmmu/memory.o
CC aarch64-softmmu/tcg/tcg.o
CC aarch64-softmmu/tcg/tcg-op.o
CC aarch64-softmmu/tcg/optimize.o
CC aarch64-softmmu/tcg/tcg-common.o
CC x86_64-softmmu/memory_mapping.o
CC aarch64-softmmu/fpu/softfloat.o
CC aarch64-softmmu/disas.o
GEN aarch64-softmmu/gdbstub-xml.c
CC aarch64-softmmu/arch_init.o
CC aarch64-softmmu/cpus.o
CC x86_64-softmmu/dump.o
CC aarch64-softmmu/monitor.o
CC x86_64-softmmu/migration/ram.o
CC aarch64-softmmu/gdbstub.o
CC aarch64-softmmu/balloon.o
CC aarch64-softmmu/ioport.o
CC aarch64-softmmu/numa.o
CC x86_64-softmmu/accel/accel.o
CC x86_64-softmmu/accel/kvm/kvm-all.o
CC aarch64-softmmu/qtest.o
CC aarch64-softmmu/memory.o
CC aarch64-softmmu/memory_mapping.o
CC x86_64-softmmu/accel/stubs/hax-stub.o
CC aarch64-softmmu/dump.o
CC aarch64-softmmu/migration/ram.o
CC aarch64-softmmu/accel/accel.o
CC x86_64-softmmu/accel/tcg/tcg-all.o
CC aarch64-softmmu/accel/stubs/hax-stub.o
CC x86_64-softmmu/accel/tcg/cputlb.o
CC x86_64-softmmu/accel/tcg/tcg-runtime.o
CC x86_64-softmmu/accel/tcg/cpu-exec.o
CC aarch64-softmmu/accel/stubs/kvm-stub.o
CC x86_64-softmmu/accel/tcg/cpu-exec-common.o
CC aarch64-softmmu/accel/tcg/tcg-all.o
CC x86_64-softmmu/accel/tcg/translate-all.o
CC x86_64-softmmu/accel/tcg/translator.o
CC aarch64-softmmu/accel/tcg/cputlb.o
CC aarch64-softmmu/accel/tcg/tcg-runtime.o
CC x86_64-softmmu/hw/block/virtio-blk.o
CC x86_64-softmmu/hw/block/dataplane/virtio-blk.o
CC x86_64-softmmu/hw/char/virtio-serial-bus.o
CC x86_64-softmmu/hw/core/generic-loader.o
CC aarch64-softmmu/accel/tcg/cpu-exec.o
CC aarch64-softmmu/accel/tcg/cpu-exec-common.o
CC aarch64-softmmu/accel/tcg/translate-all.o
CC aarch64-softmmu/accel/tcg/translator.o
CC aarch64-softmmu/hw/adc/stm32f2xx_adc.o
CC aarch64-softmmu/hw/block/virtio-blk.o
CC aarch64-softmmu/hw/block/dataplane/virtio-blk.o
CC aarch64-softmmu/hw/char/exynos4210_uart.o
CC aarch64-softmmu/hw/char/omap_uart.o
CC x86_64-softmmu/hw/core/null-machine.o
CC x86_64-softmmu/hw/display/vga.o
CC aarch64-softmmu/hw/char/digic-uart.o
CC aarch64-softmmu/hw/char/stm32f2xx_usart.o
CC x86_64-softmmu/hw/display/virtio-gpu.o
CC aarch64-softmmu/hw/char/bcm2835_aux.o
CC aarch64-softmmu/hw/char/virtio-serial-bus.o
CC aarch64-softmmu/hw/core/generic-loader.o
CC aarch64-softmmu/hw/core/null-machine.o
CC x86_64-softmmu/hw/display/virtio-gpu-3d.o
CC aarch64-softmmu/hw/cpu/arm11mpcore.o
CC aarch64-softmmu/hw/cpu/realview_mpcore.o
CC aarch64-softmmu/hw/cpu/a9mpcore.o
CC aarch64-softmmu/hw/cpu/a15mpcore.o
CC x86_64-softmmu/hw/display/virtio-gpu-pci.o
CC aarch64-softmmu/hw/display/omap_dss.o
CC aarch64-softmmu/hw/display/omap_lcdc.o
CC aarch64-softmmu/hw/display/pxa2xx_lcd.o
CC aarch64-softmmu/hw/display/bcm2835_fb.o
CC aarch64-softmmu/hw/display/vga.o
CC x86_64-softmmu/hw/display/virtio-vga.o
CC aarch64-softmmu/hw/display/virtio-gpu.o
CC aarch64-softmmu/hw/display/virtio-gpu-3d.o
CC x86_64-softmmu/hw/intc/apic.o
CC aarch64-softmmu/hw/display/virtio-gpu-pci.o
CC aarch64-softmmu/hw/display/dpcd.o
CC aarch64-softmmu/hw/dma/xlnx_dpdma.o
CC aarch64-softmmu/hw/dma/omap_dma.o
CC aarch64-softmmu/hw/display/xlnx_dp.o
CC aarch64-softmmu/hw/dma/soc_dma.o
CC aarch64-softmmu/hw/dma/pxa2xx_dma.o
CC aarch64-softmmu/hw/dma/bcm2835_dma.o
CC aarch64-softmmu/hw/gpio/omap_gpio.o
CC x86_64-softmmu/hw/intc/apic_common.o
CC aarch64-softmmu/hw/gpio/imx_gpio.o
CC x86_64-softmmu/hw/intc/ioapic.o
CC aarch64-softmmu/hw/gpio/bcm2835_gpio.o
CC aarch64-softmmu/hw/i2c/omap_i2c.o
CC aarch64-softmmu/hw/input/pxa2xx_keypad.o
CC aarch64-softmmu/hw/input/tsc210x.o
CC x86_64-softmmu/hw/isa/lpc_ich9.o
CC aarch64-softmmu/hw/intc/armv7m_nvic.o
CC x86_64-softmmu/hw/misc/ivshmem.o
CC aarch64-softmmu/hw/intc/exynos4210_gic.o
CC aarch64-softmmu/hw/intc/exynos4210_combiner.o
CC aarch64-softmmu/hw/intc/omap_intc.o
CC x86_64-softmmu/hw/misc/pvpanic.o
CC aarch64-softmmu/hw/intc/bcm2835_ic.o
CC aarch64-softmmu/hw/intc/bcm2836_control.o
CC aarch64-softmmu/hw/intc/allwinner-a10-pic.o
CC aarch64-softmmu/hw/intc/aspeed_vic.o
CC x86_64-softmmu/hw/misc/hyperv_testdev.o
CC aarch64-softmmu/hw/intc/arm_gicv3_cpuif.o
CC aarch64-softmmu/hw/misc/ivshmem.o
CC x86_64-softmmu/hw/misc/mmio_interface.o
CC x86_64-softmmu/hw/net/virtio-net.o
CC aarch64-softmmu/hw/misc/arm_sysctl.o
CC x86_64-softmmu/hw/net/vhost_net.o
CC aarch64-softmmu/hw/misc/cbus.o
CC aarch64-softmmu/hw/misc/exynos4210_pmu.o
CC aarch64-softmmu/hw/misc/exynos4210_clk.o
CC aarch64-softmmu/hw/misc/exynos4210_rng.o
CC x86_64-softmmu/hw/scsi/virtio-scsi.o
CC x86_64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC aarch64-softmmu/hw/misc/imx_ccm.o
CC aarch64-softmmu/hw/misc/imx31_ccm.o
CC aarch64-softmmu/hw/misc/imx25_ccm.o
CC x86_64-softmmu/hw/scsi/vhost-scsi-common.o
CC aarch64-softmmu/hw/misc/imx6_ccm.o
CC aarch64-softmmu/hw/misc/imx6_src.o
CC aarch64-softmmu/hw/misc/mst_fpga.o
CC x86_64-softmmu/hw/scsi/vhost-scsi.o
CC x86_64-softmmu/hw/scsi/vhost-user-scsi.o
CC x86_64-softmmu/hw/timer/mc146818rtc.o
CC aarch64-softmmu/hw/misc/omap_clk.o
CC aarch64-softmmu/hw/misc/omap_gpmc.o
CC aarch64-softmmu/hw/misc/omap_l4.o
CC x86_64-softmmu/hw/vfio/common.o
CC aarch64-softmmu/hw/misc/omap_sdrc.o
CC x86_64-softmmu/hw/vfio/pci.o
CC x86_64-softmmu/hw/vfio/pci-quirks.o
CC aarch64-softmmu/hw/misc/omap_tap.o
CC aarch64-softmmu/hw/misc/bcm2835_mbox.o
CC x86_64-softmmu/hw/vfio/platform.o
CC aarch64-softmmu/hw/misc/bcm2835_property.o
CC x86_64-softmmu/hw/vfio/spapr.o
CC x86_64-softmmu/hw/virtio/virtio.o
CC aarch64-softmmu/hw/misc/bcm2835_rng.o
CC x86_64-softmmu/hw/virtio/virtio-balloon.o
CC x86_64-softmmu/hw/virtio/vhost.o
CC aarch64-softmmu/hw/misc/zynq_slcr.o
CC aarch64-softmmu/hw/misc/zynq-xadc.o
CC aarch64-softmmu/hw/misc/stm32f2xx_syscfg.o
CC aarch64-softmmu/hw/misc/mps2-scc.o
CC x86_64-softmmu/hw/virtio/vhost-backend.o
CC x86_64-softmmu/hw/virtio/vhost-user.o
CC aarch64-softmmu/hw/misc/auxbus.o
CC x86_64-softmmu/hw/virtio/vhost-vsock.o
CC x86_64-softmmu/hw/virtio/virtio-crypto.o
CC aarch64-softmmu/hw/misc/aspeed_scu.o
CC x86_64-softmmu/hw/virtio/virtio-crypto-pci.o
CC aarch64-softmmu/hw/misc/mmio_interface.o
CC aarch64-softmmu/hw/misc/aspeed_sdmc.o
CC x86_64-softmmu/hw/xen/xen-host-pci-device.o
CC aarch64-softmmu/hw/misc/msf2-sysreg.o
CC x86_64-softmmu/hw/xen/xen_pt.o
CC aarch64-softmmu/hw/net/virtio-net.o
CC aarch64-softmmu/hw/net/vhost_net.o
CC x86_64-softmmu/hw/xen/xen_pt_config_init.o
CC aarch64-softmmu/hw/pcmcia/pxa2xx.o
CC aarch64-softmmu/hw/scsi/virtio-scsi.o
CC x86_64-softmmu/hw/xen/xen_pt_graphics.o
CC aarch64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC aarch64-softmmu/hw/scsi/vhost-scsi-common.o
CC x86_64-softmmu/hw/xen/xen_pt_msi.o
CC aarch64-softmmu/hw/scsi/vhost-scsi.o
CC x86_64-softmmu/hw/xen/xen_pt_load_rom.o
CC aarch64-softmmu/hw/scsi/vhost-user-scsi.o
CC aarch64-softmmu/hw/sd/omap_mmc.o
CC x86_64-softmmu/hw/i386/multiboot.o
CC x86_64-softmmu/hw/i386/pc.o
CC aarch64-softmmu/hw/sd/pxa2xx_mmci.o
CC x86_64-softmmu/hw/i386/pc_piix.o
CC aarch64-softmmu/hw/sd/bcm2835_sdhost.o
CC aarch64-softmmu/hw/ssi/omap_spi.o
CC aarch64-softmmu/hw/ssi/imx_spi.o
CC x86_64-softmmu/hw/i386/pc_q35.o
CC aarch64-softmmu/hw/timer/exynos4210_mct.o
CC x86_64-softmmu/hw/i386/pc_sysfw.o
/tmp/qemu-test/src/hw/i386/pc_piix.c: In function 'igd_passthrough_isa_bridge_create':
/tmp/qemu-test/src/hw/i386/pc_piix.c:1073: warning: 'pch_rev_id' may be used uninitialized in this function
CC aarch64-softmmu/hw/timer/exynos4210_pwm.o
CC x86_64-softmmu/hw/i386/x86-iommu.o
CC aarch64-softmmu/hw/timer/exynos4210_rtc.o
CC aarch64-softmmu/hw/timer/omap_gptimer.o
CC x86_64-softmmu/hw/i386/intel_iommu.o
CC x86_64-softmmu/hw/i386/amd_iommu.o
CC x86_64-softmmu/hw/i386/vmport.o
CC aarch64-softmmu/hw/timer/omap_synctimer.o
CC x86_64-softmmu/hw/i386/vmmouse.o
CC x86_64-softmmu/hw/i386/kvmvapic.o
CC aarch64-softmmu/hw/timer/pxa2xx_timer.o
CC aarch64-softmmu/hw/timer/digic-timer.o
CC x86_64-softmmu/hw/i386/acpi-build.o
CC aarch64-softmmu/hw/timer/allwinner-a10-pit.o
CC x86_64-softmmu/hw/i386/../xenpv/xen_machine_pv.o
CC x86_64-softmmu/hw/i386/kvm/clock.o
CC aarch64-softmmu/hw/usb/tusb6010.o
/tmp/qemu-test/src/hw/i386/acpi-build.c: In function 'build_append_pci_bus_devices':
/tmp/qemu-test/src/hw/i386/acpi-build.c:509: warning: 'notify_method' may be used uninitialized in this function
CC x86_64-softmmu/hw/i386/kvm/apic.o
CC aarch64-softmmu/hw/vfio/common.o
CC x86_64-softmmu/hw/i386/kvm/i8259.o
CC aarch64-softmmu/hw/vfio/pci.o
CC x86_64-softmmu/hw/i386/kvm/ioapic.o
CC aarch64-softmmu/hw/vfio/pci-quirks.o
CC x86_64-softmmu/hw/i386/kvm/i8254.o
CC aarch64-softmmu/hw/vfio/platform.o
CC aarch64-softmmu/hw/vfio/calxeda-xgmac.o
CC x86_64-softmmu/hw/i386/xen/xen_platform.o
CC aarch64-softmmu/hw/vfio/amd-xgbe.o
CC aarch64-softmmu/hw/vfio/spapr.o
CC x86_64-softmmu/hw/i386/xen/xen_apic.o
CC x86_64-softmmu/hw/i386/xen/xen_pvdevice.o
CC aarch64-softmmu/hw/virtio/virtio.o
CC x86_64-softmmu/hw/i386/xen/xen-hvm.o
CC aarch64-softmmu/hw/virtio/virtio-balloon.o
CC x86_64-softmmu/hw/i386/xen/xen-mapcache.o
CC aarch64-softmmu/hw/virtio/vhost.o
CC x86_64-softmmu/target/i386/helper.o
CC aarch64-softmmu/hw/virtio/vhost-backend.o
CC aarch64-softmmu/hw/virtio/vhost-user.o
CC x86_64-softmmu/target/i386/cpu.o
CC aarch64-softmmu/hw/virtio/vhost-vsock.o
CC aarch64-softmmu/hw/virtio/virtio-crypto.o
CC aarch64-softmmu/hw/virtio/virtio-crypto-pci.o
CC x86_64-softmmu/target/i386/gdbstub.o
CC aarch64-softmmu/hw/arm/boot.o
CC x86_64-softmmu/target/i386/xsave_helper.o
CC x86_64-softmmu/target/i386/translate.o
CC x86_64-softmmu/target/i386/bpt_helper.o
CC aarch64-softmmu/hw/arm/collie.o
CC x86_64-softmmu/target/i386/cc_helper.o
CC aarch64-softmmu/hw/arm/exynos4_boards.o
CC x86_64-softmmu/target/i386/excp_helper.o
CC aarch64-softmmu/hw/arm/highbank.o
CC aarch64-softmmu/hw/arm/gumstix.o
CC x86_64-softmmu/target/i386/fpu_helper.o
CC aarch64-softmmu/hw/arm/digic_boards.o
CC aarch64-softmmu/hw/arm/integratorcp.o
CC x86_64-softmmu/target/i386/int_helper.o
CC aarch64-softmmu/hw/arm/mainstone.o
CC x86_64-softmmu/target/i386/mem_helper.o
CC aarch64-softmmu/hw/arm/musicpal.o
CC x86_64-softmmu/target/i386/misc_helper.o
CC aarch64-softmmu/hw/arm/nseries.o
CC aarch64-softmmu/hw/arm/omap_sx1.o
CC aarch64-softmmu/hw/arm/palm.o
CC aarch64-softmmu/hw/arm/realview.o
CC x86_64-softmmu/target/i386/mpx_helper.o
CC aarch64-softmmu/hw/arm/spitz.o
CC aarch64-softmmu/hw/arm/stellaris.o
CC x86_64-softmmu/target/i386/seg_helper.o
CC aarch64-softmmu/hw/arm/versatilepb.o
CC x86_64-softmmu/target/i386/smm_helper.o
CC aarch64-softmmu/hw/arm/tosa.o
CC aarch64-softmmu/hw/arm/vexpress.o
CC x86_64-softmmu/target/i386/svm_helper.o
CC aarch64-softmmu/hw/arm/virt.o
CC x86_64-softmmu/target/i386/machine.o
CC x86_64-softmmu/target/i386/arch_memory_mapping.o
CC x86_64-softmmu/target/i386/arch_dump.o
CC x86_64-softmmu/target/i386/monitor.o
CC aarch64-softmmu/hw/arm/xilinx_zynq.o
CC x86_64-softmmu/target/i386/kvm.o
CC aarch64-softmmu/hw/arm/z2.o
CC x86_64-softmmu/target/i386/hyperv.o
CC aarch64-softmmu/hw/arm/virt-acpi-build.o
GEN trace/generated-helpers.c
CC x86_64-softmmu/trace/control-target.o
CC aarch64-softmmu/hw/arm/netduino2.o
CC aarch64-softmmu/hw/arm/sysbus-fdt.o
CC aarch64-softmmu/hw/arm/armv7m.o
CC aarch64-softmmu/hw/arm/exynos4210.o
CC aarch64-softmmu/hw/arm/pxa2xx.o
CC aarch64-softmmu/hw/arm/pxa2xx_gpio.o
CC x86_64-softmmu/gdbstub-xml.o
CC aarch64-softmmu/hw/arm/pxa2xx_pic.o
CC aarch64-softmmu/hw/arm/digic.o
CC aarch64-softmmu/hw/arm/omap1.o
CC aarch64-softmmu/hw/arm/omap2.o
CC aarch64-softmmu/hw/arm/allwinner-a10.o
CC aarch64-softmmu/hw/arm/cubieboard.o
CC aarch64-softmmu/hw/arm/strongarm.o
CC aarch64-softmmu/hw/arm/bcm2835_peripherals.o
CC x86_64-softmmu/trace/generated-helpers.o
CC aarch64-softmmu/hw/arm/bcm2836.o
CC aarch64-softmmu/hw/arm/raspi.o
CC aarch64-softmmu/hw/arm/stm32f205_soc.o
CC aarch64-softmmu/hw/arm/xlnx-zynqmp.o
CC aarch64-softmmu/hw/arm/xlnx-zcu102.o
CC aarch64-softmmu/hw/arm/fsl-imx25.o
CC aarch64-softmmu/hw/arm/imx25_pdk.o
CC aarch64-softmmu/hw/arm/fsl-imx31.o
LINK x86_64-softmmu/qemu-system-x86_64
CC aarch64-softmmu/hw/arm/fsl-imx6.o
CC aarch64-softmmu/hw/arm/kzm.o
CC aarch64-softmmu/hw/arm/sabrelite.o
CC aarch64-softmmu/hw/arm/aspeed_soc.o
CC aarch64-softmmu/hw/arm/aspeed.o
CC aarch64-softmmu/hw/arm/mps2.o
CC aarch64-softmmu/hw/arm/msf2-soc.o
CC aarch64-softmmu/hw/arm/msf2-som.o
CC aarch64-softmmu/target/arm/arm-semi.o
CC aarch64-softmmu/target/arm/machine.o
CC aarch64-softmmu/target/arm/psci.o
CC aarch64-softmmu/target/arm/arch_dump.o
CC aarch64-softmmu/target/arm/monitor.o
CC aarch64-softmmu/target/arm/kvm-stub.o
CC aarch64-softmmu/target/arm/translate.o
CC aarch64-softmmu/target/arm/op_helper.o
CC aarch64-softmmu/target/arm/helper.o
CC aarch64-softmmu/target/arm/cpu.o
CC aarch64-softmmu/target/arm/neon_helper.o
CC aarch64-softmmu/target/arm/iwmmxt_helper.o
CC aarch64-softmmu/target/arm/gdbstub.o
CC aarch64-softmmu/target/arm/cpu64.o
CC aarch64-softmmu/target/arm/translate-a64.o
CC aarch64-softmmu/target/arm/helper-a64.o
CC aarch64-softmmu/target/arm/crypto_helper.o
CC aarch64-softmmu/target/arm/gdbstub64.o
CC aarch64-softmmu/target/arm/arm-powerctl.o
/tmp/qemu-test/src/target/arm/translate-a64.c: In function 'handle_shri_with_rndacc':
/tmp/qemu-test/src/target/arm/translate-a64.c:6392: warning: 'tcg_src_hi' may be used uninitialized in this function
/tmp/qemu-test/src/target/arm/translate-a64.c: In function 'disas_simd_scalar_two_reg_misc':
/tmp/qemu-test/src/target/arm/translate-a64.c:8119: warning: 'rmode' may be used uninitialized in this function
GEN trace/generated-helpers.c
CC aarch64-softmmu/trace/control-target.o
CC aarch64-softmmu/gdbstub-xml.o
CC aarch64-softmmu/trace/generated-helpers.o
LINK aarch64-softmmu/qemu-system-aarch64
mkdir -p dtc/libfdt
mkdir -p dtc/tests
TEST tests/qapi-schema/alternate-any.out
TEST tests/qapi-schema/alternate-array.out
TEST tests/qapi-schema/alternate-base.out
TEST tests/qapi-schema/alternate-clash.out
TEST tests/qapi-schema/alternate-conflict-dict.out
TEST tests/qapi-schema/alternate-conflict-enum-int.out
TEST tests/qapi-schema/alternate-conflict-enum-bool.out
TEST tests/qapi-schema/alternate-conflict-string.out
TEST tests/qapi-schema/alternate-conflict-bool-string.out
TEST tests/qapi-schema/alternate-conflict-num-string.out
TEST tests/qapi-schema/alternate-empty.out
TEST tests/qapi-schema/alternate-nested.out
TEST tests/qapi-schema/alternate-unknown.out
TEST tests/qapi-schema/args-alternate.out
TEST tests/qapi-schema/args-any.out
TEST tests/qapi-schema/args-array-empty.out
TEST tests/qapi-schema/args-array-unknown.out
TEST tests/qapi-schema/args-bad-boxed.out
TEST tests/qapi-schema/args-boxed-anon.out
TEST tests/qapi-schema/args-boxed-empty.out
TEST tests/qapi-schema/args-boxed-string.out
TEST tests/qapi-schema/args-int.out
TEST tests/qapi-schema/args-invalid.out
TEST tests/qapi-schema/args-member-array-bad.out
TEST tests/qapi-schema/args-member-case.out
TEST tests/qapi-schema/args-member-unknown.out
TEST tests/qapi-schema/args-name-clash.out
TEST tests/qapi-schema/args-union.out
TEST tests/qapi-schema/args-unknown.out
TEST tests/qapi-schema/bad-base.out
TEST tests/qapi-schema/bad-data.out
TEST tests/qapi-schema/bad-ident.out
TEST tests/qapi-schema/bad-type-bool.out
TEST tests/qapi-schema/bad-type-dict.out
TEST tests/qapi-schema/bad-type-int.out
TEST tests/qapi-schema/base-cycle-direct.out
TEST tests/qapi-schema/base-cycle-indirect.out
TEST tests/qapi-schema/command-int.out
TEST tests/qapi-schema/comments.out
TEST tests/qapi-schema/doc-bad-alternate-member.out
TEST tests/qapi-schema/doc-bad-command-arg.out
TEST tests/qapi-schema/doc-bad-section.out
TEST tests/qapi-schema/doc-bad-symbol.out
TEST tests/qapi-schema/doc-bad-union-member.out
TEST tests/qapi-schema/doc-before-include.out
TEST tests/qapi-schema/doc-before-pragma.out
TEST tests/qapi-schema/doc-duplicated-arg.out
TEST tests/qapi-schema/doc-duplicated-return.out
TEST tests/qapi-schema/doc-duplicated-since.out
TEST tests/qapi-schema/doc-empty-arg.out
TEST tests/qapi-schema/doc-empty-section.out
TEST tests/qapi-schema/doc-empty-symbol.out
TEST tests/qapi-schema/doc-good.out
TEST tests/qapi-schema/doc-interleaved-section.out
TEST tests/qapi-schema/doc-invalid-end.out
TEST tests/qapi-schema/doc-invalid-end2.out
TEST tests/qapi-schema/doc-invalid-return.out
TEST tests/qapi-schema/doc-invalid-section.out
TEST tests/qapi-schema/doc-invalid-start.out
TEST tests/qapi-schema/doc-missing-colon.out
TEST tests/qapi-schema/doc-missing-expr.out
TEST tests/qapi-schema/doc-missing-space.out
TEST tests/qapi-schema/doc-missing.out
TEST tests/qapi-schema/double-data.out
TEST tests/qapi-schema/doc-no-symbol.out
TEST tests/qapi-schema/double-type.out
TEST tests/qapi-schema/duplicate-key.out
TEST tests/qapi-schema/empty.out
TEST tests/qapi-schema/enum-bad-name.out
TEST tests/qapi-schema/enum-bad-prefix.out
TEST tests/qapi-schema/enum-clash-member.out
TEST tests/qapi-schema/enum-dict-member.out
TEST tests/qapi-schema/enum-int-member.out
TEST tests/qapi-schema/enum-member-case.out
TEST tests/qapi-schema/enum-missing-data.out
TEST tests/qapi-schema/enum-wrong-data.out
TEST tests/qapi-schema/escape-outside-string.out
TEST tests/qapi-schema/escape-too-big.out
TEST tests/qapi-schema/escape-too-short.out
TEST tests/qapi-schema/event-boxed-empty.out
TEST tests/qapi-schema/event-case.out
TEST tests/qapi-schema/event-nest-struct.out
TEST tests/qapi-schema/flat-union-array-branch.out
TEST tests/qapi-schema/flat-union-bad-base.out
TEST tests/qapi-schema/flat-union-bad-discriminator.out
TEST tests/qapi-schema/flat-union-base-any.out
TEST tests/qapi-schema/flat-union-base-union.out
TEST tests/qapi-schema/flat-union-clash-member.out
TEST tests/qapi-schema/flat-union-empty.out
TEST tests/qapi-schema/flat-union-incomplete-branch.out
TEST tests/qapi-schema/flat-union-inline.out
TEST tests/qapi-schema/flat-union-int-branch.out
TEST tests/qapi-schema/flat-union-invalid-branch-key.out
TEST tests/qapi-schema/flat-union-invalid-discriminator.out
TEST tests/qapi-schema/flat-union-no-base.out
TEST tests/qapi-schema/flat-union-optional-discriminator.out
TEST tests/qapi-schema/flat-union-string-discriminator.out
TEST tests/qapi-schema/funny-char.out
TEST tests/qapi-schema/ident-with-escape.out
TEST tests/qapi-schema/include-before-err.out
TEST tests/qapi-schema/include-cycle.out
TEST tests/qapi-schema/include-extra-junk.out
TEST tests/qapi-schema/include-format-err.out
TEST tests/qapi-schema/include-nested-err.out
TEST tests/qapi-schema/include-no-file.out
TEST tests/qapi-schema/include-non-file.out
TEST tests/qapi-schema/include-relpath.out
TEST tests/qapi-schema/include-repetition.out
TEST tests/qapi-schema/include-self-cycle.out
TEST tests/qapi-schema/include-simple.out
TEST tests/qapi-schema/indented-expr.out
TEST tests/qapi-schema/leading-comma-list.out
TEST tests/qapi-schema/leading-comma-object.out
TEST tests/qapi-schema/missing-colon.out
TEST tests/qapi-schema/missing-comma-list.out
TEST tests/qapi-schema/missing-comma-object.out
TEST tests/qapi-schema/missing-type.out
TEST tests/qapi-schema/nested-struct-data.out
TEST tests/qapi-schema/non-objects.out
TEST tests/qapi-schema/pragma-doc-required-crap.out
TEST tests/qapi-schema/pragma-extra-junk.out
TEST tests/qapi-schema/pragma-name-case-whitelist-crap.out
TEST tests/qapi-schema/pragma-non-dict.out
TEST tests/qapi-schema/pragma-returns-whitelist-crap.out
TEST tests/qapi-schema/qapi-schema-test.out
TEST tests/qapi-schema/quoted-structural-chars.out
TEST tests/qapi-schema/redefined-builtin.out
TEST tests/qapi-schema/redefined-command.out
TEST tests/qapi-schema/redefined-event.out
TEST tests/qapi-schema/redefined-type.out
TEST tests/qapi-schema/reserved-command-q.out
TEST tests/qapi-schema/reserved-enum-q.out
TEST tests/qapi-schema/reserved-member-has.out
TEST tests/qapi-schema/reserved-member-q.out
TEST tests/qapi-schema/reserved-member-u.out
TEST tests/qapi-schema/reserved-member-underscore.out
TEST tests/qapi-schema/reserved-type-kind.out
TEST tests/qapi-schema/reserved-type-list.out
TEST tests/qapi-schema/returns-alternate.out
TEST tests/qapi-schema/returns-array-bad.out
TEST tests/qapi-schema/returns-dict.out
TEST tests/qapi-schema/returns-unknown.out
TEST tests/qapi-schema/returns-whitelist.out
TEST tests/qapi-schema/struct-base-clash-deep.out
TEST tests/qapi-schema/struct-base-clash.out
TEST tests/qapi-schema/struct-data-invalid.out
TEST tests/qapi-schema/struct-member-invalid.out
TEST tests/qapi-schema/trailing-comma-list.out
TEST tests/qapi-schema/trailing-comma-object.out
TEST tests/qapi-schema/type-bypass-bad-gen.out
TEST tests/qapi-schema/unclosed-list.out
TEST tests/qapi-schema/unclosed-object.out
TEST tests/qapi-schema/unclosed-string.out
TEST tests/qapi-schema/unicode-str.out
TEST tests/qapi-schema/union-base-empty.out
TEST tests/qapi-schema/union-base-no-discriminator.out
TEST tests/qapi-schema/union-branch-case.out
TEST tests/qapi-schema/union-clash-branches.out
TEST tests/qapi-schema/union-empty.out
TEST tests/qapi-schema/union-invalid-base.out
TEST tests/qapi-schema/union-optional-branch.out
TEST tests/qapi-schema/union-unknown.out
TEST tests/qapi-schema/unknown-escape.out
TEST tests/qapi-schema/unknown-expr-key.out
GEN tests/qapi-schema/doc-good.test.texi
CC tests/check-qdict.o
CC tests/test-char.o
CC tests/check-qnum.o
CC tests/check-qstring.o
CC tests/check-qlist.o
CC tests/check-qnull.o
CC tests/check-qobject.o
CC tests/check-qlit.o
CC tests/check-qjson.o
GEN tests/test-qapi-types.c
GEN tests/test-qapi-visit.c
CC tests/test-qobject-output-visitor.o
GEN tests/test-qmp-introspect.c
GEN tests/test-qapi-event.c
CC tests/test-clone-visitor.o
CC tests/test-qobject-input-visitor.o
CC tests/test-qmp-commands.o
GEN tests/test-qmp-marshal.c
CC tests/test-string-input-visitor.o
CC tests/test-string-output-visitor.o
CC tests/test-qmp-event.o
CC tests/test-opts-visitor.o
CC tests/test-coroutine.o
CC tests/iothread.o
CC tests/test-visitor-serialization.o
CC tests/test-iov.o
CC tests/test-aio.o
CC tests/test-aio-multithread.o
CC tests/test-throttle.o
CC tests/test-thread-pool.o
CC tests/test-hbitmap.o
CC tests/test-blockjob.o
CC tests/test-blockjob-txn.o
CC tests/test-x86-cpuid.o
CC tests/test-xbzrle.o
CC tests/test-vmstate.o
CC tests/test-cutils.o
CC tests/test-shift128.o
CC tests/test-mul64.o
CC tests/test-int128.o
CC tests/rcutorture.o
CC tests/test-rcu-list.o
/tmp/qemu-test/src/tests/test-int128.c:180: warning: '__noclone__' attribute directive ignored
CC tests/test-qdist.o
CC tests/test-qht.o
CC tests/test-qht-par.o
CC tests/qht-bench.o
CC tests/test-bitops.o
CC tests/test-bitcnt.o
CC tests/check-qom-interface.o
CC tests/check-qom-proplist.o
CC tests/test-qemu-opts.o
CC tests/test-keyval.o
CC tests/test-write-threshold.o
CC tests/test-crypto-hash.o
CC tests/test-crypto-hmac.o
CC tests/test-crypto-cipher.o
CC tests/test-crypto-secret.o
CC tests/test-qga.o
CC tests/libqtest.o
CC tests/test-io-task.o
CC tests/test-io-channel-socket.o
CC tests/test-timed-average.o
CC tests/io-channel-helpers.o
CC tests/test-io-channel-file.o
CC tests/test-io-channel-command.o
CC tests/test-io-channel-buffer.o
CC tests/test-base64.o
CC tests/test-crypto-ivgen.o
CC tests/test-crypto-afsplit.o
CC tests/test-crypto-xts.o
CC tests/test-crypto-block.o
CC tests/test-logging.o
CC tests/test-replication.o
CC tests/test-bufferiszero.o
CC tests/test-uuid.o
CC tests/ptimer-test-stubs.o
CC tests/test-qapi-util.o
CC tests/ptimer-test.o
CC tests/vhost-user-test.o
CC tests/libqos/pci.o
CC tests/libqos/fw_cfg.o
CC tests/libqos/malloc.o
CC tests/libqos/i2c.o
CC tests/libqos/libqos.o
CC tests/libqos/malloc-spapr.o
CC tests/libqos/libqos-spapr.o
CC tests/libqos/rtas.o
CC tests/libqos/pci-spapr.o
CC tests/libqos/malloc-pc.o
CC tests/libqos/pci-pc.o
CC tests/libqos/libqos-pc.o
CC tests/libqos/ahci.o
CC tests/libqos/virtio.o
CC tests/libqos/virtio-pci.o
CC tests/libqos/virtio-mmio.o
CC tests/libqos/malloc-generic.o
CC tests/endianness-test.o
CC tests/fdc-test.o
CC tests/ide-test.o
CC tests/ahci-test.o
CC tests/hd-geo-test.o
CC tests/boot-order-test.o
CC tests/bios-tables-test.o
CC tests/boot-sector.o
CC tests/acpi-utils.o
CC tests/boot-serial-test.o
CC tests/pxe-test.o
CC tests/rtc-test.o
CC tests/ipmi-kcs-test.o
CC tests/ipmi-bt-test.o
CC tests/i440fx-test.o
CC tests/fw_cfg-test.o
CC tests/drive_del-test.o
CC tests/wdt_ib700-test.o
CC tests/tco-test.o
CC tests/e1000-test.o
CC tests/e1000e-test.o
CC tests/rtl8139-test.o
CC tests/pcnet-test.o
CC tests/eepro100-test.o
CC tests/ne2000-test.o
CC tests/nvme-test.o
CC tests/ac97-test.o
CC tests/es1370-test.o
CC tests/virtio-net-test.o
CC tests/virtio-balloon-test.o
CC tests/virtio-blk-test.o
CC tests/virtio-rng-test.o
CC tests/virtio-scsi-test.o
CC tests/virtio-console-test.o
CC tests/virtio-serial-test.o
CC tests/tpci200-test.o
CC tests/ipoctal232-test.o
CC tests/display-vga-test.o
CC tests/intel-hda-test.o
CC tests/ivshmem-test.o
CC tests/megasas-test.o
CC tests/pvpanic-test.o
CC tests/vmxnet3-test.o
CC tests/i82801b11-test.o
CC tests/ioh3420-test.o
CC tests/usb-hcd-ohci-test.o
CC tests/libqos/usb.o
CC tests/usb-hcd-uhci-test.o
CC tests/usb-hcd-ehci-test.o
CC tests/usb-hcd-xhci-test.o
CC tests/pc-cpu-test.o
CC tests/q35-test.o
CC tests/vmgenid-test.o
CC tests/test-netfilter.o
CC tests/test-filter-mirror.o
CC tests/test-filter-redirector.o
CC tests/migration-test.o
CC tests/test-x86-cpuid-compat.o
CC tests/numa-test.o
CC tests/qmp-test.o
CC tests/device-introspect-test.o
CC tests/qom-test.o
CC tests/test-hmp.o
LINK tests/check-qdict
LINK tests/test-char
LINK tests/check-qnum
LINK tests/check-qstring
LINK tests/check-qlist
LINK tests/check-qnull
LINK tests/check-qobject
LINK tests/check-qjson
LINK tests/check-qlit
CC tests/test-qapi-visit.o
CC tests/test-qapi-types.o
CC tests/test-qapi-event.o
CC tests/test-qmp-introspect.o
CC tests/test-qmp-marshal.o
LINK tests/test-string-input-visitor
LINK tests/test-string-output-visitor
LINK tests/test-qmp-event
LINK tests/test-opts-visitor
LINK tests/test-coroutine
LINK tests/test-visitor-serialization
LINK tests/test-iov
LINK tests/test-aio
LINK tests/test-aio-multithread
LINK tests/test-throttle
LINK tests/test-thread-pool
LINK tests/test-hbitmap
LINK tests/test-blockjob
LINK tests/test-x86-cpuid
LINK tests/test-blockjob-txn
LINK tests/test-xbzrle
LINK tests/test-vmstate
LINK tests/test-cutils
LINK tests/test-shift128
LINK tests/test-mul64
LINK tests/test-int128
LINK tests/rcutorture
LINK tests/test-rcu-list
LINK tests/test-qdist
LINK tests/test-qht
LINK tests/qht-bench
LINK tests/test-bitops
LINK tests/test-bitcnt
LINK tests/check-qom-interface
LINK tests/check-qom-proplist
LINK tests/test-qemu-opts
LINK tests/test-keyval
LINK tests/test-write-threshold
LINK tests/test-crypto-hash
LINK tests/test-crypto-hmac
LINK tests/test-crypto-cipher
LINK tests/test-crypto-secret
LINK tests/test-qga
LINK tests/test-timed-average
LINK tests/test-io-task
LINK tests/test-io-channel-socket
LINK tests/test-io-channel-file
LINK tests/test-io-channel-command
LINK tests/test-io-channel-buffer
LINK tests/test-base64
LINK tests/test-crypto-ivgen
LINK tests/test-crypto-afsplit
LINK tests/test-crypto-xts
LINK tests/test-crypto-block
LINK tests/test-logging
LINK tests/test-replication
LINK tests/test-bufferiszero
LINK tests/test-uuid
LINK tests/ptimer-test
LINK tests/test-qapi-util
LINK tests/vhost-user-test
LINK tests/endianness-test
LINK tests/fdc-test
LINK tests/ide-test
LINK tests/ahci-test
LINK tests/hd-geo-test
LINK tests/boot-order-test
LINK tests/bios-tables-test
LINK tests/boot-serial-test
LINK tests/pxe-test
LINK tests/rtc-test
LINK tests/ipmi-kcs-test
LINK tests/ipmi-bt-test
LINK tests/i440fx-test
LINK tests/fw_cfg-test
LINK tests/drive_del-test
LINK tests/wdt_ib700-test
LINK tests/tco-test
LINK tests/e1000-test
LINK tests/e1000e-test
LINK tests/rtl8139-test
LINK tests/pcnet-test
LINK tests/eepro100-test
LINK tests/ne2000-test
LINK tests/nvme-test
LINK tests/ac97-test
LINK tests/es1370-test
LINK tests/virtio-net-test
LINK tests/virtio-balloon-test
LINK tests/virtio-blk-test
LINK tests/virtio-rng-test
LINK tests/virtio-scsi-test
LINK tests/virtio-serial-test
LINK tests/virtio-console-test
LINK tests/tpci200-test
LINK tests/ipoctal232-test
LINK tests/display-vga-test
LINK tests/intel-hda-test
LINK tests/ivshmem-test
LINK tests/megasas-test
LINK tests/vmxnet3-test
LINK tests/pvpanic-test
LINK tests/i82801b11-test
LINK tests/ioh3420-test
LINK tests/usb-hcd-ohci-test
LINK tests/usb-hcd-uhci-test
LINK tests/usb-hcd-ehci-test
LINK tests/usb-hcd-xhci-test
LINK tests/pc-cpu-test
LINK tests/q35-test
LINK tests/vmgenid-test
LINK tests/test-netfilter
LINK tests/test-filter-mirror
LINK tests/test-filter-redirector
LINK tests/migration-test
LINK tests/test-x86-cpuid-compat
LINK tests/numa-test
LINK tests/qmp-test
LINK tests/device-introspect-test
LINK tests/qom-test
LINK tests/test-hmp
GTESTER tests/check-qdict
GTESTER tests/check-qstring
GTESTER tests/check-qlist
GTESTER tests/check-qnull
GTESTER tests/check-qnum
GTESTER tests/test-char
GTESTER tests/check-qobject
GTESTER tests/check-qjson
GTESTER tests/check-qlit
LINK tests/test-qobject-output-visitor
LINK tests/test-clone-visitor
LINK tests/test-qobject-input-visitor
LINK tests/test-qmp-commands
GTESTER tests/test-string-output-visitor
GTESTER tests/test-string-input-visitor
GTESTER tests/test-opts-visitor
GTESTER tests/test-qmp-event
GTESTER tests/test-coroutine
GTESTER tests/test-visitor-serialization
GTESTER tests/test-iov
GTESTER tests/test-aio
GTESTER tests/test-aio-multithread
GTESTER tests/test-throttle
GTESTER tests/test-thread-pool
GTESTER tests/test-hbitmap
GTESTER tests/test-blockjob
GTESTER tests/test-blockjob-txn
GTESTER tests/test-x86-cpuid
GTESTER tests/test-xbzrle
GTESTER tests/test-vmstate
Failed to load simple/primitive:b_1
Failed to load simple/primitive:i64_2
Failed to load simple/primitive:i32_1
Failed to load simple/primitive:i32_1
Failed to load test/with_tmp:a
Failed to load test/tmp_child_parent:f
Failed to load test/tmp_child:parent
Failed to load test/with_tmp:tmp
Failed to load test/tmp_child:diff
Failed to load test/with_tmp:tmp
Failed to load test/tmp_child:diff
Failed to load test/with_tmp:tmp
GTESTER tests/test-cutils
GTESTER tests/test-shift128
GTESTER tests/test-mul64
GTESTER tests/test-int128
GTESTER tests/rcutorture
GTESTER tests/test-rcu-list
GTESTER tests/test-qdist
GTESTER tests/test-qht
LINK tests/test-qht-par
GTESTER tests/test-bitops
GTESTER tests/test-bitcnt
GTESTER tests/check-qom-interface
GTESTER tests/check-qom-proplist
GTESTER tests/test-qemu-opts
GTESTER tests/test-keyval
GTESTER tests/test-write-threshold
GTESTER tests/test-crypto-hash
GTESTER tests/test-crypto-hmac
GTESTER tests/test-crypto-cipher
GTESTER tests/test-crypto-secret
GTESTER tests/test-qga
GTESTER tests/test-timed-average
GTESTER tests/test-io-task
GTESTER tests/test-io-channel-socket
GTESTER tests/test-io-channel-file
GTESTER tests/test-io-channel-command
GTESTER tests/test-io-channel-buffer
GTESTER tests/test-base64
GTESTER tests/test-crypto-ivgen
GTESTER tests/test-crypto-afsplit
GTESTER tests/test-crypto-xts
GTESTER tests/test-crypto-block
GTESTER tests/test-logging
GTESTER tests/test-replication
**
ERROR:/tmp/qemu-test/src/tests/rcutorture.c:388:gtest_stress: assertion failed (n_mberror == 0): (1 == 0)
GTester: last random seed: R02Sa0330dfc86b19214cd02dad01b6c7673
make: *** [check-tests/rcutorture] Error 1
make: *** Waiting for unfinished jobs....
Traceback (most recent call last):
File "./tests/docker/docker.py", line 407, in <module>
sys.exit(main())
File "./tests/docker/docker.py", line 404, in main
return args.cmdobj.run(args, argv)
File "./tests/docker/docker.py", line 261, in run
return Docker().run(argv, args.keep, quiet=args.quiet)
File "./tests/docker/docker.py", line 229, in run
quiet=quiet)
File "./tests/docker/docker.py", line 147, in _do_check
return subprocess.check_call(self._command + cmd, **kwargs)
File "/usr/lib64/python2.7/subprocess.py", line 186, in check_call
raise CalledProcessError(retcode, cmd)
subprocess.CalledProcessError: Command '['docker', 'run', '--label', 'com.qemu.instance.uuid=7558abb0ef5c11e7bcaf52540069c830', '-u', '0', '--security-opt', 'seccomp=unconfined', '--rm', '--net=none', '-e', 'TARGET_LIST=', '-e', 'EXTRA_CONFIGURE_OPTS=', '-e', 'V=', '-e', 'J=8', '-e', 'DEBUG=', '-e', 'SHOW_ENV=1', '-e', 'CCACHE_DIR=/var/tmp/ccache', '-v', '/root/.cache/qemu-docker-ccache:/var/tmp/ccache:z', '-v', '/var/tmp/patchew-tester-tmp-zk7_6_vw/src/docker-src.2018-01-01-20.29.52.21597:/var/tmp/qemu:z,ro', 'qemu:centos6', '/var/tmp/qemu/run', 'test-quick']' returned non-zero exit status 2
make[1]: *** [tests/docker/Makefile.include:129: docker-run] Error 1
make[1]: Leaving directory '/var/tmp/patchew-tester-tmp-zk7_6_vw/src'
make: *** [tests/docker/Makefile.include:163: docker-run-test-quick@centos6] Error 2
real 1m59.399s
user 0m4.019s
sys 0m2.995s
=== OUTPUT END ===
Test command exited with code: 2
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@freelists.org
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 01/17] target-m68k: sync CC_OP before gen_jmp_tb()
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 01/17] target-m68k: sync CC_OP before gen_jmp_tb() Laurent Vivier
@ 2018-01-02 16:01 ` Richard Henderson
0 siblings, 0 replies; 42+ messages in thread
From: Richard Henderson @ 2018-01-02 16:01 UTC (permalink / raw
To: Laurent Vivier, qemu-devel; +Cc: Thomas Huth
On 01/01/2018 05:10 PM, Laurent Vivier wrote:
> And remove update_cc_op() from gen_exception() because there is
> one in gen_jmp_im().
>
> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
> ---
> target/m68k/translate.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 02/17] target/m68k: fix gen_get_ccr()
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 02/17] target/m68k: fix gen_get_ccr() Laurent Vivier
@ 2018-01-02 16:04 ` Richard Henderson
0 siblings, 0 replies; 42+ messages in thread
From: Richard Henderson @ 2018-01-02 16:04 UTC (permalink / raw
To: Laurent Vivier, qemu-devel; +Cc: Thomas Huth
On 01/01/2018 05:10 PM, Laurent Vivier wrote:
> As gen_helper_get_ccr() is able to compute CCR from cc_op and
> flags, we don't need to flush flags before to call it.
> flush_flags() and get_ccr() use COMPUTE_CCR() to compute
> flags. get_ccr() computes CCR value,
> whereas flush_flags update live cc_op and flags.
>
> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
> ---
> target/m68k/translate.c | 1 -
> 1 file changed, 1 deletion(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 03/17] linux-user, m68k: correctly manage SR in context
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 03/17] linux-user, m68k: correctly manage SR in context Laurent Vivier
@ 2018-01-02 16:06 ` Richard Henderson
0 siblings, 0 replies; 42+ messages in thread
From: Richard Henderson @ 2018-01-02 16:06 UTC (permalink / raw
To: Laurent Vivier, qemu-devel; +Cc: Thomas Huth
On 01/01/2018 05:10 PM, Laurent Vivier wrote:
> Use cpu_m68k_get_ccr()/cpu_m68k_set_ccr() to setup and restore correctly
> the value of SR in the context structure. Fix target_rt_setup_ucontext().
>
> Fixes: 3219de458c ("linux-user: correctly manage SR in ucontext")
> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
> ---
> linux-user/signal.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 04/17] target-m68k: use insn_pc to generate instruction fault address
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 04/17] target-m68k: use insn_pc to generate instruction fault address Laurent Vivier
@ 2018-01-02 16:08 ` Richard Henderson
0 siblings, 0 replies; 42+ messages in thread
From: Richard Henderson @ 2018-01-02 16:08 UTC (permalink / raw
To: Laurent Vivier, qemu-devel; +Cc: Thomas Huth
On 01/01/2018 05:10 PM, Laurent Vivier wrote:
> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
> ---
> target/m68k/translate.c | 40 ++++++++++++++++++++--------------------
> 1 file changed, 20 insertions(+), 20 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 05/17] target/m68k: add CPU_LOG_INT trace
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 05/17] target/m68k: add CPU_LOG_INT trace Laurent Vivier
@ 2018-01-02 16:10 ` Richard Henderson
2018-01-02 18:37 ` Laurent Vivier
0 siblings, 1 reply; 42+ messages in thread
From: Richard Henderson @ 2018-01-02 16:10 UTC (permalink / raw
To: Laurent Vivier, qemu-devel; +Cc: Thomas Huth
On 01/01/2018 05:10 PM, Laurent Vivier wrote:
> Display the interrupts/exceptions information
> in QEMU logs (-d int)
>
> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> + if (qemu_loglevel_mask(CPU_LOG_INT)) {
> + static int count;
> + qemu_log("INT %6d: %s(%#x) pc=%08x sp=%08x sr=%04x\n",
> + ++count, m68k_exception_name(cs->exception_index),
> + vector, env->pc, env->aregs[7], env->sr);
> + }
> +
> fmt |= 0x40000000;
> fmt |= vector << 16;
> fmt |= env->sr;
Just so long as you're aware that you're printing the SR without CCR here...
r~
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 06/17] target/m68k: manage 680x0 stack frames
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 06/17] target/m68k: manage 680x0 stack frames Laurent Vivier
@ 2018-01-02 16:16 ` Richard Henderson
0 siblings, 0 replies; 42+ messages in thread
From: Richard Henderson @ 2018-01-02 16:16 UTC (permalink / raw
To: Laurent Vivier, qemu-devel; +Cc: Thomas Huth
On 01/01/2018 05:10 PM, Laurent Vivier wrote:
> 680x0 manages several stack frame formats:
> - format 0: four-word stack frame
> - format 1: four-word throwaway stack frame
> - format 2: six-word stack frame
> - format 3: Floating-Point post-instruction stack frame
> - format 4: eight-word stack frame
> - format 7: access-error stack frame
>
> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
> ---
> target/m68k/op_helper.c | 158 +++++++++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 155 insertions(+), 3 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 07/17] target/m68k: add chk and chk2
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 07/17] target/m68k: add chk and chk2 Laurent Vivier
@ 2018-01-02 16:41 ` Richard Henderson
2018-01-02 23:33 ` Laurent Vivier
0 siblings, 1 reply; 42+ messages in thread
From: Richard Henderson @ 2018-01-02 16:41 UTC (permalink / raw
To: Laurent Vivier, qemu-devel; +Cc: Thomas Huth
On 01/01/2018 05:10 PM, Laurent Vivier wrote:
> + SRC_EA(env, tsrc, opsize, 1, NULL);
> + src = tcg_temp_local_new();
> + tcg_gen_mov_i32(src, tsrc);
> +
> + reg = tcg_temp_local_new();
> + gen_ext(reg, DREG(insn, 9), opsize, 1);
> + gen_flush_flags(s);
> + update_cc_op(s);
> +
> + l1 = gen_new_label();
> + l2 = gen_new_label();
> + tcg_gen_brcondi_i32(TCG_COND_GE, reg, 0, l1);
> + tcg_gen_movi_i32(QREG_CC_N, -1);
> + tcg_gen_movi_i32(QREG_PC, s->pc);
> + gen_raise_exception(EXCP_CHK);
> + tcg_gen_br(l2);
Unreachable branch after exception.
> + gen_set_label(l1);
> + tcg_gen_brcond_i32(TCG_COND_LE, reg, src, l2);
> + tcg_gen_movi_i32(QREG_CC_N, 0);
> + tcg_gen_movi_i32(QREG_PC, s->pc);
> + gen_raise_exception(EXCP_CHK);
> + gen_set_label(l2);
> + tcg_temp_free(src);
> + tcg_temp_free(reg);
Does real hardware not change flags at all if the chk passes? The manual says
it is undefined, which would greatly simplify all this. Especially just
assigning reg to CC_N...
Generally I put conditional traps like this into a helper, which allows
straight-line optimization of the non-trapping path to continue. In this case,
something like
void HELPER(chk)(CPUM68kState *env, int32_t val, int32_t ub)
{
if (val < 0 || val > ub) {
CPUState *cs = CPU(m68k_env_get_cpu(env));
/* Recover PC and CC_OP for the beginning of the insn. */
cpu_restore_state(cs, GETPC());
/* Adjust PC and FLAGS to end of the insn. */
env->pc += 2;
helper_flush_flags(env, env->cc_op);
env->cc_n = val;
cs->exception_index = EXCP_CHK;
cpu_loop_exit(cs);
}
}
r~
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 08/17] target/m68k: add move16
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 08/17] target/m68k: add move16 Laurent Vivier
@ 2018-01-02 16:50 ` Richard Henderson
2018-01-02 18:42 ` Laurent Vivier
0 siblings, 1 reply; 42+ messages in thread
From: Richard Henderson @ 2018-01-02 16:50 UTC (permalink / raw
To: Laurent Vivier, qemu-devel; +Cc: Thomas Huth
On 01/01/2018 05:10 PM, Laurent Vivier wrote:
> + mode = (insn >> 3) & 7;
> +
> + if (mode & 4) {
Looks like mode should equal 4 as well.
r~
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 09/17] target/m68k: softmmu cleanup
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 09/17] target/m68k: softmmu cleanup Laurent Vivier
@ 2018-01-02 16:52 ` Richard Henderson
0 siblings, 0 replies; 42+ messages in thread
From: Richard Henderson @ 2018-01-02 16:52 UTC (permalink / raw
To: Laurent Vivier, qemu-devel; +Cc: Thomas Huth
On 01/01/2018 05:10 PM, Laurent Vivier wrote:
> don't compile supervisor only instructions in linux-user mode
>
> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
> ---
> target/m68k/translate.c | 37 ++++++++++++++++++++++++++++++++-----
> 1 file changed, 32 insertions(+), 5 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 10/17] target/m68k: add cpush/cinv
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 10/17] target/m68k: add cpush/cinv Laurent Vivier
@ 2018-01-02 16:53 ` Richard Henderson
0 siblings, 0 replies; 42+ messages in thread
From: Richard Henderson @ 2018-01-02 16:53 UTC (permalink / raw
To: Laurent Vivier, qemu-devel; +Cc: Thomas Huth
On 01/01/2018 05:10 PM, Laurent Vivier wrote:
> Add cache lines invalidate and cache lines push
> as no-op operations, as we don't have cache.
>
> These instructions are 68040 only.
>
> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
> ---
> target/m68k/translate.c | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 11/17] target/m68k: add reset
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 11/17] target/m68k: add reset Laurent Vivier
@ 2018-01-02 16:54 ` Richard Henderson
0 siblings, 0 replies; 42+ messages in thread
From: Richard Henderson @ 2018-01-02 16:54 UTC (permalink / raw
To: Laurent Vivier, qemu-devel; +Cc: Thomas Huth
On 01/01/2018 05:10 PM, Laurent Vivier wrote:
> The instruction traps if the CPU is not in
> Supervisor state but the helper is empty because
> there is no easy way to reset all the peripherals
> without resetting the CPU itself.
>
> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
> ---
> target/m68k/helper.c | 7 +++++++
> target/m68k/helper.h | 4 ++++
> target/m68k/translate.c | 13 +++++++++++++
> 3 files changed, 24 insertions(+)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 12/17] target/m68k: implement fsave/frestore
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 12/17] target/m68k: implement fsave/frestore Laurent Vivier
@ 2018-01-02 16:58 ` Richard Henderson
0 siblings, 0 replies; 42+ messages in thread
From: Richard Henderson @ 2018-01-02 16:58 UTC (permalink / raw
To: Laurent Vivier, qemu-devel; +Cc: Thomas Huth
On 01/01/2018 05:10 PM, Laurent Vivier wrote:
> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
> ---
> target/m68k/translate.c | 23 +++++++++++++++--------
> 1 file changed, 15 insertions(+), 8 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 13/17] target/m68k: move CCR/SR functions
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 13/17] target/m68k: move CCR/SR functions Laurent Vivier
@ 2018-01-02 17:00 ` Richard Henderson
0 siblings, 0 replies; 42+ messages in thread
From: Richard Henderson @ 2018-01-02 17:00 UTC (permalink / raw
To: Laurent Vivier, qemu-devel; +Cc: Thomas Huth
On 01/01/2018 05:10 PM, Laurent Vivier wrote:
> The following patches will be clearer if we move
> functions before adding new ones.
>
> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
> ---
> target/m68k/translate.c | 111 ++++++++++++++++++++++++------------------------
> 1 file changed, 55 insertions(+), 56 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 14/17] target/m68k: add 680x0 "move to SR" instruction
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 14/17] target/m68k: add 680x0 "move to SR" instruction Laurent Vivier
@ 2018-01-02 17:02 ` Richard Henderson
0 siblings, 0 replies; 42+ messages in thread
From: Richard Henderson @ 2018-01-02 17:02 UTC (permalink / raw
To: Laurent Vivier, qemu-devel; +Cc: Thomas Huth
On 01/01/2018 05:10 PM, Laurent Vivier wrote:
> Some cleanup, and allows SR to be moved from any addressing mode.
> Previous code was wrong for coldfire: coldfire also allows to
> use addressing mode to set SR/CCR. It only supports Data register
> to get SR/CCR (move from)
>
> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
> ---
> target/m68k/translate.c | 38 ++++++++++++++++++++++----------------
> 1 file changed, 22 insertions(+), 16 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 15/17] target/m68k: add andi/ori/eori to SR/CCR
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 15/17] target/m68k: add andi/ori/eori to SR/CCR Laurent Vivier
@ 2018-01-02 17:06 ` Richard Henderson
0 siblings, 0 replies; 42+ messages in thread
From: Richard Henderson @ 2018-01-02 17:06 UTC (permalink / raw
To: Laurent Vivier, qemu-devel; +Cc: Thomas Huth
On 01/01/2018 05:10 PM, Laurent Vivier wrote:
> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
> ---
> target/m68k/translate.c | 53 ++++++++++++++++++++++++++++++++++++++++++-------
> 1 file changed, 46 insertions(+), 7 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 16/17] target/m68k: add the Interrupt Stack Pointer
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 16/17] target/m68k: add the Interrupt Stack Pointer Laurent Vivier
@ 2018-01-02 17:13 ` Richard Henderson
2018-01-02 18:50 ` Laurent Vivier
0 siblings, 1 reply; 42+ messages in thread
From: Richard Henderson @ 2018-01-02 17:13 UTC (permalink / raw
To: Laurent Vivier, qemu-devel; +Cc: Thomas Huth
On 01/01/2018 05:10 PM, Laurent Vivier wrote:
> env->sr = tmp;
> + m68k_switch_sp(env);
I would much prefer a cpu_m68k_set_sr here, akin to cpu_m68k_set_ccr.
r~
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 17/17] target/m68k: fix m68k_cpu_dump_state()
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 17/17] target/m68k: fix m68k_cpu_dump_state() Laurent Vivier
@ 2018-01-02 17:14 ` Richard Henderson
0 siblings, 0 replies; 42+ messages in thread
From: Richard Henderson @ 2018-01-02 17:14 UTC (permalink / raw
To: Laurent Vivier, qemu-devel; +Cc: Thomas Huth
On 01/01/2018 05:10 PM, Laurent Vivier wrote:
> Display correctly the Trace bits for 680x0
> (2 bits instead of 1 for Coldfire).
>
> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
> ---
> target/m68k/cpu.h | 3 ++-
> target/m68k/translate.c | 9 ++++++---
> 2 files changed, 8 insertions(+), 4 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 05/17] target/m68k: add CPU_LOG_INT trace
2018-01-02 16:10 ` Richard Henderson
@ 2018-01-02 18:37 ` Laurent Vivier
0 siblings, 0 replies; 42+ messages in thread
From: Laurent Vivier @ 2018-01-02 18:37 UTC (permalink / raw
To: Richard Henderson, qemu-devel; +Cc: Thomas Huth
Le 02/01/2018 à 17:10, Richard Henderson a écrit :
> On 01/01/2018 05:10 PM, Laurent Vivier wrote:
>> Display the interrupts/exceptions information
>> in QEMU logs (-d int)
>>
>> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
>
>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>
>> + if (qemu_loglevel_mask(CPU_LOG_INT)) {
>> + static int count;
>> + qemu_log("INT %6d: %s(%#x) pc=%08x sp=%08x sr=%04x\n",
>> + ++count, m68k_exception_name(cs->exception_index),
>> + vector, env->pc, env->aregs[7], env->sr);
>> + }
>> +
>> fmt |= 0x40000000;
>> fmt |= vector << 16;
>> fmt |= env->sr;
>
> Just so long as you're aware that you're printing the SR without CCR here...
I will update the qemu_log() to have the real SR value with the CCR.
Thanks,
Laurent
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 08/17] target/m68k: add move16
2018-01-02 16:50 ` Richard Henderson
@ 2018-01-02 18:42 ` Laurent Vivier
2018-01-02 23:49 ` Richard Henderson
0 siblings, 1 reply; 42+ messages in thread
From: Laurent Vivier @ 2018-01-02 18:42 UTC (permalink / raw
To: Richard Henderson, qemu-devel; +Cc: Thomas Huth
Le 02/01/2018 à 17:50, Richard Henderson a écrit :
> On 01/01/2018 05:10 PM, Laurent Vivier wrote:
>> + mode = (insn >> 3) & 7;
>> +
>> + if (mode & 4) {
>
> Looks like mode should equal 4 as well.
>
Yes, you're right. I will replace the line by:
+ if (mode == 4) {
Thanks,
Laurent
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 16/17] target/m68k: add the Interrupt Stack Pointer
2018-01-02 17:13 ` Richard Henderson
@ 2018-01-02 18:50 ` Laurent Vivier
0 siblings, 0 replies; 42+ messages in thread
From: Laurent Vivier @ 2018-01-02 18:50 UTC (permalink / raw
To: Richard Henderson, qemu-devel; +Cc: Thomas Huth
Le 02/01/2018 à 18:13, Richard Henderson a écrit :
> On 01/01/2018 05:10 PM, Laurent Vivier wrote:
>> env->sr = tmp;
>> + m68k_switch_sp(env);
>
> I would much prefer a cpu_m68k_set_sr here, akin to cpu_m68k_set_ccr.
Yes, it's a good idea, I also use several times helper_set_sr()
directly, I will replace them by a cpu_m68k_set_sr().
Thanks,
Laurent
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 07/17] target/m68k: add chk and chk2
2018-01-02 16:41 ` Richard Henderson
@ 2018-01-02 23:33 ` Laurent Vivier
0 siblings, 0 replies; 42+ messages in thread
From: Laurent Vivier @ 2018-01-02 23:33 UTC (permalink / raw
To: Richard Henderson, qemu-devel; +Cc: Thomas Huth
Le 02/01/2018 à 17:41, Richard Henderson a écrit :
> On 01/01/2018 05:10 PM, Laurent Vivier wrote:
>> + SRC_EA(env, tsrc, opsize, 1, NULL);
>> + src = tcg_temp_local_new();
>> + tcg_gen_mov_i32(src, tsrc);
>> +
>> + reg = tcg_temp_local_new();
>> + gen_ext(reg, DREG(insn, 9), opsize, 1);
>> + gen_flush_flags(s);
>> + update_cc_op(s);
>> +
>> + l1 = gen_new_label();
>> + l2 = gen_new_label();
>> + tcg_gen_brcondi_i32(TCG_COND_GE, reg, 0, l1);
>> + tcg_gen_movi_i32(QREG_CC_N, -1);
>> + tcg_gen_movi_i32(QREG_PC, s->pc);
>> + gen_raise_exception(EXCP_CHK);
>> + tcg_gen_br(l2);
>
> Unreachable branch after exception.
>
>> + gen_set_label(l1);
>> + tcg_gen_brcond_i32(TCG_COND_LE, reg, src, l2);
>> + tcg_gen_movi_i32(QREG_CC_N, 0);
>> + tcg_gen_movi_i32(QREG_PC, s->pc);
>> + gen_raise_exception(EXCP_CHK);
>> + gen_set_label(l2);
>> + tcg_temp_free(src);
>> + tcg_temp_free(reg);
>
> Does real hardware not change flags at all if the chk passes? The manual says
Real hardware (68040) always clears N if reg > 0.
> it is undefined, which would greatly simplify all this. Especially just
> assigning reg to CC_N...
>
> Generally I put conditional traps like this into a helper, which allows
> straight-line optimization of the non-trapping path to continue. In this case,
> something like
>
> void HELPER(chk)(CPUM68kState *env, int32_t val, int32_t ub)
> {
> if (val < 0 || val > ub) {
> CPUState *cs = CPU(m68k_env_get_cpu(env));
>
> /* Recover PC and CC_OP for the beginning of the insn. */
> cpu_restore_state(cs, GETPC());
>
> /* Adjust PC and FLAGS to end of the insn. */
> env->pc += 2;
> helper_flush_flags(env, env->cc_op);
> env->cc_n = val;
>
> cs->exception_index = EXCP_CHK;
> cpu_loop_exit(cs);
> }
> }
Even with assigning reg directly to CC_N the use of an helper seems
better. I'm going to update the patch with your helper, and add one for
chk2 too.
Thanks,
Laurent
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 08/17] target/m68k: add move16
2018-01-02 18:42 ` Laurent Vivier
@ 2018-01-02 23:49 ` Richard Henderson
2018-01-02 23:53 ` Laurent Vivier
0 siblings, 1 reply; 42+ messages in thread
From: Richard Henderson @ 2018-01-02 23:49 UTC (permalink / raw
To: Laurent Vivier, qemu-devel; +Cc: Thomas Huth
On 01/02/2018 10:42 AM, Laurent Vivier wrote:
> Le 02/01/2018 à 17:50, Richard Henderson a écrit :
>> On 01/01/2018 05:10 PM, Laurent Vivier wrote:
>>> + mode = (insn >> 3) & 7;
>>> +
>>> + if (mode & 4) {
>>
>> Looks like mode should equal 4 as well.
>>
>
> Yes, you're right. I will replace the line by:
>
> + if (mode == 4) {
Well, not quite. Surely,
if (mode & 4) {
if (mode != 4) {
illegal opcode
r~
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PATCH v5 08/17] target/m68k: add move16
2018-01-02 23:49 ` Richard Henderson
@ 2018-01-02 23:53 ` Laurent Vivier
0 siblings, 0 replies; 42+ messages in thread
From: Laurent Vivier @ 2018-01-02 23:53 UTC (permalink / raw
To: Richard Henderson, qemu-devel; +Cc: Thomas Huth
Le 03/01/2018 à 00:49, Richard Henderson a écrit :
> On 01/02/2018 10:42 AM, Laurent Vivier wrote:
>> Le 02/01/2018 à 17:50, Richard Henderson a écrit :
>>> On 01/01/2018 05:10 PM, Laurent Vivier wrote:
>>>> + mode = (insn >> 3) & 7;
>>>> +
>>>> + if (mode & 4) {
>>>
>>> Looks like mode should equal 4 as well.
>>>
>>
>> Yes, you're right. I will replace the line by:
>>
>> + if (mode == 4) {
>
> Well, not quite. Surely,
>
> if (mode & 4) {
> if (mode != 4) {
> illegal opcode
I've split the instruction in two parts to manage the illegal opcode in
the opcode table.
Thanks,
Laurent
^ permalink raw reply [flat|nested] 42+ messages in thread
end of thread, other threads:[~2018-01-02 23:53 UTC | newest]
Thread overview: 42+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-01-02 1:10 [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) Laurent Vivier
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 01/17] target-m68k: sync CC_OP before gen_jmp_tb() Laurent Vivier
2018-01-02 16:01 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 02/17] target/m68k: fix gen_get_ccr() Laurent Vivier
2018-01-02 16:04 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 03/17] linux-user, m68k: correctly manage SR in context Laurent Vivier
2018-01-02 16:06 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 04/17] target-m68k: use insn_pc to generate instruction fault address Laurent Vivier
2018-01-02 16:08 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 05/17] target/m68k: add CPU_LOG_INT trace Laurent Vivier
2018-01-02 16:10 ` Richard Henderson
2018-01-02 18:37 ` Laurent Vivier
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 06/17] target/m68k: manage 680x0 stack frames Laurent Vivier
2018-01-02 16:16 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 07/17] target/m68k: add chk and chk2 Laurent Vivier
2018-01-02 16:41 ` Richard Henderson
2018-01-02 23:33 ` Laurent Vivier
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 08/17] target/m68k: add move16 Laurent Vivier
2018-01-02 16:50 ` Richard Henderson
2018-01-02 18:42 ` Laurent Vivier
2018-01-02 23:49 ` Richard Henderson
2018-01-02 23:53 ` Laurent Vivier
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 09/17] target/m68k: softmmu cleanup Laurent Vivier
2018-01-02 16:52 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 10/17] target/m68k: add cpush/cinv Laurent Vivier
2018-01-02 16:53 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 11/17] target/m68k: add reset Laurent Vivier
2018-01-02 16:54 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 12/17] target/m68k: implement fsave/frestore Laurent Vivier
2018-01-02 16:58 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 13/17] target/m68k: move CCR/SR functions Laurent Vivier
2018-01-02 17:00 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 14/17] target/m68k: add 680x0 "move to SR" instruction Laurent Vivier
2018-01-02 17:02 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 15/17] target/m68k: add andi/ori/eori to SR/CCR Laurent Vivier
2018-01-02 17:06 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 16/17] target/m68k: add the Interrupt Stack Pointer Laurent Vivier
2018-01-02 17:13 ` Richard Henderson
2018-01-02 18:50 ` Laurent Vivier
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 17/17] target/m68k: fix m68k_cpu_dump_state() Laurent Vivier
2018-01-02 17:14 ` Richard Henderson
2018-01-02 1:31 ` [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) no-reply
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