diff for duplicates of <BN6PR11MB40687428F0D0F3B5F13EA3E0C37B9@BN6PR11MB4068.namprd11.prod.outlook.com> diff --git a/a/1.txt b/N1/1.txt index f2e4e59..96876f8 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -111,7 +111,3 @@ vSVA support in this the per-ioasid SVA operation model. thoughts? Regards, Yi Liu -_______________________________________________ -iommu mailing list -iommu@lists.linux-foundation.org -https://lists.linuxfoundation.org/mailman/listinfo/iommu diff --git a/a/content_digest b/N1/content_digest index 1a638bb..eeb9d15 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -47,25 +47,29 @@ "To\0Jason Gunthorpe <jgg\@nvidia.com>\0" ] [ - "Cc\0Jean-Philippe Brucker <jean-philippe\@linaro.org>", - " Tian", + "Cc\0Tian", " Kevin <kevin.tian\@intel.com>", - " Alex Williamson <alex.williamson\@redhat.com>", - " Raj", - " Ashok <ashok.raj\@intel.com>", - " Jonathan Corbet <corbet\@lwn.net>", - " Jean-Philippe Brucker <jean-philippe\@linaro.com>", + " Jacob Pan <jacob.jun.pan\@linux.intel.com>", + " Jean-Philippe Brucker <jean-philippe\@linaro.org>", " LKML <linux-kernel\@vger.kernel.org>", - " Jiang", - " Dave <dave.jiang\@intel.com>", + " Joerg Roedel <joro\@8bytes.org>", + " Lu Baolu <baolu.lu\@linux.intel.com>", + " David Woodhouse <dwmw2\@infradead.org>", " iommu\@lists.linux-foundation.org <iommu\@lists.linux-foundation.org>", + " cgroups\@vger.kernel.org <cgroups\@vger.kernel.org>", + " Tejun Heo <tj\@kernel.org>", " Li Zefan <lizefan\@huawei.com>", " Johannes Weiner <hannes\@cmpxchg.org>", - " Tejun Heo <tj\@kernel.org>", - " cgroups\@vger.kernel.org <cgroups\@vger.kernel.org>", + " Jean-Philippe Brucker <jean-philippe\@linaro.com>", + " Alex Williamson <alex.williamson\@redhat.com>", + " Eric Auger <eric.auger\@redhat.com>", + " Jonathan Corbet <corbet\@lwn.net>", + " Raj", + " Ashok <ashok.raj\@intel.com>", " Wu", " Hao <hao.wu\@intel.com>", - " David Woodhouse <dwmw2\@infradead.org>\0" + " Jiang", + " Dave <dave.jiang\@intel.com>\0" ] [ "\0000:1\0" @@ -186,11 +190,7 @@ "+-----------------------------+-----------------------------------------------+\n", "\n", "Regards,\n", - "Yi Liu\n", - "_______________________________________________\n", - "iommu mailing list\n", - "iommu\@lists.linux-foundation.org\n", - "https://lists.linuxfoundation.org/mailman/listinfo/iommu" + "Yi Liu" ] -2efe49f6dc07f70612939e759e8e684877457ea2f1b2a3d1d2241507552e74d9 +b6f361ff07589483af761b1bf4cb1a8ac1556cc0d62147d71295b333c9a857a4
diff --git a/a/1.txt b/N2/1.txt index f2e4e59..35dfabe 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,9 +1,9 @@ Hi Jason, -> From: Liu, Yi L <yi.l.liu@intel.com> +> From: Liu, Yi L <yi.l.liu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> > Sent: Thursday, April 1, 2021 12:39 PM > -> > From: Jason Gunthorpe <jgg@nvidia.com> +> > From: Jason Gunthorpe <jgg-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> > > Sent: Wednesday, March 31, 2021 8:41 PM > > > > On Wed, Mar 31, 2021 at 07:38:36AM +0000, Liu, Yi L wrote: @@ -55,7 +55,7 @@ Hi Jason, > - this per-ioasid SVA operations is not aligned with the native SVA usage > model. Native SVA bind is per-device. -After reading your reply in https://lore.kernel.org/linux-iommu/20210331123801.GD1463678@nvidia.com/#t +After reading your reply in https://lore.kernel.org/linux-iommu/20210331123801.GD1463678-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org/#t So you mean /dev/ioasid FD is per-VM instead of per-ioasid, so above skeleton doesn't suit your idea. I draft below skeleton to see if our mind is the same. But I still believe there is an open on how to fit ARM and AMD's @@ -111,7 +111,3 @@ vSVA support in this the per-ioasid SVA operation model. thoughts? Regards, Yi Liu -_______________________________________________ -iommu mailing list -iommu@lists.linux-foundation.org -https://lists.linuxfoundation.org/mailman/listinfo/iommu diff --git a/a/content_digest b/N2/content_digest index 1a638bb..913efde 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -35,7 +35,10 @@ "ref\0BN6PR11MB406854CAE9D7CE86BEAB3E23C37B9\@BN6PR11MB4068.namprd11.prod.outlook.com\0" ] [ - "From\0Liu, Yi L <yi.l.liu\@intel.com>\0" + "ref\0BN6PR11MB406854CAE9D7CE86BEAB3E23C37B9-1gF2/dm/6VuPGwkGT4HjsJPPoyLQLiKMvxpqHgZTriW3zl9H0oFU5g\@public.gmane.org\0" +] +[ + "From\0Liu, Yi L <yi.l.liu-ral2JQCrhuEAvxtiuMwx3w\@public.gmane.org>\0" ] [ "Subject\0RE: [PATCH V4 05/18] iommu/ioasid: Redefine IOASID set and allocation APIs\0" @@ -44,28 +47,28 @@ "Date\0Thu, 1 Apr 2021 07:04:01 +0000\0" ] [ - "To\0Jason Gunthorpe <jgg\@nvidia.com>\0" + "To\0Jason Gunthorpe <jgg-DDmLM1+adcrQT0dZR+AlfA\@public.gmane.org>\0" ] [ - "Cc\0Jean-Philippe Brucker <jean-philippe\@linaro.org>", + "Cc\0Jean-Philippe Brucker <jean-philippe-QSEj5FYQhm4dnm+yROfE0A\@public.gmane.org>", " Tian", - " Kevin <kevin.tian\@intel.com>", - " Alex Williamson <alex.williamson\@redhat.com>", + " Kevin <kevin.tian-ral2JQCrhuEAvxtiuMwx3w\@public.gmane.org>", + " Alex Williamson <alex.williamson-H+wXaHxf7aLQT0dZR+AlfA\@public.gmane.org>", " Raj", - " Ashok <ashok.raj\@intel.com>", - " Jonathan Corbet <corbet\@lwn.net>", - " Jean-Philippe Brucker <jean-philippe\@linaro.com>", - " LKML <linux-kernel\@vger.kernel.org>", + " Ashok <ashok.raj-ral2JQCrhuEAvxtiuMwx3w\@public.gmane.org>", + " Jonathan Corbet <corbet-T1hC0tSOHrs\@public.gmane.org>", + " Jean-Philippe Brucker <jean-philippe-68IGFXMjmZ7QT0dZR+AlfA\@public.gmane.org>", + " LKML <linux-kernel-u79uwXL29TY76Z2rM5mHXA\@public.gmane.org>", " Jiang", - " Dave <dave.jiang\@intel.com>", - " iommu\@lists.linux-foundation.org <iommu\@lists.linux-foundation.org>", - " Li Zefan <lizefan\@huawei.com>", - " Johannes Weiner <hannes\@cmpxchg.org>", - " Tejun Heo <tj\@kernel.org>", - " cgroups\@vger.kernel.org <cgroups\@vger.kernel.org>", + " Dave <dave.jiang-ral2JQCrhuEAvxtiuMwx3w\@public.gmane.org>", + " iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA\@public.gmane.org <iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA\@public.gmane.org>", + " Li Zefan <lizefan-hv44wF8Li93QT0dZR+AlfA\@public.gmane.org>", + " Johannes Weiner <hannes-druUgvl0LCNAfugRpC6u6w\@public.gmane.org>", + " Tejun Heo <tj-DgEjT+Ai2ygdnm+yROfE0A\@public.gmane.org>", + " cgroups-u79uwXL29TY76Z2rM5mHXA\@public.gmane.org <cgroups-u79uwXL29TY76Z2rM5mHXA\@public.gmane.org>", " Wu", - " Hao <hao.wu\@intel.com>", - " David Woodhouse <dwmw2\@infradead.org>\0" + " Hao <hao.wu-ral2JQCrhuEAvxtiuMwx3w\@public.gmane.org>", + " David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ\@public.gmane.org>\0" ] [ "\0000:1\0" @@ -76,10 +79,10 @@ [ "Hi Jason,\n", "\n", - "> From: Liu, Yi L <yi.l.liu\@intel.com>\n", + "> From: Liu, Yi L <yi.l.liu-ral2JQCrhuEAvxtiuMwx3w\@public.gmane.org>\n", "> Sent: Thursday, April 1, 2021 12:39 PM\n", "> \n", - "> > From: Jason Gunthorpe <jgg\@nvidia.com>\n", + "> > From: Jason Gunthorpe <jgg-DDmLM1+adcrQT0dZR+AlfA\@public.gmane.org>\n", "> > Sent: Wednesday, March 31, 2021 8:41 PM\n", "> >\n", "> > On Wed, Mar 31, 2021 at 07:38:36AM +0000, Liu, Yi L wrote:\n", @@ -131,7 +134,7 @@ "> - this per-ioasid SVA operations is not aligned with the native SVA usage\n", "> model. Native SVA bind is per-device.\n", "\n", - "After reading your reply in https://lore.kernel.org/linux-iommu/20210331123801.GD1463678\@nvidia.com/#t\n", + "After reading your reply in https://lore.kernel.org/linux-iommu/20210331123801.GD1463678-DDmLM1+adcrQT0dZR+AlfA\@public.gmane.org/#t\n", "So you mean /dev/ioasid FD is per-VM instead of per-ioasid, so above skeleton\n", "doesn't suit your idea. I draft below skeleton to see if our mind is the\n", "same. But I still believe there is an open on how to fit ARM and AMD's\n", @@ -186,11 +189,7 @@ "+-----------------------------+-----------------------------------------------+\n", "\n", "Regards,\n", - "Yi Liu\n", - "_______________________________________________\n", - "iommu mailing list\n", - "iommu\@lists.linux-foundation.org\n", - "https://lists.linuxfoundation.org/mailman/listinfo/iommu" + "Yi Liu" ] -2efe49f6dc07f70612939e759e8e684877457ea2f1b2a3d1d2241507552e74d9 +5a32cd510b6c0184414fb7fadffdfa7f77521b3bbe7ff71258467953dfb3996a
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