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* [PATCH v5 1/2] mfd: update Intel soc PMIC header file to support Broxton WC PMIC
@ 2015-08-21 15:40 Qipeng Zha
  2015-08-24  6:59 ` Lee Jones
  0 siblings, 1 reply; 11+ messages in thread
From: Qipeng Zha @ 2015-08-21 15:40 UTC (permalink / raw
  To: linux-kernel
  Cc: lee.jones, sameo, fei.yang, huiquan.zhong, jason.cj.chen,
	qi.zheng, qipeng.zha, samuel.ortiz

IRQ control registers of Intel Broxton Whisky Cove PMIC are
separated in two parts, so add secondary IRQ chip.
And the new member of device will be used in PMC IPC regmap APIs.

Signed-off-by: Qipeng Zha <qipeng.zha@intel.com>
---
 include/linux/mfd/intel_soc_pmic.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/include/linux/mfd/intel_soc_pmic.h b/include/linux/mfd/intel_soc_pmic.h
index abcbfcf..a730f14 100644
--- a/include/linux/mfd/intel_soc_pmic.h
+++ b/include/linux/mfd/intel_soc_pmic.h
@@ -21,10 +21,15 @@
 
 #include <linux/regmap.h>
 
+#define INIT_REGMAP_IRQ(_irq, _off, _mask)		\
+	[_irq] = { .reg_offset = (_off), .mask = (_mask) }
+
 struct intel_soc_pmic {
 	int irq;
 	struct regmap *regmap;
 	struct regmap_irq_chip_data *irq_chip_data;
+	struct regmap_irq_chip_data *irq_chip_data_level2;
+	struct device *dev;
 };
 
 #endif	/* __INTEL_SOC_PMIC_H__ */
-- 
1.8.3.2


^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH v5 1/2] mfd: update Intel soc PMIC header file to support Broxton WC PMIC
@ 2015-08-21 16:48 Qipeng Zha
  0 siblings, 0 replies; 11+ messages in thread
From: Qipeng Zha @ 2015-08-21 16:48 UTC (permalink / raw
  To: linux-kernel
  Cc: lee.jones, sameo, fei.yang, huiquan.zhong, jason.cj.chen,
	qi.zheng, qipeng.zha, samuel.ortiz

IRQ control registers of Intel Broxton Whisky Cove PMIC are
separated in two parts, so add secondary IRQ chip.
And the new member of device will be used in PMC IPC regmap APIs.

Signed-off-by: Qipeng Zha <qipeng.zha@intel.com>
---
 include/linux/mfd/intel_soc_pmic.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/include/linux/mfd/intel_soc_pmic.h b/include/linux/mfd/intel_soc_pmic.h
index abcbfcf..a730f14 100644
--- a/include/linux/mfd/intel_soc_pmic.h
+++ b/include/linux/mfd/intel_soc_pmic.h
@@ -21,10 +21,15 @@
 
 #include <linux/regmap.h>
 
+#define INIT_REGMAP_IRQ(_irq, _off, _mask)		\
+	[_irq] = { .reg_offset = (_off), .mask = (_mask) }
+
 struct intel_soc_pmic {
 	int irq;
 	struct regmap *regmap;
 	struct regmap_irq_chip_data *irq_chip_data;
+	struct regmap_irq_chip_data *irq_chip_data_level2;
+	struct device *dev;
 };
 
 #endif	/* __INTEL_SOC_PMIC_H__ */
-- 
1.8.3.2


^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH v5 1/2] mfd: update Intel soc PMIC header file to support Broxton WC PMIC
@ 2015-08-21 16:56 Qipeng Zha
  2015-08-24 13:56 ` Lee Jones
  0 siblings, 1 reply; 11+ messages in thread
From: Qipeng Zha @ 2015-08-21 16:56 UTC (permalink / raw
  To: linux-kernel
  Cc: lee.jones, sameo, fei.yang, huiquan.zhong, jason.cj.chen,
	qi.zheng, qipeng.zha, samuel.ortiz

IRQ control registers of Intel Broxton Whisky Cove PMIC are
separated in two parts, so add secondary IRQ chip.
And the new member of device will be used in PMC IPC regmap APIs.

Signed-off-by: Qipeng Zha <qipeng.zha@intel.com>
---
 include/linux/mfd/intel_soc_pmic.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/include/linux/mfd/intel_soc_pmic.h b/include/linux/mfd/intel_soc_pmic.h
index abcbfcf..a730f14 100644
--- a/include/linux/mfd/intel_soc_pmic.h
+++ b/include/linux/mfd/intel_soc_pmic.h
@@ -21,10 +21,15 @@
 
 #include <linux/regmap.h>
 
+#define INIT_REGMAP_IRQ(_irq, _off, _mask)		\
+	[_irq] = { .reg_offset = (_off), .mask = (_mask) }
+
 struct intel_soc_pmic {
 	int irq;
 	struct regmap *regmap;
 	struct regmap_irq_chip_data *irq_chip_data;
+	struct regmap_irq_chip_data *irq_chip_data_level2;
+	struct device *dev;
 };
 
 #endif	/* __INTEL_SOC_PMIC_H__ */
-- 
1.8.3.2


^ permalink raw reply related	[flat|nested] 11+ messages in thread

* Re: [PATCH v5 1/2] mfd: update Intel soc PMIC header file to support Broxton WC PMIC
  2015-08-21 15:40 Qipeng Zha
@ 2015-08-24  6:59 ` Lee Jones
  0 siblings, 0 replies; 11+ messages in thread
From: Lee Jones @ 2015-08-24  6:59 UTC (permalink / raw
  To: Qipeng Zha
  Cc: linux-kernel, sameo, fei.yang, huiquan.zhong, jason.cj.chen,
	qi.zheng, samuel.ortiz

Why have you sent this set 3 times?

> IRQ control registers of Intel Broxton Whisky Cove PMIC are
> separated in two parts, so add secondary IRQ chip.
> And the new member of device will be used in PMC IPC regmap APIs.
> 
> Signed-off-by: Qipeng Zha <qipeng.zha@intel.com>
> ---
>  include/linux/mfd/intel_soc_pmic.h | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/include/linux/mfd/intel_soc_pmic.h b/include/linux/mfd/intel_soc_pmic.h
> index abcbfcf..a730f14 100644
> --- a/include/linux/mfd/intel_soc_pmic.h
> +++ b/include/linux/mfd/intel_soc_pmic.h
> @@ -21,10 +21,15 @@
>  
>  #include <linux/regmap.h>
>  
> +#define INIT_REGMAP_IRQ(_irq, _off, _mask)		\
> +	[_irq] = { .reg_offset = (_off), .mask = (_mask) }
> +
>  struct intel_soc_pmic {
>  	int irq;
>  	struct regmap *regmap;
>  	struct regmap_irq_chip_data *irq_chip_data;
> +	struct regmap_irq_chip_data *irq_chip_data_level2;
> +	struct device *dev;
>  };
>  
>  #endif	/* __INTEL_SOC_PMIC_H__ */

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH v5 1/2] mfd: update Intel soc PMIC header file to support Broxton WC PMIC
  2015-08-21 16:56 Qipeng Zha
@ 2015-08-24 13:56 ` Lee Jones
  0 siblings, 0 replies; 11+ messages in thread
From: Lee Jones @ 2015-08-24 13:56 UTC (permalink / raw
  To: Qipeng Zha
  Cc: linux-kernel, sameo, fei.yang, huiquan.zhong, jason.cj.chen,
	qi.zheng, samuel.ortiz

On Sat, 22 Aug 2015, Qipeng Zha wrote:

> IRQ control registers of Intel Broxton Whisky Cove PMIC are
> separated in two parts, so add secondary IRQ chip.
> And the new member of device will be used in PMC IPC regmap APIs.
> 
> Signed-off-by: Qipeng Zha <qipeng.zha@intel.com>
> ---
>  include/linux/mfd/intel_soc_pmic.h | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/include/linux/mfd/intel_soc_pmic.h b/include/linux/mfd/intel_soc_pmic.h
> index abcbfcf..a730f14 100644
> --- a/include/linux/mfd/intel_soc_pmic.h
> +++ b/include/linux/mfd/intel_soc_pmic.h
> @@ -21,10 +21,15 @@
>  
>  #include <linux/regmap.h>
>  
> +#define INIT_REGMAP_IRQ(_irq, _off, _mask)		\
> +	[_irq] = { .reg_offset = (_off), .mask = (_mask) }

Either this is going to be helpful for _everyone_ or it's not
required.  Please submit this to Mark for global acceptance.

>  struct intel_soc_pmic {
>  	int irq;
>  	struct regmap *regmap;
>  	struct regmap_irq_chip_data *irq_chip_data;
> +	struct regmap_irq_chip_data *irq_chip_data_level2;
> +	struct device *dev;
>  };
>  
>  #endif	/* __INTEL_SOC_PMIC_H__ */

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH v5 1/2] mfd: update Intel soc PMIC header file to support Broxton WC PMIC
  2015-08-25 16:17 [PATCH v5 1/2] mfd: update Intel soc PMIC header file to support Broxton WC PMIC Qipeng Zha
@ 2015-08-25  8:46 ` Lee Jones
  2015-09-10  7:51   ` Zha, Qipeng
  0 siblings, 1 reply; 11+ messages in thread
From: Lee Jones @ 2015-08-25  8:46 UTC (permalink / raw
  To: Qipeng Zha; +Cc: linux-kernel, broonie

On Wed, 26 Aug 2015, Qipeng Zha wrote:

> IRQ control registers of Intel Broxton Whisky Cove PMIC are
> separated in two parts, so add secondary IRQ chip.
> And the new member of device will be used in PMC IPC regmap APIs.
> 
> Signed-off-by: Qipeng Zha <qipeng.zha@intel.com>
> ---
>  include/linux/mfd/intel_soc_pmic.h | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/include/linux/mfd/intel_soc_pmic.h b/include/linux/mfd/intel_soc_pmic.h
> index abcbfcf..a730f14 100644
> --- a/include/linux/mfd/intel_soc_pmic.h
> +++ b/include/linux/mfd/intel_soc_pmic.h
> @@ -21,10 +21,15 @@
>  
>  #include <linux/regmap.h>
>  
> +#define INIT_REGMAP_IRQ(_irq, _off, _mask)		\
> +	[_irq] = { .reg_offset = (_off), .mask = (_mask) }
> +

No, that's not what I asked.

Either this macro is going to be useful to *everyone*, or it's
probably not useful to *anyone*.  If it's going to exist, it should
exist in the core header file, not Intel's own.

>  struct intel_soc_pmic {
>  	int irq;
>  	struct regmap *regmap;
>  	struct regmap_irq_chip_data *irq_chip_data;
> +	struct regmap_irq_chip_data *irq_chip_data_level2;
> +	struct device *dev;
>  };
>  
>  #endif	/* __INTEL_SOC_PMIC_H__ */

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH v5 1/2] mfd: update Intel soc PMIC header file to support Broxton WC PMIC
@ 2015-08-25 16:17 Qipeng Zha
  2015-08-25  8:46 ` Lee Jones
  0 siblings, 1 reply; 11+ messages in thread
From: Qipeng Zha @ 2015-08-25 16:17 UTC (permalink / raw
  To: linux-kernel; +Cc: broonie, lee.jones

IRQ control registers of Intel Broxton Whisky Cove PMIC are
separated in two parts, so add secondary IRQ chip.
And the new member of device will be used in PMC IPC regmap APIs.

Signed-off-by: Qipeng Zha <qipeng.zha@intel.com>
---
 include/linux/mfd/intel_soc_pmic.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/include/linux/mfd/intel_soc_pmic.h b/include/linux/mfd/intel_soc_pmic.h
index abcbfcf..a730f14 100644
--- a/include/linux/mfd/intel_soc_pmic.h
+++ b/include/linux/mfd/intel_soc_pmic.h
@@ -21,10 +21,15 @@
 
 #include <linux/regmap.h>
 
+#define INIT_REGMAP_IRQ(_irq, _off, _mask)		\
+	[_irq] = { .reg_offset = (_off), .mask = (_mask) }
+
 struct intel_soc_pmic {
 	int irq;
 	struct regmap *regmap;
 	struct regmap_irq_chip_data *irq_chip_data;
+	struct regmap_irq_chip_data *irq_chip_data_level2;
+	struct device *dev;
 };
 
 #endif	/* __INTEL_SOC_PMIC_H__ */
-- 
1.8.3.2


^ permalink raw reply related	[flat|nested] 11+ messages in thread

* RE: [PATCH v5 1/2] mfd: update Intel soc PMIC header file to support Broxton WC PMIC
  2015-08-25  8:46 ` Lee Jones
@ 2015-09-10  7:51   ` Zha, Qipeng
  2015-09-11  9:22     ` Lee Jones
  0 siblings, 1 reply; 11+ messages in thread
From: Zha, Qipeng @ 2015-09-10  7:51 UTC (permalink / raw
  To: Lee Jones; +Cc: linux-kernel@vger.kernel.org, broonie@kernel.org

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="utf-8", Size: 711 bytes --]

>>  
>> +#define INIT_REGMAP_IRQ(_irq, _off, _mask)		\
>> +	[_irq] = { .reg_offset = (_off), .mask = (_mask) }
>> +

>No, that's not what I asked.

>Either this macro is going to be useful to *everyone*, or it's probably not useful to *anyone*.  If it's going to exist, it should exist in the core header file, not Intel's own.

Jones, can we keep current change as for intel's own ?  not sure if Mark agree to merge this macro to core regmap header file.
Maybe some driver want to initialize regmap_irq structure with different/customed way.
Thanks.
ÿôèº{.nÇ+‰·Ÿ®‰­†+%ŠËÿ±éݶ\x17¥Šwÿº{.nÇ+‰·¥Š{±þG«éÿŠ{ayº\x1dʇڙë,j\a­¢f£¢·hšïêÿ‘êçz_è®\x03(­éšŽŠÝ¢j"ú\x1a¶^[m§ÿÿ¾\a«þG«éÿ¢¸?™¨è­Ú&£ø§~á¶iO•æ¬z·švØ^\x14\x04\x1a¶^[m§ÿÿÃ\fÿ¶ìÿ¢¸?–I¥

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH v5 1/2] mfd: update Intel soc PMIC header file to support Broxton WC PMIC
  2015-09-10  7:51   ` Zha, Qipeng
@ 2015-09-11  9:22     ` Lee Jones
  2015-09-14  1:39       ` Zha, Qipeng
  0 siblings, 1 reply; 11+ messages in thread
From: Lee Jones @ 2015-09-11  9:22 UTC (permalink / raw
  To: Zha, Qipeng; +Cc: linux-kernel@vger.kernel.org, broonie@kernel.org

On Thu, 10 Sep 2015, Zha, Qipeng wrote:

> >>  
> >> +#define INIT_REGMAP_IRQ(_irq, _off, _mask)		\
> >> +	[_irq] = { .reg_offset = (_off), .mask = (_mask) }
> >> +
> 
> >No, that's not what I asked.
> 
> >Either this macro is going to be useful to *everyone*, or it's probably not useful to *anyone*.  If it's going to exist, it should exist in the core header file, not Intel's own.
> 
> Jones, can we keep current change as for intel's own ?  not sure if Mark agree to merge this macro to core regmap header file.
> Maybe some driver want to initialize regmap_irq structure with different/customed way.
> Thanks.

Is that what Mark said when you submitted this to him?

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

^ permalink raw reply	[flat|nested] 11+ messages in thread

* RE: [PATCH v5 1/2] mfd: update Intel soc PMIC header file to support Broxton WC PMIC
  2015-09-11  9:22     ` Lee Jones
@ 2015-09-14  1:39       ` Zha, Qipeng
  2015-09-14  7:17         ` Lee Jones
  0 siblings, 1 reply; 11+ messages in thread
From: Zha, Qipeng @ 2015-09-14  1:39 UTC (permalink / raw
  To: Lee Jones; +Cc: linux-kernel@vger.kernel.org, broonie@kernel.org

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="utf-8", Size: 854 bytes --]

> > >>  
> > >> +#define INIT_REGMAP_IRQ(_irq, _off, _mask)		\
> > >> +	[_irq] = { .reg_offset = (_off), .mask = (_mask) }
> > >> +
> > 
> > >No, that's not what I asked.
> > 
> > >Either this macro is going to be useful to *everyone*, or it's probably not useful to *anyone*.  If it's going to exist, it should exist in the core header file, not Intel's own.
> > 
> > Jones, can we keep current change as for intel's own ?  not sure if Mark agree to merge this macro to core regmap header file.
> > Maybe some driver want to initialize regmap_irq structure with different/customed way.
> > Thanks.

> Is that what Mark said when you submitted this to him?

No, I don't get feedback from Mark.
ÿôèº{.nÇ+‰·Ÿ®‰­†+%ŠËÿ±éݶ\x17¥Šwÿº{.nÇ+‰·¥Š{±þG«éÿŠ{ayº\x1dʇڙë,j\a­¢f£¢·hšïêÿ‘êçz_è®\x03(­éšŽŠÝ¢j"ú\x1a¶^[m§ÿÿ¾\a«þG«éÿ¢¸?™¨è­Ú&£ø§~á¶iO•æ¬z·švØ^\x14\x04\x1a¶^[m§ÿÿÃ\fÿ¶ìÿ¢¸?–I¥

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH v5 1/2] mfd: update Intel soc PMIC header file to support Broxton WC PMIC
  2015-09-14  1:39       ` Zha, Qipeng
@ 2015-09-14  7:17         ` Lee Jones
  0 siblings, 0 replies; 11+ messages in thread
From: Lee Jones @ 2015-09-14  7:17 UTC (permalink / raw
  To: Zha, Qipeng; +Cc: linux-kernel@vger.kernel.org, broonie@kernel.org

On Mon, 14 Sep 2015, Zha, Qipeng wrote:

> > > >>  
> > > >> +#define INIT_REGMAP_IRQ(_irq, _off, _mask)		\
> > > >> +	[_irq] = { .reg_offset = (_off), .mask = (_mask) }
> > > >> +
> > > 
> > > >No, that's not what I asked.
> > > 
> > > >Either this macro is going to be useful to *everyone*, or it's probably not useful to *anyone*.  If it's going to exist, it should exist in the core header file, not Intel's own.
> > > 
> > > Jones, can we keep current change as for intel's own ?  not sure if Mark agree to merge this macro to core regmap header file.
> > > Maybe some driver want to initialize regmap_irq structure with different/customed way.
> > > Thanks.
> 
> > Is that what Mark said when you submitted this to him?
> 
> No, I don't get feedback from Mark.

Then please at least try.  Don't forget to Cc me on the patch.

If Mark decides that it's not useful to others, then I will consider
it for the Intel-only header.

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

^ permalink raw reply	[flat|nested] 11+ messages in thread

end of thread, other threads:[~2015-09-14  7:17 UTC | newest]

Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-08-25 16:17 [PATCH v5 1/2] mfd: update Intel soc PMIC header file to support Broxton WC PMIC Qipeng Zha
2015-08-25  8:46 ` Lee Jones
2015-09-10  7:51   ` Zha, Qipeng
2015-09-11  9:22     ` Lee Jones
2015-09-14  1:39       ` Zha, Qipeng
2015-09-14  7:17         ` Lee Jones
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2015-08-21 16:56 Qipeng Zha
2015-08-24 13:56 ` Lee Jones
2015-08-21 16:48 Qipeng Zha
2015-08-21 15:40 Qipeng Zha
2015-08-24  6:59 ` Lee Jones

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