* flush_dcache_page from user space.
@ 2014-04-01 3:58 ratheesh kannoth
2014-04-01 6:20 ` Arun KS
0 siblings, 1 reply; 4+ messages in thread
From: ratheesh kannoth @ 2014-04-01 3:58 UTC (permalink / raw
To: kernelnewbies
I mmap'ed mmory allocated by kmalloc , to userspace. I can modify
data ( in that memory region ) from kernel space or userspace and
call flush_dcache_page to get it refected in both kernel and
userspace.
1) if i modify a value from userspace, is there any other way to
flush dcache page from userspace. What i am looking is to avoid
context switch ( to get into kernel only to call flush_dcache_page
) ?
Thanks,
Ratheesh
^ permalink raw reply [flat|nested] 4+ messages in thread
* flush_dcache_page from user space.
2014-04-01 3:58 flush_dcache_page from user space ratheesh kannoth
@ 2014-04-01 6:20 ` Arun KS
2014-04-01 6:24 ` ratheesh kannoth
0 siblings, 1 reply; 4+ messages in thread
From: Arun KS @ 2014-04-01 6:20 UTC (permalink / raw
To: kernelnewbies
Hi Ratheesh,
On Tue, Apr 1, 2014 at 9:28 AM, ratheesh kannoth <ratheesh.ksz@gmail.com> wrote:
> I mmap'ed mmory allocated by kmalloc , to userspace. I can modify
> data ( in that memory region ) from kernel space or userspace and
> call flush_dcache_page to get it refected in both kernel and
> userspace.
This requirement depends on what cache your hardware has.
Can you give more details about your processor?
If you have VIPT non aliasing cache or PIPT cache, you don't need to
do anything.
>
> 1) if i modify a value from userspace, is there any other way to
> flush dcache page from userspace. What i am looking is to avoid
> context switch ( to get into kernel only to call flush_dcache_page
> ) ?
Use __clear_cache.
But this will result in a system call and do a v7_coherent_user_range
in case of armv architectures.
Thanks,
Arun
>
>
> Thanks,
> Ratheesh
>
> _______________________________________________
> Kernelnewbies mailing list
> Kernelnewbies at kernelnewbies.org
> http://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies
^ permalink raw reply [flat|nested] 4+ messages in thread
* flush_dcache_page from user space.
2014-04-01 6:20 ` Arun KS
@ 2014-04-01 6:24 ` ratheesh kannoth
2014-04-01 6:43 ` Arun KS
0 siblings, 1 reply; 4+ messages in thread
From: ratheesh kannoth @ 2014-04-01 6:24 UTC (permalink / raw
To: kernelnewbies
On Tue, Apr 1, 2014 at 11:50 AM, Arun KS <getarunks@gmail.com> wrote:
> This requirement depends on what cache your hardware has.
> Can you give more details about your processor?
>
> If you have VIPT non aliasing cache or PIPT cache, you don't need to
> do anything.
>
How can i find which cache hw on my machine ?
Thanks,
Ratheesh
^ permalink raw reply [flat|nested] 4+ messages in thread
* flush_dcache_page from user space.
2014-04-01 6:24 ` ratheesh kannoth
@ 2014-04-01 6:43 ` Arun KS
0 siblings, 0 replies; 4+ messages in thread
From: Arun KS @ 2014-04-01 6:43 UTC (permalink / raw
To: kernelnewbies
Hi Ratheesh,
On Tue, Apr 1, 2014 at 11:54 AM, ratheesh kannoth
<ratheesh.ksz@gmail.com> wrote:
> On Tue, Apr 1, 2014 at 11:50 AM, Arun KS <getarunks@gmail.com> wrote:
>> This requirement depends on what cache your hardware has.
>> Can you give more details about your processor?
>>
>> If you have VIPT non aliasing cache or PIPT cache, you don't need to
>> do anything.
>>
>
> How can i find which cache hw on my machine ?
Usually prints while booting.
Thanks,
Arun
>
>
> Thanks,
> Ratheesh
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2014-04-01 6:43 UTC | newest]
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2014-04-01 3:58 flush_dcache_page from user space ratheesh kannoth
2014-04-01 6:20 ` Arun KS
2014-04-01 6:24 ` ratheesh kannoth
2014-04-01 6:43 ` Arun KS
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