From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752862AbbLIRPJ (ORCPT ); Wed, 9 Dec 2015 12:15:09 -0500 Received: from mail-wm0-f45.google.com ([74.125.82.45]:36686 "EHLO mail-wm0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752446AbbLIRPG (ORCPT ); Wed, 9 Dec 2015 12:15:06 -0500 MIME-Version: 1.0 In-Reply-To: <20151209165807.GP15533@two.firstfloor.org> References: <5667A8D4.4090601@huawei.com> <20151209080440.GA17211@krava.brq.redhat.com> <20151209093402.GM6356@twins.programming.kicks-ass.net> <20151209165807.GP15533@two.firstfloor.org> Date: Wed, 9 Dec 2015 09:15:04 -0800 Message-ID: Subject: Re: [Questions] perf c2c: What's the current status of perf c2c? From: Stephane Eranian To: Andi Kleen Cc: Peter Zijlstra , Jiri Olsa , Yunlong Song , Don Zickus , David Ahern , =?UTF-8?B?RnLDqWTDqXJpYyBXZWlzYmVja2Vy?= , Joe Mario , Mike Galbraith , Paul Mackerras , Richard Fowles , "acme@kernel.org >> Arnaldo Carvalho de Melo" , "mingo@redhat.com" , Linux Kernel Mailing List , Jiri Olsa , "wangnan0@huawei.com >> Wang Nan" , Richard Fowles , Namhyung Kim Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Wed, Dec 9, 2015 at 8:58 AM, Andi Kleen wrote: >> > the plan for me is to to use it some more to prove it's useful >> > and kick it to be merged with perf at some point >> >> So I never really liked the c2c tool because it was so narrowly >> focussed, it only works on NUMA thingies IIRC. > > It should work on all systems with an Intel Core (not Atom) > > However it was never clear to me if the tool was any better > than simply sampling for > > mem_load_uops_l3_hit_retired.xsnp_hitm:pp (local socket) > mem_load_uops_l3_miss_retired.remote_hitm:pp (remote socket) > > which gives you instructions that reference bouncing cache lines. > If I recall the c2c tool is giving you more than the bouncing line. It shows you the offset inside the line and the participating CPUs.