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Date: Wed, 9 Dec 2015 11:48:21 -0800
Message-ID: <CABPqkBT-ws9tmAa=guJHXzcnK9frPiXkqQXbH81pxROPomAdLA@mail.gmail.com>
Subject: Re: [Questions] perf c2c: What's the current status of perf c2c?
From: Stephane Eranian <eranian@google.com>
To: Andi Kleen <andi@firstfloor.org>
Cc: Peter Zijlstra <peterz@infradead.org>, Jiri Olsa <jolsa@redhat.com>,
        Yunlong Song <yunlong.song@huawei.com>,
        Don Zickus <dzickus@redhat.com>, David Ahern <dsahern@gmail.com>,
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        Paul Mackerras <paulus@samba.org>, Richard Fowles <rfowles@redhat.com>,
        "acme@kernel.org >> Arnaldo Carvalho de Melo" <acme@kernel.org>,
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        Jiri Olsa <jolsa@kernel.org>,
        "wangnan0@huawei.com >> Wang Nan" <wangnan0@huawei.com>,
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On Wed, Dec 9, 2015 at 9:21 AM, Andi Kleen <andi@firstfloor.org> wrote:
>> If I recall the c2c tool is giving you more than the bouncing line. It shows you
>> the offset inside the line and the participating CPUs.
>
> On Haswell and later you could get the same with the normal address
> reporting. The events above support DLA.
>
I know the events track the condition better than just with the
latency threshold.
I think what it boils down to is not so much the PMU side but  rather
the tool side.