From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <stable-owner@vger.kernel.org>
Received: from mail-ob0-f181.google.com ([209.85.214.181]:33013 "EHLO
	mail-ob0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
	with ESMTP id S1753445AbbFJI50 (ORCPT
	<rfc822;stable@vger.kernel.org>); Wed, 10 Jun 2015 04:57:26 -0400
Received: by obcej4 with SMTP id ej4so30586430obc.0
        for <stable@vger.kernel.org>; Wed, 10 Jun 2015 01:57:26 -0700 (PDT)
MIME-Version: 1.0
In-Reply-To: <1433868446-11028-9-git-send-email-thomas.petazzoni@free-electrons.com>
References: <1433868446-11028-1-git-send-email-thomas.petazzoni@free-electrons.com>
	<1433868446-11028-9-git-send-email-thomas.petazzoni@free-electrons.com>
Date: Wed, 10 Jun 2015 10:57:25 +0200
Message-ID: <CACRpkdatecpaay7p3Y2vJywp3LEA8DXH4OJs3W=e5_Gc+RL7Ug@mail.gmail.com>
Subject: Re: [PATCH 08/34] pinctrl: mvebu: armada-38x: fix incorrect total
 number of GPIOs
From: Linus Walleij <linus.walleij@linaro.org>
To: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Gregory Clement <gregory.clement@free-electrons.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	Tawfik Bayouk <tawfik@marvell.com>,
	Nadav Haklai <nadavh@marvell.com>,
	Lior Amsalem <alior@marvell.com>,
	stable <stable@vger.kernel.org>
Content-Type: text/plain; charset=UTF-8
Sender: stable-owner@vger.kernel.org
List-ID: <stable.vger.kernel.org>

On Tue, Jun 9, 2015 at 6:47 PM, Thomas Petazzoni
<thomas.petazzoni@free-electrons.com> wrote:

> The pinctrl_gpio_range[] array described a first bank of 32 GPIOs and
> a second one of 27 GPIOs. However, since there is a total of 60 MPP
> pins that can be muxed as GPIOs, the second bank really has 28 GPIOs.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Cc: <stable@vger.kernel.org> # v3.15+
> Fixes: ca6d9a084b56f ("pinctrl: mvebu: add pin-muxing driver for the Marvell Armada 380/385")

Patch applied.

Yours,
Linus Walleij

From mboxrd@z Thu Jan  1 00:00:00 1970
From: linus.walleij@linaro.org (Linus Walleij)
Date: Wed, 10 Jun 2015 10:57:25 +0200
Subject: [PATCH 08/34] pinctrl: mvebu: armada-38x: fix incorrect total
 number of GPIOs
In-Reply-To: <1433868446-11028-9-git-send-email-thomas.petazzoni@free-electrons.com>
References: <1433868446-11028-1-git-send-email-thomas.petazzoni@free-electrons.com>
 <1433868446-11028-9-git-send-email-thomas.petazzoni@free-electrons.com>
Message-ID: <CACRpkdatecpaay7p3Y2vJywp3LEA8DXH4OJs3W=e5_Gc+RL7Ug@mail.gmail.com>
To: linux-arm-kernel@lists.infradead.org
List-Id: linux-arm-kernel.lists.infradead.org

On Tue, Jun 9, 2015 at 6:47 PM, Thomas Petazzoni
<thomas.petazzoni@free-electrons.com> wrote:

> The pinctrl_gpio_range[] array described a first bank of 32 GPIOs and
> a second one of 27 GPIOs. However, since there is a total of 60 MPP
> pins that can be muxed as GPIOs, the second bank really has 28 GPIOs.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Cc: <stable@vger.kernel.org> # v3.15+
> Fixes: ca6d9a084b56f ("pinctrl: mvebu: add pin-muxing driver for the Marvell Armada 380/385")

Patch applied.

Yours,
Linus Walleij