From mboxrd@z Thu Jan  1 00:00:00 1970
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 27 Aug 2019 10:55:45 +0800
Subject: [U-Boot] [PATCH 25/47] P2020: dts: Added PCIe DT nodes
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Hi Zhiqiang,

On Tue, Aug 27, 2019 at 10:52 AM Z.q. Hou <zhiqiang.hou@nxp.com> wrote:
>
> Hi Bin,
>
> Thanks a lot for your comments!
>
> > -----Original Message-----
> > From: Bin Meng <bmeng.cn@gmail.com>
> > Sent: 2019年8月26日 22:50
> > To: Z.q. Hou <zhiqiang.hou@nxp.com>
> > Cc: U-Boot Mailing List <u-boot@lists.denx.de>; Prabhakar Kushwaha
> > <prabhakar.kushwaha@nxp.com>; Wolfgang Denk <wd@denx.de>; Priyanka
> > Jain <priyanka.jain@nxp.com>; Shengzhou Liu <shengzhou.liu@nxp.com>
> > Subject: Re: [U-Boot] [PATCH 25/47] P2020: dts: Added PCIe DT nodes
> >
> > On Tue, Jul 23, 2019 at 9:39 PM Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > wrote:
> > >
> > > P2020 integrated 3 PCIe controllers, which is compatible with the PCI
> > > Express™ Base Specification, Revision 1.0a, and this patch is to add
> > > DT node for each PCIe controller.
> > >
> > > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > > ---
> > >  arch/powerpc/dts/p2020-post.dtsi     | 30
> > ++++++++++++++++++++++++++++++
> > >  arch/powerpc/dts/p2020rdb-pc.dts     | 17 +++++++++++++++++
> > >  arch/powerpc/dts/p2020rdb-pc_36b.dts | 17 +++++++++++++++++
> > >  3 files changed, 64 insertions(+)
> > >
> > > diff --git a/arch/powerpc/dts/p2020-post.dtsi
> > > b/arch/powerpc/dts/p2020-post.dtsi
> > > index f20d1fa..f696f35 100644
> > > --- a/arch/powerpc/dts/p2020-post.dtsi
> > > +++ b/arch/powerpc/dts/p2020-post.dtsi
> > > @@ -25,3 +25,33 @@
> > >                 last-interrupt-source = <255>;
> > >         };
> > >  };
> > > +
> > > +/* PCIe controller base address 0x8000 */
> > > +&pci2 {
> >
> > pci0?
>
> Describe the controller index and starting address according to P2020 RM.

OK, so will this weird index number (2, 1, 0) break the index
calculation log in the following patch?
http://patchwork.ozlabs.org/patch/1152811/

Regards,
Bin