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To: Anand Moon Cc: Kishon Vijay Abraham I , Vinod Koul , Neil Armstrong , Kevin Hilman , Jerome Brunet , Philipp Zabel , linux-phy@lists.infradead.org, linux-arm-kernel , linux-amlogic@lists.infradead.org, Linux Kernel X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210622_130104_622807_4B1F3D55 X-CRM114-Status: GOOD ( 20.98 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Hi Anand, On Mon, Jun 21, 2021 at 9:15 AM Anand Moon wrote: > > Hi Martin, > > On Fri, 18 Jun 2021 at 04:07, Martin Blumenstingl > wrote: > > > > Hi Anand, > > > > On Thu, Jun 17, 2021 at 9:44 PM Anand Moon wrote: > > [...] > > > @@ -245,8 +250,6 @@ static int phy_meson8b_usb2_power_on(struct phy *phy) > > > regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_FSEL_MASK, > > > 0x5 << REG_CTRL_FSEL_SHIFT); > > > /* reset the PHY */ > > > - regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET, > > > - REG_CTRL_POWER_ON_RESET); > > The vendor driver uses the following sequence for the power on reset: > > - set the power on reset bit > > - wait 500us > > - clear the power on reset bit > > - wait 500us > > > > With your change we now: > > - wait 500us > > - clear the power on reset bit > > - wait 500us > > > > I don't know if this is sufficient to bring the PHY into a well-defined state. > > Maybe it works, maybe it doesn't reset at all in this case - I don't > > know how to verify this though. > > > Initially, I tried to some bit mask code to resolve this but it failed, > So no harm in keeping the original changes. yes, I feel more comfortable with that > There is another parameter REG_CTRL_PORT_RESET to be considered. none of the vendor kernels that I have sets or clears this bit explicitly I agree that the name seems related, but due to lack of an example or documentation how/when to use this bit I suggest we don't touch it for now Best rergards, Martin -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.7 required=3.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8ED5FC2B9F4 for ; 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Tue, 22 Jun 2021 13:01:00 -0700 (PDT) MIME-Version: 1.0 References: <20210617194154.2397-1-linux.amoon@gmail.com> <20210617194154.2397-8-linux.amoon@gmail.com> In-Reply-To: From: Martin Blumenstingl Date: Tue, 22 Jun 2021 22:00:50 +0200 Message-ID: Subject: Re: [RFCv1 7/8] phy: amlogic: meson8b-usb2: Power off the PHY by putting it into reset mode. To: Anand Moon Cc: Kishon Vijay Abraham I , Vinod Koul , Neil Armstrong , Kevin Hilman , Jerome Brunet , Philipp Zabel , linux-phy@lists.infradead.org, linux-arm-kernel , linux-amlogic@lists.infradead.org, Linux Kernel X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210622_130104_622807_4B1F3D55 X-CRM114-Status: GOOD ( 20.98 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Hi Anand, On Mon, Jun 21, 2021 at 9:15 AM Anand Moon wrote: > > Hi Martin, > > On Fri, 18 Jun 2021 at 04:07, Martin Blumenstingl > wrote: > > > > Hi Anand, > > > > On Thu, Jun 17, 2021 at 9:44 PM Anand Moon wrote: > > [...] > > > @@ -245,8 +250,6 @@ static int phy_meson8b_usb2_power_on(struct phy *phy) > > > regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_FSEL_MASK, > > > 0x5 << REG_CTRL_FSEL_SHIFT); > > > /* reset the PHY */ > > > - regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET, > > > - REG_CTRL_POWER_ON_RESET); > > The vendor driver uses the following sequence for the power on reset: > > - set the power on reset bit > > - wait 500us > > - clear the power on reset bit > > - wait 500us > > > > With your change we now: > > - wait 500us > > - clear the power on reset bit > > - wait 500us > > > > I don't know if this is sufficient to bring the PHY into a well-defined state. > > Maybe it works, maybe it doesn't reset at all in this case - I don't > > know how to verify this though. > > > Initially, I tried to some bit mask code to resolve this but it failed, > So no harm in keeping the original changes. yes, I feel more comfortable with that > There is another parameter REG_CTRL_PORT_RESET to be considered. none of the vendor kernels that I have sets or clears this bit explicitly I agree that the name seems related, but due to lack of an example or documentation how/when to use this bit I suggest we don't touch it for now Best rergards, Martin _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EB11DC48BDF for ; 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Tue, 22 Jun 2021 13:01:00 -0700 (PDT) MIME-Version: 1.0 References: <20210617194154.2397-1-linux.amoon@gmail.com> <20210617194154.2397-8-linux.amoon@gmail.com> In-Reply-To: From: Martin Blumenstingl Date: Tue, 22 Jun 2021 22:00:50 +0200 Message-ID: Subject: Re: [RFCv1 7/8] phy: amlogic: meson8b-usb2: Power off the PHY by putting it into reset mode. To: Anand Moon Cc: Kishon Vijay Abraham I , Vinod Koul , Neil Armstrong , Kevin Hilman , Jerome Brunet , Philipp Zabel , linux-phy@lists.infradead.org, linux-arm-kernel , linux-amlogic@lists.infradead.org, Linux Kernel Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Anand, On Mon, Jun 21, 2021 at 9:15 AM Anand Moon wrote: > > Hi Martin, > > On Fri, 18 Jun 2021 at 04:07, Martin Blumenstingl > wrote: > > > > Hi Anand, > > > > On Thu, Jun 17, 2021 at 9:44 PM Anand Moon wrote: > > [...] > > > @@ -245,8 +250,6 @@ static int phy_meson8b_usb2_power_on(struct phy *phy) > > > regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_FSEL_MASK, > > > 0x5 << REG_CTRL_FSEL_SHIFT); > > > /* reset the PHY */ > > > - regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET, > > > - REG_CTRL_POWER_ON_RESET); > > The vendor driver uses the following sequence for the power on reset: > > - set the power on reset bit > > - wait 500us > > - clear the power on reset bit > > - wait 500us > > > > With your change we now: > > - wait 500us > > - clear the power on reset bit > > - wait 500us > > > > I don't know if this is sufficient to bring the PHY into a well-defined state. > > Maybe it works, maybe it doesn't reset at all in this case - I don't > > know how to verify this though. > > > Initially, I tried to some bit mask code to resolve this but it failed, > So no harm in keeping the original changes. yes, I feel more comfortable with that > There is another parameter REG_CTRL_PORT_RESET to be considered. none of the vendor kernels that I have sets or clears this bit explicitly I agree that the name seems related, but due to lack of an example or documentation how/when to use this bit I suggest we don't touch it for now Best rergards, Martin From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.7 required=3.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7BD16C2B9F4 for ; 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Tue, 22 Jun 2021 13:01:00 -0700 (PDT) MIME-Version: 1.0 References: <20210617194154.2397-1-linux.amoon@gmail.com> <20210617194154.2397-8-linux.amoon@gmail.com> In-Reply-To: From: Martin Blumenstingl Date: Tue, 22 Jun 2021 22:00:50 +0200 Message-ID: Subject: Re: [RFCv1 7/8] phy: amlogic: meson8b-usb2: Power off the PHY by putting it into reset mode. To: Anand Moon Cc: Kishon Vijay Abraham I , Vinod Koul , Neil Armstrong , Kevin Hilman , Jerome Brunet , Philipp Zabel , linux-phy@lists.infradead.org, linux-arm-kernel , linux-amlogic@lists.infradead.org, Linux Kernel X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210622_130104_622807_4B1F3D55 X-CRM114-Status: GOOD ( 20.98 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Anand, On Mon, Jun 21, 2021 at 9:15 AM Anand Moon wrote: > > Hi Martin, > > On Fri, 18 Jun 2021 at 04:07, Martin Blumenstingl > wrote: > > > > Hi Anand, > > > > On Thu, Jun 17, 2021 at 9:44 PM Anand Moon wrote: > > [...] > > > @@ -245,8 +250,6 @@ static int phy_meson8b_usb2_power_on(struct phy *phy) > > > regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_FSEL_MASK, > > > 0x5 << REG_CTRL_FSEL_SHIFT); > > > /* reset the PHY */ > > > - regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET, > > > - REG_CTRL_POWER_ON_RESET); > > The vendor driver uses the following sequence for the power on reset: > > - set the power on reset bit > > - wait 500us > > - clear the power on reset bit > > - wait 500us > > > > With your change we now: > > - wait 500us > > - clear the power on reset bit > > - wait 500us > > > > I don't know if this is sufficient to bring the PHY into a well-defined state. > > Maybe it works, maybe it doesn't reset at all in this case - I don't > > know how to verify this though. > > > Initially, I tried to some bit mask code to resolve this but it failed, > So no harm in keeping the original changes. yes, I feel more comfortable with that > There is another parameter REG_CTRL_PORT_RESET to be considered. none of the vendor kernels that I have sets or clears this bit explicitly I agree that the name seems related, but due to lack of an example or documentation how/when to use this bit I suggest we don't touch it for now Best rergards, Martin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel