From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754132AbbEZPDB (ORCPT ); Tue, 26 May 2015 11:03:01 -0400 Received: from mail-oi0-f52.google.com ([209.85.218.52]:35964 "EHLO mail-oi0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754099AbbEZPC5 convert rfc822-to-8bit (ORCPT ); Tue, 26 May 2015 11:02:57 -0400 MIME-Version: 1.0 In-Reply-To: <20150526122858.GJ1565@arm.com> References: <=fu.wei@linaro.org> <1432548193-19569-1-git-send-email-fu.wei@linaro.org> <1432548193-19569-7-git-send-email-fu.wei@linaro.org> <20150526122858.GJ1565@arm.com> Date: Tue, 26 May 2015 11:02:56 -0400 Message-ID: Subject: Re: [PATCH v3 6/6] ACPI: import watchdog info of GTDT into platform device From: Ashwin Chaugule To: Will Deacon Cc: "fu.wei@linaro.org" , "suravee.suthikulpanit@amd.com" , "linaro-acpi@lists.linaro.org" , "linux-watchdog@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-doc@vger.kernel.org" , "tekkamanninja@gmail.com" , "graeme.gregory@linaro.org" , "al.stone@linaro.org" , "hanjun.guo@linaro.org" , "timur@codeaurora.org" , "arnd@arndb.de" , "linux@roeck-us.net" , "vgandhi@codeaurora.org" , "wim@iguana.be" , "jcm@redhat.com" , "leo.duran@amd.com" , "corbet@lwn.net" , Mark Rutland , Catalin Marinas Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Will, On 26 May 2015 at 08:28, Will Deacon wrote: > On Mon, May 25, 2015 at 11:03:13AM +0100, fu.wei@linaro.org wrote: >> From: Fu Wei >> >> Parse SBSA Generic Watchdog Structure in GTDT table of ACPI, >> and create a platform device with that information. >> This platform device can be used by the ARM SBSA Generic >> Watchdog driver. >> >> Tested-by: Suravee Suthikulpanit >> Tested-by: Timur Tabi >> Signed-off-by: Fu Wei >> --- >> arch/arm64/kernel/acpi.c | 145 +++++++++++++++++++++++++++++++++++++++++++++++ >> 1 file changed, 145 insertions(+) > > Why does this all need to be under arch/arm64? The GTDT really isn't > architecture-specific, so I'd *much* rather it was parsed in the driver code > itself, like we already do for the architected timer. The GIC is an > exception because it's in the MADT, which we need to parse in the arch code > to configure SMP properly. I'm not really against refactoring the code. But the GTDT looks quite specific to ARM.. ---8<---- 5.2.24 Generic Timer Description Table (GTDT) This section describes the format of the Generic Timer Description Table (GTDT), which provides OSPM with information about a system’s Generic Timers configuration. The Generic Timer (GT) is a standard timer interface implemented on ARM processor-based systems. The GT hardware specification can be found at Links to ACPI-Related Documents (http://uefi.org/acpi) under the heading ARM Architecture. The GTDT provides OSPM with information about a system's GT interrupt configurations, for both per-processor timers, and platform (memory-mapped) timers. The GT specification defines the following per-processor timers: • Secure privilege level 1 (EL1) timer, • Non-Secure EL1 timer, • Non-Secure privilege level 2 (EL2) timer, • Virtual timer, and the following Platform (memory-mapped) timers. • GT Block • Server Base System Architecture (SBSA) Generic Watchdog ---8<---- Thanks, Ashwin. From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ashwin Chaugule Subject: Re: [PATCH v3 6/6] ACPI: import watchdog info of GTDT into platform device Date: Tue, 26 May 2015 11:02:56 -0400 Message-ID: References: <=fu.wei@linaro.org> <1432548193-19569-1-git-send-email-fu.wei@linaro.org> <1432548193-19569-7-git-send-email-fu.wei@linaro.org> <20150526122858.GJ1565@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: In-Reply-To: <20150526122858.GJ1565@arm.com> Sender: linux-doc-owner@vger.kernel.org To: Will Deacon Cc: "fu.wei@linaro.org" , "suravee.suthikulpanit@amd.com" , "linaro-acpi@lists.linaro.org" , "linux-watchdog@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-doc@vger.kernel.org" , "tekkamanninja@gmail.com" , "graeme.gregory@linaro.org" , "al.stone@linaro.org" , "hanjun.guo@linaro.org" , "timur@codeaurora.org" , "arnd@arndb.de" , "linux@roeck-us.net" , "vgandhi@codeaurora.org" , "wim@iguana.be" , "jcm@redhat.com" , leo.duran@amd.com List-Id: devicetree@vger.kernel.org Hi Will, On 26 May 2015 at 08:28, Will Deacon wrote: > On Mon, May 25, 2015 at 11:03:13AM +0100, fu.wei@linaro.org wrote: >> From: Fu Wei >> >> Parse SBSA Generic Watchdog Structure in GTDT table of ACPI, >> and create a platform device with that information. >> This platform device can be used by the ARM SBSA Generic >> Watchdog driver. >> >> Tested-by: Suravee Suthikulpanit >> Tested-by: Timur Tabi >> Signed-off-by: Fu Wei >> --- >> arch/arm64/kernel/acpi.c | 145 ++++++++++++++++++++++++++++++++++++= +++++++++++ >> 1 file changed, 145 insertions(+) > > Why does this all need to be under arch/arm64? The GTDT really isn't > architecture-specific, so I'd *much* rather it was parsed in the driv= er code > itself, like we already do for the architected timer. The GIC is an > exception because it's in the MADT, which we need to parse in the arc= h code > to configure SMP properly. I'm not really against refactoring the code. But the GTDT looks quite specific to ARM.. ---8<---- 5.2.24 Generic Timer Description Table (GTDT) This section describes the format of the Generic Timer Description Table (GTDT), which provides OSPM with information about a system=E2=80=99s Generic Timers configura= tion. The Generic Timer (GT) is a standard timer interface implemented on ARM processor-based systems. The GT hardware specification can be found at Links to ACPI-Related Documents (http://uefi.org/acpi) under the heading ARM Architecture. The GTDT provides OSPM with information about a system's GT interrupt configurations, for both per-processor timers, and platform (memory-mapped) timers. The GT specification defines the following per-processor timers: =E2=80=A2 Secure privilege level 1 (EL1) timer, =E2=80=A2 Non-Secure EL1 timer, =E2=80=A2 Non-Secure privilege level 2 (EL2) timer, =E2=80=A2 Virtual timer, and the following Platform (memory-mapped) timers. =E2=80=A2 GT Block =E2=80=A2 Server Base System Architecture (SBSA) Generic Watchdog ---8<---- Thanks, Ashwin.