From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-20.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 32213C433EF for ; Mon, 6 Sep 2021 15:17:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1CADE60F12 for ; Mon, 6 Sep 2021 15:17:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242623AbhIFPSO (ORCPT ); Mon, 6 Sep 2021 11:18:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43580 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239993AbhIFPSL (ORCPT ); Mon, 6 Sep 2021 11:18:11 -0400 Received: from mail-ua1-x929.google.com (mail-ua1-x929.google.com [IPv6:2607:f8b0:4864:20::929]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 64A0CC061575 for ; Mon, 6 Sep 2021 08:17:04 -0700 (PDT) Received: by mail-ua1-x929.google.com with SMTP id 75so3969733uav.8 for ; Mon, 06 Sep 2021 08:17:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=bQrcOPSf7pBZJCYQQnVkSrgNEesYDMSFecU9BQuGKZU=; b=zYe9FR9ZNaFmXa/bzWa/4JbqZVIulgJ6lbYskzgikyVc6Og/9TOjcJKnIjDb1eEucZ kG1X8tg1HoGjsJ95+BxJb243vLWeu00fyyYGcVmkyEO44lBEJ6TEVhBrkiDs3dyaCZui It/w80qNYdvf6f1NrDkZnuYNfWGMD331qsX1YEMeiAaO+LCSbB5oRh9OevAwdfydjhMI 4gk9S+zG+gEquPWYXFTPSehBZME3pX38EZruq85WmqlX2awokHjcXOkR1NPpzRRMjsNO VffyLSHsnQwJy4HqiGq4WZLxNQUPVBkJW5ejLYE2bhDuxgbHNojK1rp1+I0cVZFU3N1s cPUA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=bQrcOPSf7pBZJCYQQnVkSrgNEesYDMSFecU9BQuGKZU=; b=MM0s6TrxyTlAwjS9GNM6aVLT4yymBrUjgQLD5nR8MaePI67gMYrx38n2h2GYFX7iM7 ilU6zis3oq9Fw9MSWMHhAo7G3a1u9kKRjwmnDrI12A7mBr+uUUDEAxgb/fm/h2hQKZq+ kZ6oWRVYbM/TVFc1ZNHHi1j1KmEjMu9XDL5x5AkrXXPSRxR3aNjuVwssAKKGucOsHo1p GIFX3cdIJm2escPMYuZiAhCusuKgzNcMxDNscQr64RjDnRyvttVRr327BBowTkBgrw/H QSK7Nx4tH7D46sRUxuefTz1GeJOtFKCP0a0nCc/z5rrENv6v7HTwcOgOt5MVo6RbjCNR 7LcA== X-Gm-Message-State: AOAM5324oebLqKeWbt2V1GFu3PWgTrl8C4FmPF7oy8TRbpoWBjw0+ymx Oe1B/70O//uYfrJ7MwhCovQ+m0bN+EPaoqw8NuhaYQ== X-Google-Smtp-Source: ABdhPJwRm+FKxm0YSP8+0/3Dgu/q6YVV1RAAkL/Hx1QxF9PMM6RdemkterGZszBPDz4vhjLfYOArLtkqbVaXsEbQvhE= X-Received: by 2002:ab0:3303:: with SMTP id r3mr6027322uao.17.1630941423339; Mon, 06 Sep 2021 08:17:03 -0700 (PDT) MIME-Version: 1.0 References: <20210730144922.29111-1-semen.protsenko@linaro.org> <20210730144922.29111-13-semen.protsenko@linaro.org> <455cfb5e-dff7-a5c0-3875-49abe3e900f3@canonical.com> <68734f6c-fc76-595c-8d34-8924dbbbb845@canonical.com> <50f84842-c397-8012-af95-e9d9fce53162@gmail.com> In-Reply-To: <50f84842-c397-8012-af95-e9d9fce53162@gmail.com> From: Sam Protsenko Date: Mon, 6 Sep 2021 18:16:51 +0300 Message-ID: Subject: Re: [PATCH 12/12] arm64: dts: exynos: Add Exynos850 SoC support To: =?UTF-8?Q?Pawe=C5=82_Chmiel?= Cc: Krzysztof Kozlowski , Sylwester Nawrocki , Chanwoo Choi , Linus Walleij , Tomasz Figa , Rob Herring , Stephen Boyd , Michael Turquette , Jiri Slaby , Greg Kroah-Hartman , Charles Keepax , Ryu Euiyoul , Tom Gall , Sumit Semwal , John Stultz , Amit Pundir , devicetree , linux-arm Mailing List , linux-clk , "open list:GPIO SUBSYSTEM" , Linux Kernel Mailing List , Linux Samsung SOC , "open list:SERIAL DRIVERS" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 6 Aug 2021 at 23:32, Pawe=C5=82 Chmiel wrote: > > W dniu 06.08.2021 o 14:32, Krzysztof Kozlowski pisze: > > On 06/08/2021 14:07, Sam Protsenko wrote: > >> On Fri, 6 Aug 2021 at 10:49, Krzysztof Kozlowski > >> wrote: > >>> > >>> On 06/08/2021 01:06, Sam Protsenko wrote: > >>>> On Sat, 31 Jul 2021 at 12:03, Krzysztof Kozlowski > >>>> wrote: > >>>> > >>>>>> > >>>>>> This patch adds minimal SoC support. Particular board device tree = files > >>>>>> can include exynos850.dtsi file to get SoC related nodes, and then > >>>>>> reference those nodes further as needed. > >>>>>> > >>>>>> Signed-off-by: Sam Protsenko > >>>>>> --- > >>>>>> .../boot/dts/exynos/exynos850-pinctrl.dtsi | 782 ++++++++++++= ++++++ > >>>>>> arch/arm64/boot/dts/exynos/exynos850-usi.dtsi | 30 + > >>>>>> arch/arm64/boot/dts/exynos/exynos850.dtsi | 245 ++++++ > >>>>> > >>>>> Not buildable. Missing Makefile, missing DTS. Please submit with in= itial > >>>>> DTS, otherwise no one is able to verify it even compiles. > >>>>> > >>>> > >>>> This device is not available for purchase yet. I'll send the patch f= or > >>>> board dts once it's announced. I can do all the testing for now, if > >>>> you have any specific requests. Would it be possible for us to revie= w > >>>> and apply only SoC support for now? Will send v2 soon... > >>> > >>> What you propose is equal to adding a driver (C source code) without > >>> ability to compile it. What's the point of having it in the kernel? I= t's > >>> unverifiable, unbuildable and unusable. > >>> > >> > >> Yes, I understand. That's adding code with no users, and it's not a > >> good practice. > >> > >>> We can review the DTSI however merging has to be with a DTS. Usually = the > >>> SoC vendor adds first an evalkit (e.g. SMDK board). Maybe you have on= e > >>> for Exynos850? Otherwise if you cannot disclose the actual board, the > >>> DTSI will have to wait. You can submit drivers, though. > >>> > >> > >> Sure, let's go this way. I'll send v2 soon. Improving patches and > >> having Reviewed-by tag for those would good enough for me at this > >> point. I'll continue to prepare another Exynos850 related patches > >> until the actual board is announced, like proper clock driver, reset, > >> MMC, etc. Is it ok if I send those for a review too (so I can fix all > >> issues ahead)? > > > > Sure, prepare all necessary drivers earlier. I suspect clocks will be a > > real pain because of significant changes modeled in vendor kernel. I > > remember Pawe=C5=82 Chmiel (+Cc) was doing something for these: > > https://github.com/PabloPL/linux/tree/exynos7420 > > > > I mentioned before - you should also modify the chipid driver. Check > > also other drivers in drivers/soc/samsung, although some are needed onl= y > > for suspend&resume. > > > > BTW, Pawe=C5=82, > > How is your Exynos7420 progress? :) > Hi > > Sadly i had to postpone it for a while. Maybe will have more time now to > get back to it. > > About clock driver. In vendor sources there is clk driver with something > called virtual clocks (different than real ones). That driver calls > another driver called pwrcal, responsible for real manipulation of > clocks in hardware. This one has info about real clocks and also > additional info about for example rate for some of them, which is read > from binary from memory, by another driver called ect_parser in case of > devices at which i did looked. > > In my case i was able to find some more info about real clocks there - > for example register names and offsets > https://github.com/krzk/linux-vendor-backup/blob/mokee/android-3.18-samsu= ng-galaxy-s7-sm-g930f-exynos8890/drivers/soc/samsung/pwrcal/S5E8890/S5E8890= -cmusfr.h > and some clocks hierarchy info inside > https://github.com/krzk/linux-vendor-backup/blob/mokee/android-3.18-samsu= ng-galaxy-s7-sm-g930f-exynos8890/drivers/soc/samsung/pwrcal/S5E8890/S5E8890= -cmu.c > but there was still many info missing. > > Finding a way (which could be applied to other Exynos SOC) to "convert" > or use that vendor code and turn it into mainline driver, especially > without TRM which is not available for all/most of them, would be great. > > I'm wondering if Exynos850 device has the same issue as on 7420 (and > probably 8890/7578 and maybe also other 64 bit Exynos devices) - broken > firmware. For example i had to specify in dts timer clock frequency, on > few devices there is also a problem with timer registers not properly > configured by FW, which probably won't be fixed by vendor and patches > with workaround for it in kernel were rejected :/. Hi Pawe=C5=82, Sorry for the late reply. Thanks for your input! I just started implementing the clock driver, and maybe I can share some useful stuff in exchange. ECT parser: in downstream kernel there is an option to dump ECT tables via some DebugFS file. I did that, and it seems to me it would be easier to just hard code necessary table in corresponding drivers code. E.g., PLL tables can be hard-coded in the clock driver (which is how it seems to be implemented for other Exynos SoC upstream anyway). So I don't think there is a huge need to upstream ECT parser itself. But dumping the tables can be useful to implement corresponding drivers (clocks, DVFS, APM, etc). Investigating downstream clock driver for Exynos850 and its dependencies (like VCLK, RA, CMUCAL), I figured it's much easier to implement the clock driver completely from scratch. Looking into clk-exynos7.c and clk-exynos5433.c implementation, this is probably how upstream design should look like. And it has nothing to do with downstream implementation. E.g., downstream driver has one single CMU node in dts (for the whole clock subsystem), but for upstream drivers we want to have separate nodes for each particular CMU. Also downstream implementation is over-complicated; that might have some sense for the vendor, if they have a bunch of similar SoCs or sharing driver code between different OS kernels, but for upstream kernel it's just unneeded complexity (several layers of abstraction that should be just removed, and useful stuff should be integrated in already existing upstream infrastructure). So I ended up using TRM and trying to make something similar to mentioned upstream drivers. Of course, there are some questions on whether we should use manual clocks control, or rely on automatic clock gating and Q-channel communication. But I'm having some progress already, and hopefully will submit the minimal driver in a week or so. As for downstream design and how to make a sense of it, for converting that to something more upstreamable, here is what I figured. 1. Clock driver (clk-exynosXXXX.c) registers some vclk clocks ("Virtual Clocks"). Those are clocks which will be actually used. But those are lacking any hardware specific data yet (like register offsets, etc). 2. ".calid" field from those vclk's is used to find more hardware-related info (later in run-time) for those registered clocks, from cmucal-node.c file. That file contains actual parent information and some info on HW stuff, but not real addresses/offset, but only indexes. 3. Those indexes are resolved further (in run-time), obtaining actual offsets from cmucal-sfr.c file, in ra_init() function. 4. Instead of using existing CCF clocks, custom vclk clock ops are used. Those are defined in composite.c (has nothing to do with CCF composite clocks). So the whole VCLK type looks like vendor re-implementation of composite clocks. For example, one VCLK clock can have the whole list of clocks which will be controlled via that single VCLK clock, and all operations will be called for each clock from the list. 5. Further those operations are actually calling the code from ra.c, different functions are used for different clock types (PLL_TYPE, MUX_TYPE, etc). So if you're curious about actual ops implementation (like PLL, muxes, etc), just look there. That should be enough to convert downstream driver to upstream one. Basically one can use downstream source code to figure out info about registers and offsets (from cmucal-sfr.c) and info about internal clocks structure from cmucal-node.c and cmucal-vclk.c, and implement everything from scratch using clk-exynos7.c/clk-exynos5433.c as a template. I'd say it's easier to just use TRM for that, though :) As for the broken firmware and clock freq registers: yes, CNTFRQ_EL0 registers wasn't set in EL3 firmware too, so I'm setting the "clock-frequency" property for arch timer in dts as a workaround right now, in my local tree. But I already let vendor guys know about that problem, and they are trying to fix that right now (at least for Exynos850 SoC). Thanks! > > > >> And should I maybe add RFC tag for those? > > > > No need. Drivers can be merged before DTS users. > > > > Best regards, > > Krzysztof > > > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 97DACC433EF for ; Mon, 6 Sep 2021 15:19:12 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 653DD60F12 for ; Mon, 6 Sep 2021 15:19:12 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 653DD60F12 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=iZhKI2XiAQl6jiGERQnH2YKKU4gFaHVUVXykWFhfXW8=; b=NWCEFLA2n7V9ht YiuyMNdxGx2cRqiHTbclaPGAd6XhUlFvAGyq0es52a8z49Qck8P2QdzZ6l90zLjDcjcGzKHr4g/sv k0hofXILlI4wOieB3yfUwbr5v6B9QvZWz2tP6D3uyDEUKe1NaHiE1rnmKafOm+G++Lq/DxFqGSsjF FYsFVJlJB7hCg3r4GPP6SWCqzOYb8Q5qVjvQhX9qwms0rvZkQ42GlkdM4/P/f034GBOj8hjOVlRzX mgBPZAZ/RoTOaksxZ4QYwYH053pBg42gTcBoLEu8+yr7jIWXqOJsdOrofB7VcjWINpHFEMhDv9bht XfvY1zgUU3NELQIcpQOA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mNGMv-001D05-BQ; Mon, 06 Sep 2021 15:17:09 +0000 Received: from mail-ua1-x933.google.com ([2607:f8b0:4864:20::933]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mNGMr-001CzD-Hs for linux-arm-kernel@lists.infradead.org; Mon, 06 Sep 2021 15:17:07 +0000 Received: by mail-ua1-x933.google.com with SMTP id 75so3969734uav.8 for ; Mon, 06 Sep 2021 08:17:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=bQrcOPSf7pBZJCYQQnVkSrgNEesYDMSFecU9BQuGKZU=; b=zYe9FR9ZNaFmXa/bzWa/4JbqZVIulgJ6lbYskzgikyVc6Og/9TOjcJKnIjDb1eEucZ kG1X8tg1HoGjsJ95+BxJb243vLWeu00fyyYGcVmkyEO44lBEJ6TEVhBrkiDs3dyaCZui It/w80qNYdvf6f1NrDkZnuYNfWGMD331qsX1YEMeiAaO+LCSbB5oRh9OevAwdfydjhMI 4gk9S+zG+gEquPWYXFTPSehBZME3pX38EZruq85WmqlX2awokHjcXOkR1NPpzRRMjsNO VffyLSHsnQwJy4HqiGq4WZLxNQUPVBkJW5ejLYE2bhDuxgbHNojK1rp1+I0cVZFU3N1s cPUA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=bQrcOPSf7pBZJCYQQnVkSrgNEesYDMSFecU9BQuGKZU=; b=bsPq+ZZUpsLuad5Fl3OXDAPcmLTGwuyUQWJYg99NpdmAwZBvfMRv02s+78RprMRnXx y8LleUpn0T2q/VIgKMN+sA0zSvupnT35voEyzlF0H+jd9krHJ6BPRiJ0POxSoCCPYaOc 5WEID9l/qq40vTau1lzyUttQaulZbjVaXILDJeKLC1wKAwU07LijsXj0NQ+LR2UO7hb8 f1zb4n0gIbTH5OGcRvMyx9uTXeoOUBHdSxPaEXT/e1bgUUfxKGZa5nFsWVeMFDAwG2yO b5CEHGGd3RdsEVHdiHB7gTkk1tlcr0RIKiUyoOBnTiavE63NbluH1VGVa0ffnkzObYSQ E5mA== X-Gm-Message-State: AOAM530iQ3u+iuTry5L+g/Ym79BXxFt4IwPvVOicteYczTvhteeQeoYJ +XnlOyGiDS6+8cE9BLXL+nlc/yprpVB0Op9klV9wmw== X-Google-Smtp-Source: ABdhPJwRm+FKxm0YSP8+0/3Dgu/q6YVV1RAAkL/Hx1QxF9PMM6RdemkterGZszBPDz4vhjLfYOArLtkqbVaXsEbQvhE= X-Received: by 2002:ab0:3303:: with SMTP id r3mr6027322uao.17.1630941423339; Mon, 06 Sep 2021 08:17:03 -0700 (PDT) MIME-Version: 1.0 References: <20210730144922.29111-1-semen.protsenko@linaro.org> <20210730144922.29111-13-semen.protsenko@linaro.org> <455cfb5e-dff7-a5c0-3875-49abe3e900f3@canonical.com> <68734f6c-fc76-595c-8d34-8924dbbbb845@canonical.com> <50f84842-c397-8012-af95-e9d9fce53162@gmail.com> In-Reply-To: <50f84842-c397-8012-af95-e9d9fce53162@gmail.com> From: Sam Protsenko Date: Mon, 6 Sep 2021 18:16:51 +0300 Message-ID: Subject: Re: [PATCH 12/12] arm64: dts: exynos: Add Exynos850 SoC support To: =?UTF-8?Q?Pawe=C5=82_Chmiel?= Cc: Krzysztof Kozlowski , Sylwester Nawrocki , Chanwoo Choi , Linus Walleij , Tomasz Figa , Rob Herring , Stephen Boyd , Michael Turquette , Jiri Slaby , Greg Kroah-Hartman , Charles Keepax , Ryu Euiyoul , Tom Gall , Sumit Semwal , John Stultz , Amit Pundir , devicetree , linux-arm Mailing List , linux-clk , "open list:GPIO SUBSYSTEM" , Linux Kernel Mailing List , Linux Samsung SOC , "open list:SERIAL DRIVERS" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210906_081705_648903_36720ACA X-CRM114-Status: GOOD ( 60.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gRnJpLCA2IEF1ZyAyMDIxIGF0IDIzOjMyLCBQYXdlxYIgQ2htaWVsCjxwYXdlbC5taWtvbGFq LmNobWllbEBnbWFpbC5jb20+IHdyb3RlOgo+Cj4gVyBkbml1IDA2LjA4LjIwMjEgbyAxNDozMiwg S3J6eXN6dG9mIEtvemxvd3NraSBwaXN6ZToKPiA+IE9uIDA2LzA4LzIwMjEgMTQ6MDcsIFNhbSBQ cm90c2Vua28gd3JvdGU6Cj4gPj4gT24gRnJpLCA2IEF1ZyAyMDIxIGF0IDEwOjQ5LCBLcnp5c3p0 b2YgS296bG93c2tpCj4gPj4gPGtyenlzenRvZi5rb3psb3dza2lAY2Fub25pY2FsLmNvbT4gd3Jv dGU6Cj4gPj4+Cj4gPj4+IE9uIDA2LzA4LzIwMjEgMDE6MDYsIFNhbSBQcm90c2Vua28gd3JvdGU6 Cj4gPj4+PiBPbiBTYXQsIDMxIEp1bCAyMDIxIGF0IDEyOjAzLCBLcnp5c3p0b2YgS296bG93c2tp Cj4gPj4+PiA8a3J6eXN6dG9mLmtvemxvd3NraUBjYW5vbmljYWwuY29tPiB3cm90ZToKPiA+Pj4+ Cj4gPj4+Pj4+Cj4gPj4+Pj4+IFRoaXMgcGF0Y2ggYWRkcyBtaW5pbWFsIFNvQyBzdXBwb3J0LiBQ YXJ0aWN1bGFyIGJvYXJkIGRldmljZSB0cmVlIGZpbGVzCj4gPj4+Pj4+IGNhbiBpbmNsdWRlIGV4 eW5vczg1MC5kdHNpIGZpbGUgdG8gZ2V0IFNvQyByZWxhdGVkIG5vZGVzLCBhbmQgdGhlbgo+ID4+ Pj4+PiByZWZlcmVuY2UgdGhvc2Ugbm9kZXMgZnVydGhlciBhcyBuZWVkZWQuCj4gPj4+Pj4+Cj4g Pj4+Pj4+IFNpZ25lZC1vZmYtYnk6IFNhbSBQcm90c2Vua28gPHNlbWVuLnByb3RzZW5rb0BsaW5h cm8ub3JnPgo+ID4+Pj4+PiAtLS0KPiA+Pj4+Pj4gICAuLi4vYm9vdC9kdHMvZXh5bm9zL2V4eW5v czg1MC1waW5jdHJsLmR0c2kgICAgfCA3ODIgKysrKysrKysrKysrKysrKysrCj4gPj4+Pj4+ICAg YXJjaC9hcm02NC9ib290L2R0cy9leHlub3MvZXh5bm9zODUwLXVzaS5kdHNpIHwgIDMwICsKPiA+ Pj4+Pj4gICBhcmNoL2FybTY0L2Jvb3QvZHRzL2V4eW5vcy9leHlub3M4NTAuZHRzaSAgICAgfCAy NDUgKysrKysrCj4gPj4+Pj4KPiA+Pj4+PiBOb3QgYnVpbGRhYmxlLiBNaXNzaW5nIE1ha2VmaWxl LCBtaXNzaW5nIERUUy4gUGxlYXNlIHN1Ym1pdCB3aXRoIGluaXRpYWwKPiA+Pj4+PiBEVFMsIG90 aGVyd2lzZSBubyBvbmUgaXMgYWJsZSB0byB2ZXJpZnkgaXQgZXZlbiBjb21waWxlcy4KPiA+Pj4+ Pgo+ID4+Pj4KPiA+Pj4+IFRoaXMgZGV2aWNlIGlzIG5vdCBhdmFpbGFibGUgZm9yIHB1cmNoYXNl IHlldC4gSSdsbCBzZW5kIHRoZSBwYXRjaCBmb3IKPiA+Pj4+IGJvYXJkIGR0cyBvbmNlIGl0J3Mg YW5ub3VuY2VkLiBJIGNhbiBkbyBhbGwgdGhlIHRlc3RpbmcgZm9yIG5vdywgaWYKPiA+Pj4+IHlv dSBoYXZlIGFueSBzcGVjaWZpYyByZXF1ZXN0cy4gV291bGQgaXQgYmUgcG9zc2libGUgZm9yIHVz IHRvIHJldmlldwo+ID4+Pj4gYW5kIGFwcGx5IG9ubHkgU29DIHN1cHBvcnQgZm9yIG5vdz8gV2ls bCBzZW5kIHYyIHNvb24uLi4KPiA+Pj4KPiA+Pj4gV2hhdCB5b3UgcHJvcG9zZSBpcyBlcXVhbCB0 byBhZGRpbmcgYSBkcml2ZXIgKEMgc291cmNlIGNvZGUpIHdpdGhvdXQKPiA+Pj4gYWJpbGl0eSB0 byBjb21waWxlIGl0LiBXaGF0J3MgdGhlIHBvaW50IG9mIGhhdmluZyBpdCBpbiB0aGUga2VybmVs PyBJdCdzCj4gPj4+IHVudmVyaWZpYWJsZSwgdW5idWlsZGFibGUgYW5kIHVudXNhYmxlLgo+ID4+ Pgo+ID4+Cj4gPj4gWWVzLCBJIHVuZGVyc3RhbmQuIFRoYXQncyBhZGRpbmcgY29kZSB3aXRoIG5v IHVzZXJzLCBhbmQgaXQncyBub3QgYQo+ID4+IGdvb2QgcHJhY3RpY2UuCj4gPj4KPiA+Pj4gV2Ug Y2FuIHJldmlldyB0aGUgRFRTSSBob3dldmVyIG1lcmdpbmcgaGFzIHRvIGJlIHdpdGggYSBEVFMu IFVzdWFsbHkgdGhlCj4gPj4+IFNvQyB2ZW5kb3IgYWRkcyBmaXJzdCBhbiBldmFsa2l0IChlLmcu IFNNREsgYm9hcmQpLiBNYXliZSB5b3UgaGF2ZSBvbmUKPiA+Pj4gZm9yIEV4eW5vczg1MD8gT3Ro ZXJ3aXNlIGlmIHlvdSBjYW5ub3QgZGlzY2xvc2UgdGhlIGFjdHVhbCBib2FyZCwgdGhlCj4gPj4+ IERUU0kgd2lsbCBoYXZlIHRvIHdhaXQuIFlvdSBjYW4gc3VibWl0IGRyaXZlcnMsIHRob3VnaC4K PiA+Pj4KPiA+Pgo+ID4+IFN1cmUsIGxldCdzIGdvIHRoaXMgd2F5LiBJJ2xsIHNlbmQgdjIgc29v bi4gSW1wcm92aW5nIHBhdGNoZXMgYW5kCj4gPj4gaGF2aW5nIFJldmlld2VkLWJ5IHRhZyBmb3Ig dGhvc2Ugd291bGQgZ29vZCBlbm91Z2ggZm9yIG1lIGF0IHRoaXMKPiA+PiBwb2ludC4gSSdsbCBj b250aW51ZSB0byBwcmVwYXJlIGFub3RoZXIgRXh5bm9zODUwIHJlbGF0ZWQgcGF0Y2hlcwo+ID4+ IHVudGlsIHRoZSBhY3R1YWwgYm9hcmQgaXMgYW5ub3VuY2VkLCBsaWtlIHByb3BlciBjbG9jayBk cml2ZXIsIHJlc2V0LAo+ID4+IE1NQywgZXRjLiBJcyBpdCBvayBpZiBJIHNlbmQgdGhvc2UgZm9y IGEgcmV2aWV3IHRvbyAoc28gSSBjYW4gZml4IGFsbAo+ID4+IGlzc3VlcyBhaGVhZCk/Cj4gPgo+ ID4gU3VyZSwgcHJlcGFyZSBhbGwgbmVjZXNzYXJ5IGRyaXZlcnMgZWFybGllci4gSSBzdXNwZWN0 IGNsb2NrcyB3aWxsIGJlIGEKPiA+IHJlYWwgcGFpbiBiZWNhdXNlIG9mIHNpZ25pZmljYW50IGNo YW5nZXMgbW9kZWxlZCBpbiB2ZW5kb3Iga2VybmVsLiBJCj4gPiByZW1lbWJlciBQYXdlxYIgQ2ht aWVsICgrQ2MpIHdhcyBkb2luZyBzb21ldGhpbmcgZm9yIHRoZXNlOgo+ID4gaHR0cHM6Ly9naXRo dWIuY29tL1BhYmxvUEwvbGludXgvdHJlZS9leHlub3M3NDIwCj4gPgo+ID4gSSBtZW50aW9uZWQg YmVmb3JlIC0geW91IHNob3VsZCBhbHNvIG1vZGlmeSB0aGUgY2hpcGlkIGRyaXZlci4gQ2hlY2sK PiA+IGFsc28gb3RoZXIgZHJpdmVycyBpbiBkcml2ZXJzL3NvYy9zYW1zdW5nLCBhbHRob3VnaCBz b21lIGFyZSBuZWVkZWQgb25seQo+ID4gZm9yIHN1c3BlbmQmcmVzdW1lLgo+ID4KPiA+IEJUVywg UGF3ZcWCLAo+ID4gSG93IGlzIHlvdXIgRXh5bm9zNzQyMCBwcm9ncmVzcz8gOikKPiBIaQo+Cj4g U2FkbHkgaSBoYWQgdG8gcG9zdHBvbmUgaXQgZm9yIGEgd2hpbGUuIE1heWJlIHdpbGwgaGF2ZSBt b3JlIHRpbWUgbm93IHRvCj4gZ2V0IGJhY2sgdG8gaXQuCj4KPiBBYm91dCBjbG9jayBkcml2ZXIu IEluIHZlbmRvciBzb3VyY2VzIHRoZXJlIGlzIGNsayBkcml2ZXIgd2l0aCBzb21ldGhpbmcKPiBj YWxsZWQgdmlydHVhbCBjbG9ja3MgKGRpZmZlcmVudCB0aGFuIHJlYWwgb25lcykuIFRoYXQgZHJp dmVyIGNhbGxzCj4gYW5vdGhlciBkcml2ZXIgY2FsbGVkIHB3cmNhbCwgcmVzcG9uc2libGUgZm9y IHJlYWwgbWFuaXB1bGF0aW9uIG9mCj4gY2xvY2tzIGluIGhhcmR3YXJlLiBUaGlzIG9uZSBoYXMg aW5mbyBhYm91dCByZWFsIGNsb2NrcyBhbmQgYWxzbwo+IGFkZGl0aW9uYWwgaW5mbyBhYm91dCBm b3IgZXhhbXBsZSByYXRlIGZvciBzb21lIG9mIHRoZW0sIHdoaWNoIGlzIHJlYWQKPiBmcm9tIGJp bmFyeSBmcm9tIG1lbW9yeSwgYnkgYW5vdGhlciBkcml2ZXIgY2FsbGVkIGVjdF9wYXJzZXIgaW4g Y2FzZSBvZgo+IGRldmljZXMgYXQgd2hpY2ggaSBkaWQgbG9va2VkLgo+Cj4gSW4gbXkgY2FzZSBp IHdhcyBhYmxlIHRvIGZpbmQgc29tZSBtb3JlIGluZm8gYWJvdXQgcmVhbCBjbG9ja3MgdGhlcmUg LQo+IGZvciBleGFtcGxlIHJlZ2lzdGVyIG5hbWVzIGFuZCBvZmZzZXRzCj4gaHR0cHM6Ly9naXRo dWIuY29tL2tyemsvbGludXgtdmVuZG9yLWJhY2t1cC9ibG9iL21va2VlL2FuZHJvaWQtMy4xOC1z YW1zdW5nLWdhbGF4eS1zNy1zbS1nOTMwZi1leHlub3M4ODkwL2RyaXZlcnMvc29jL3NhbXN1bmcv cHdyY2FsL1M1RTg4OTAvUzVFODg5MC1jbXVzZnIuaAo+IGFuZCBzb21lIGNsb2NrcyBoaWVyYXJj aHkgaW5mbyBpbnNpZGUKPiBodHRwczovL2dpdGh1Yi5jb20va3J6ay9saW51eC12ZW5kb3ItYmFj a3VwL2Jsb2IvbW9rZWUvYW5kcm9pZC0zLjE4LXNhbXN1bmctZ2FsYXh5LXM3LXNtLWc5MzBmLWV4 eW5vczg4OTAvZHJpdmVycy9zb2Mvc2Ftc3VuZy9wd3JjYWwvUzVFODg5MC9TNUU4ODkwLWNtdS5j Cj4gYnV0IHRoZXJlIHdhcyBzdGlsbCBtYW55IGluZm8gbWlzc2luZy4KPgo+IEZpbmRpbmcgYSB3 YXkgKHdoaWNoIGNvdWxkIGJlIGFwcGxpZWQgdG8gb3RoZXIgRXh5bm9zIFNPQykgdG8gImNvbnZl cnQiCj4gb3IgdXNlIHRoYXQgdmVuZG9yIGNvZGUgYW5kIHR1cm4gaXQgaW50byBtYWlubGluZSBk cml2ZXIsIGVzcGVjaWFsbHkKPiB3aXRob3V0IFRSTSB3aGljaCBpcyBub3QgYXZhaWxhYmxlIGZv ciBhbGwvbW9zdCBvZiB0aGVtLCB3b3VsZCBiZSBncmVhdC4KPgo+IEknbSB3b25kZXJpbmcgaWYg RXh5bm9zODUwIGRldmljZSBoYXMgdGhlIHNhbWUgaXNzdWUgYXMgb24gNzQyMCAoYW5kCj4gcHJv YmFibHkgODg5MC83NTc4IGFuZCBtYXliZSBhbHNvIG90aGVyIDY0IGJpdCBFeHlub3MgZGV2aWNl cykgLSBicm9rZW4KPiBmaXJtd2FyZS4gRm9yIGV4YW1wbGUgaSBoYWQgdG8gc3BlY2lmeSBpbiBk dHMgdGltZXIgY2xvY2sgZnJlcXVlbmN5LCBvbgo+IGZldyBkZXZpY2VzIHRoZXJlIGlzIGFsc28g YSBwcm9ibGVtIHdpdGggdGltZXIgcmVnaXN0ZXJzIG5vdCBwcm9wZXJseQo+IGNvbmZpZ3VyZWQg YnkgRlcsIHdoaWNoIHByb2JhYmx5IHdvbid0IGJlIGZpeGVkIGJ5IHZlbmRvciBhbmQgcGF0Y2hl cwo+IHdpdGggd29ya2Fyb3VuZCBmb3IgaXQgaW4ga2VybmVsIHdlcmUgcmVqZWN0ZWQgOi8uCgpI aSBQYXdlxYIsCgpTb3JyeSBmb3IgdGhlIGxhdGUgcmVwbHkuIFRoYW5rcyBmb3IgeW91ciBpbnB1 dCEgSSBqdXN0IHN0YXJ0ZWQKaW1wbGVtZW50aW5nIHRoZSBjbG9jayBkcml2ZXIsIGFuZCBtYXli ZSBJIGNhbiBzaGFyZSBzb21lIHVzZWZ1bCBzdHVmZgppbiBleGNoYW5nZS4KCkVDVCBwYXJzZXI6 IGluIGRvd25zdHJlYW0ga2VybmVsIHRoZXJlIGlzIGFuIG9wdGlvbiB0byBkdW1wIEVDVCB0YWJs ZXMKdmlhIHNvbWUgRGVidWdGUyBmaWxlLiBJIGRpZCB0aGF0LCBhbmQgaXQgc2VlbXMgdG8gbWUg aXQgd291bGQgYmUKZWFzaWVyIHRvIGp1c3QgaGFyZCBjb2RlIG5lY2Vzc2FyeSB0YWJsZSBpbiBj b3JyZXNwb25kaW5nIGRyaXZlcnMKY29kZS4gRS5nLiwgUExMIHRhYmxlcyBjYW4gYmUgaGFyZC1j b2RlZCBpbiB0aGUgY2xvY2sgZHJpdmVyICh3aGljaCBpcwpob3cgaXQgc2VlbXMgdG8gYmUgaW1w bGVtZW50ZWQgZm9yIG90aGVyIEV4eW5vcyBTb0MgdXBzdHJlYW0gYW55d2F5KS4KU28gSSBkb24n dCB0aGluayB0aGVyZSBpcyBhIGh1Z2UgbmVlZCB0byB1cHN0cmVhbSBFQ1QgcGFyc2VyIGl0c2Vs Zi4KQnV0IGR1bXBpbmcgdGhlIHRhYmxlcyBjYW4gYmUgdXNlZnVsIHRvIGltcGxlbWVudCBjb3Jy ZXNwb25kaW5nCmRyaXZlcnMgKGNsb2NrcywgRFZGUywgQVBNLCBldGMpLgoKSW52ZXN0aWdhdGlu ZyBkb3duc3RyZWFtIGNsb2NrIGRyaXZlciBmb3IgRXh5bm9zODUwIGFuZCBpdHMKZGVwZW5kZW5j aWVzIChsaWtlIFZDTEssIFJBLCBDTVVDQUwpLCBJIGZpZ3VyZWQgaXQncyBtdWNoIGVhc2llciB0 bwppbXBsZW1lbnQgdGhlIGNsb2NrIGRyaXZlciBjb21wbGV0ZWx5IGZyb20gc2NyYXRjaC4gTG9v a2luZyBpbnRvCmNsay1leHlub3M3LmMgYW5kIGNsay1leHlub3M1NDMzLmMgaW1wbGVtZW50YXRp b24sIHRoaXMgaXMgcHJvYmFibHkKaG93IHVwc3RyZWFtIGRlc2lnbiBzaG91bGQgbG9vayBsaWtl LiBBbmQgaXQgaGFzIG5vdGhpbmcgdG8gZG8gd2l0aApkb3duc3RyZWFtIGltcGxlbWVudGF0aW9u LiBFLmcuLCBkb3duc3RyZWFtIGRyaXZlciBoYXMgb25lIHNpbmdsZSBDTVUKbm9kZSBpbiBkdHMg KGZvciB0aGUgd2hvbGUgY2xvY2sgc3Vic3lzdGVtKSwgYnV0IGZvciB1cHN0cmVhbSBkcml2ZXJz CndlIHdhbnQgdG8gaGF2ZSBzZXBhcmF0ZSBub2RlcyBmb3IgZWFjaCBwYXJ0aWN1bGFyIENNVS4g QWxzbwpkb3duc3RyZWFtIGltcGxlbWVudGF0aW9uIGlzIG92ZXItY29tcGxpY2F0ZWQ7IHRoYXQg bWlnaHQgaGF2ZSBzb21lCnNlbnNlIGZvciB0aGUgdmVuZG9yLCBpZiB0aGV5IGhhdmUgYSBidW5j aCBvZiBzaW1pbGFyIFNvQ3Mgb3Igc2hhcmluZwpkcml2ZXIgY29kZSBiZXR3ZWVuIGRpZmZlcmVu dCBPUyBrZXJuZWxzLCBidXQgZm9yIHVwc3RyZWFtIGtlcm5lbCBpdCdzCmp1c3QgdW5uZWVkZWQg Y29tcGxleGl0eSAoc2V2ZXJhbCBsYXllcnMgb2YgYWJzdHJhY3Rpb24gdGhhdCBzaG91bGQgYmUK anVzdCByZW1vdmVkLCBhbmQgdXNlZnVsIHN0dWZmIHNob3VsZCBiZSBpbnRlZ3JhdGVkIGluIGFs cmVhZHkKZXhpc3RpbmcgdXBzdHJlYW0gaW5mcmFzdHJ1Y3R1cmUpLiBTbyBJIGVuZGVkIHVwIHVz aW5nIFRSTSBhbmQgdHJ5aW5nCnRvIG1ha2Ugc29tZXRoaW5nIHNpbWlsYXIgdG8gbWVudGlvbmVk IHVwc3RyZWFtIGRyaXZlcnMuIE9mIGNvdXJzZSwKdGhlcmUgYXJlIHNvbWUgcXVlc3Rpb25zIG9u IHdoZXRoZXIgd2Ugc2hvdWxkIHVzZSBtYW51YWwgY2xvY2tzCmNvbnRyb2wsIG9yIHJlbHkgb24g YXV0b21hdGljIGNsb2NrIGdhdGluZyBhbmQgUS1jaGFubmVsCmNvbW11bmljYXRpb24uIEJ1dCBJ J20gaGF2aW5nIHNvbWUgcHJvZ3Jlc3MgYWxyZWFkeSwgYW5kIGhvcGVmdWxseQp3aWxsIHN1Ym1p dCB0aGUgbWluaW1hbCBkcml2ZXIgaW4gYSB3ZWVrIG9yIHNvLgoKQXMgZm9yIGRvd25zdHJlYW0g ZGVzaWduIGFuZCBob3cgdG8gbWFrZSBhIHNlbnNlIG9mIGl0LCBmb3IgY29udmVydGluZwp0aGF0 IHRvIHNvbWV0aGluZyBtb3JlIHVwc3RyZWFtYWJsZSwgaGVyZSBpcyB3aGF0IEkgZmlndXJlZC4K CjEuIENsb2NrIGRyaXZlciAoY2xrLWV4eW5vc1hYWFguYykgcmVnaXN0ZXJzIHNvbWUgdmNsayBj bG9ja3MKKCJWaXJ0dWFsIENsb2NrcyIpLiBUaG9zZSBhcmUgY2xvY2tzIHdoaWNoIHdpbGwgYmUg YWN0dWFsbHkgdXNlZC4gQnV0CnRob3NlIGFyZSBsYWNraW5nIGFueSBoYXJkd2FyZSBzcGVjaWZp YyBkYXRhIHlldCAobGlrZSByZWdpc3RlcgpvZmZzZXRzLCBldGMpLgoKMi4gIi5jYWxpZCIgZmll bGQgZnJvbSB0aG9zZSB2Y2xrJ3MgaXMgdXNlZCB0byBmaW5kIG1vcmUKaGFyZHdhcmUtcmVsYXRl ZCBpbmZvIChsYXRlciBpbiBydW4tdGltZSkgZm9yIHRob3NlIHJlZ2lzdGVyZWQgY2xvY2tzLApm cm9tIGNtdWNhbC1ub2RlLmMgZmlsZS4gVGhhdCBmaWxlIGNvbnRhaW5zIGFjdHVhbCBwYXJlbnQg aW5mb3JtYXRpb24KYW5kIHNvbWUgaW5mbyBvbiBIVyBzdHVmZiwgYnV0IG5vdCByZWFsIGFkZHJl c3Nlcy9vZmZzZXQsIGJ1dCBvbmx5CmluZGV4ZXMuCgozLiBUaG9zZSBpbmRleGVzIGFyZSByZXNv bHZlZCBmdXJ0aGVyIChpbiBydW4tdGltZSksIG9idGFpbmluZyBhY3R1YWwKb2Zmc2V0cyBmcm9t IGNtdWNhbC1zZnIuYyBmaWxlLCBpbiByYV9pbml0KCkgZnVuY3Rpb24uCgo0LiBJbnN0ZWFkIG9m IHVzaW5nIGV4aXN0aW5nIENDRiBjbG9ja3MsIGN1c3RvbSB2Y2xrIGNsb2NrIG9wcyBhcmUKdXNl ZC4gVGhvc2UgYXJlIGRlZmluZWQgaW4gY29tcG9zaXRlLmMgKGhhcyBub3RoaW5nIHRvIGRvIHdp dGggQ0NGCmNvbXBvc2l0ZSBjbG9ja3MpLiBTbyB0aGUgd2hvbGUgVkNMSyB0eXBlIGxvb2tzIGxp a2UgdmVuZG9yCnJlLWltcGxlbWVudGF0aW9uIG9mIGNvbXBvc2l0ZSBjbG9ja3MuIEZvciBleGFt cGxlLCBvbmUgVkNMSyBjbG9jayBjYW4KaGF2ZSB0aGUgd2hvbGUgbGlzdCBvZiBjbG9ja3Mgd2hp Y2ggd2lsbCBiZSBjb250cm9sbGVkIHZpYSB0aGF0IHNpbmdsZQpWQ0xLIGNsb2NrLCBhbmQgYWxs IG9wZXJhdGlvbnMgd2lsbCBiZSBjYWxsZWQgZm9yIGVhY2ggY2xvY2sgZnJvbSB0aGUKbGlzdC4K CjUuIEZ1cnRoZXIgdGhvc2Ugb3BlcmF0aW9ucyBhcmUgYWN0dWFsbHkgY2FsbGluZyB0aGUgY29k ZSBmcm9tIHJhLmMsCmRpZmZlcmVudCBmdW5jdGlvbnMgYXJlIHVzZWQgZm9yIGRpZmZlcmVudCBj bG9jayB0eXBlcyAoUExMX1RZUEUsCk1VWF9UWVBFLCBldGMpLiBTbyBpZiB5b3UncmUgY3VyaW91 cyBhYm91dCBhY3R1YWwgb3BzIGltcGxlbWVudGF0aW9uCihsaWtlIFBMTCwgbXV4ZXMsIGV0Yyks IGp1c3QgbG9vayB0aGVyZS4KClRoYXQgc2hvdWxkIGJlIGVub3VnaCB0byBjb252ZXJ0IGRvd25z dHJlYW0gZHJpdmVyIHRvIHVwc3RyZWFtIG9uZS4KQmFzaWNhbGx5IG9uZSBjYW4gdXNlIGRvd25z dHJlYW0gc291cmNlIGNvZGUgdG8gZmlndXJlIG91dCBpbmZvIGFib3V0CnJlZ2lzdGVycyBhbmQg b2Zmc2V0cyAoZnJvbSBjbXVjYWwtc2ZyLmMpIGFuZCBpbmZvIGFib3V0IGludGVybmFsCmNsb2Nr cyBzdHJ1Y3R1cmUgZnJvbSBjbXVjYWwtbm9kZS5jIGFuZCBjbXVjYWwtdmNsay5jLCBhbmQgaW1w bGVtZW50CmV2ZXJ5dGhpbmcgZnJvbSBzY3JhdGNoIHVzaW5nIGNsay1leHlub3M3LmMvY2xrLWV4 eW5vczU0MzMuYyBhcyBhCnRlbXBsYXRlLiBJJ2Qgc2F5IGl0J3MgZWFzaWVyIHRvIGp1c3QgdXNl IFRSTSBmb3IgdGhhdCwgdGhvdWdoIDopCgpBcyBmb3IgdGhlIGJyb2tlbiBmaXJtd2FyZSBhbmQg Y2xvY2sgZnJlcSByZWdpc3RlcnM6IHllcywgQ05URlJRX0VMMApyZWdpc3RlcnMgd2Fzbid0IHNl dCBpbiBFTDMgZmlybXdhcmUgdG9vLCBzbyBJJ20gc2V0dGluZyB0aGUKImNsb2NrLWZyZXF1ZW5j eSIgcHJvcGVydHkgZm9yIGFyY2ggdGltZXIgaW4gZHRzIGFzIGEgd29ya2Fyb3VuZCByaWdodApu b3csIGluIG15IGxvY2FsIHRyZWUuIEJ1dCBJIGFscmVhZHkgbGV0IHZlbmRvciBndXlzIGtub3cg YWJvdXQgdGhhdApwcm9ibGVtLCBhbmQgdGhleSBhcmUgdHJ5aW5nIHRvIGZpeCB0aGF0IHJpZ2h0 IG5vdyAoYXQgbGVhc3QgZm9yCkV4eW5vczg1MCBTb0MpLgoKVGhhbmtzIQoKPiA+Cj4gPj4gQW5k IHNob3VsZCBJIG1heWJlIGFkZCBSRkMgdGFnIGZvciB0aG9zZT8KPiA+Cj4gPiBObyBuZWVkLiBE cml2ZXJzIGNhbiBiZSBtZXJnZWQgYmVmb3JlIERUUyB1c2Vycy4KPiA+Cj4gPiBCZXN0IHJlZ2Fy ZHMsCj4gPiBLcnp5c3p0b2YKPiA+Cj4KCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fCmxpbnV4LWFybS1rZXJuZWwgbWFpbGluZyBsaXN0CmxpbnV4LWFybS1r ZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWls bWFuL2xpc3RpbmZvL2xpbnV4LWFybS1rZXJuZWwK