From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52509) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZbJHA-0001Fl-Qc for qemu-devel@nongnu.org; Sun, 13 Sep 2015 22:13:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZbJHA-0004Zb-0d for qemu-devel@nongnu.org; Sun, 13 Sep 2015 22:13:48 -0400 Received: from mail-wi0-x22b.google.com ([2a00:1450:400c:c05::22b]:37700) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZbJH9-0004ZX-QU for qemu-devel@nongnu.org; Sun, 13 Sep 2015 22:13:47 -0400 Received: by wicfx3 with SMTP id fx3so114294106wic.0 for ; Sun, 13 Sep 2015 19:13:47 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <1442135278-25281-2-git-send-email-edgar.iglesias@gmail.com> References: <1442135278-25281-1-git-send-email-edgar.iglesias@gmail.com> <1442135278-25281-2-git-send-email-edgar.iglesias@gmail.com> Date: Sun, 13 Sep 2015 19:13:46 -0700 Message-ID: From: Peter Crosthwaite Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH v2 1/8] hw/cpu/{a15mpcore, a9mpcore}: Handle missing has_el3 CPU props gracefully List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Edgar E. Iglesias" Cc: Edgar Iglesias , Peter Maydell , Alexander Graf , "qemu-devel@nongnu.org Developers" , serge.fdrv@gmail.com, alex.bennee@linaro.org On Sun, Sep 13, 2015 at 2:07 AM, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" > > Handle missing CPU support for EL3 gracefully. > What is the use case here? A9 and A15 should be able to not have EL3, but in this case the property should still exist but be set false. No prop should only be the case with a CPU that can't ever support EL3. Regards, Peter > Signed-off-by: Edgar E. Iglesias > --- > hw/cpu/a15mpcore.c | 2 +- > hw/cpu/a9mpcore.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c > index 4ef8db1..94e8cc1 100644 > --- a/hw/cpu/a15mpcore.c > +++ b/hw/cpu/a15mpcore.c > @@ -64,7 +64,7 @@ static void a15mp_priv_realize(DeviceState *dev, Error **errp) > * either all the CPUs have TZ, or none do. > */ > cpuobj = OBJECT(qemu_get_cpu(0)); > - has_el3 = object_property_find(cpuobj, "has_el3", &error_abort) && > + has_el3 = object_property_find(cpuobj, "has_el3", NULL) && > object_property_get_bool(cpuobj, "has_el3", &error_abort); > qdev_prop_set_bit(gicdev, "has-security-extensions", has_el3); > } > diff --git a/hw/cpu/a9mpcore.c b/hw/cpu/a9mpcore.c > index 7046246..869818c 100644 > --- a/hw/cpu/a9mpcore.c > +++ b/hw/cpu/a9mpcore.c > @@ -69,7 +69,7 @@ static void a9mp_priv_realize(DeviceState *dev, Error **errp) > * either all the CPUs have TZ, or none do. > */ > cpuobj = OBJECT(qemu_get_cpu(0)); > - has_el3 = object_property_find(cpuobj, "has_el3", &error_abort) && > + has_el3 = object_property_find(cpuobj, "has_el3", NULL) && > object_property_get_bool(cpuobj, "has_el3", &error_abort); > qdev_prop_set_bit(gicdev, "has-security-extensions", has_el3); > > -- > 1.9.1 > >