From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54441) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZbFye-0005NZ-TR for qemu-devel@nongnu.org; Sun, 13 Sep 2015 18:42:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZbFyd-0006fc-NW for qemu-devel@nongnu.org; Sun, 13 Sep 2015 18:42:28 -0400 Received: from mail-wi0-x22c.google.com ([2a00:1450:400c:c05::22c]:34238) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZbFyd-0006fR-Hi for qemu-devel@nongnu.org; Sun, 13 Sep 2015 18:42:27 -0400 Received: by wicfx3 with SMTP id fx3so118691483wic.1 for ; Sun, 13 Sep 2015 15:42:27 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: References: <1442091963-10658-1-git-send-email-linux@roeck-us.net> Date: Sun, 13 Sep 2015 15:42:26 -0700 Message-ID: From: Peter Crosthwaite Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH v2] hw/misc/zynq_slcr: Change CPU clock rate for Linux boots List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell , Michal Simek Cc: Peter Crosthwaite , Alistair Francis , "qemu-devel@nongnu.org Developers" , Guenter Roeck , Nathan Rossi On Sun, Sep 13, 2015 at 1:47 PM, Peter Maydell wrote: > On 13 September 2015 at 21:22, Peter Crosthwaite > wrote: >> On Sat, Sep 12, 2015 at 2:06 PM, Guenter Roeck wrote: >>> The Linux kernel only accepts 333334 Khz and 666667 Khz clock rates, and >>> may crash if the actual clock rate is too low. The clock rate used to be >>> (ps-clk-frequency * 26 / 4), which resulted in a CPU frequency of >>> 216666 Khz if ps-clk-frequency was set to 33333333 Hz. Change it to >>> (ps-clk-frequency * 20 / 2) = 333333 Khz for to make Linux happy. >>> Limit the change to Linux boots only. >>> >>> Signed-off-by: Guenter Roeck >>> >> >> Reviewed-by: Peter Crosthwaite >> >> Can this go via target-arm? (cc PMM). >> >> There may be more changes worth making on is_linux. I don't have the >> patch with the full list of FSBL-related SLCR changes handy and can't >> seem to find it in any modern Yocto trees. Wondering if Yocto still >> supports booting Zynq without FSBL (Nathan/Alistair may know more)? > > I'd prefer us not to propagate lots of "only if Linux boot" > changes into devices. The GIC *must* have these because the > kernel can't configure it otherwise from non-secure mode. > I'm not sure that applies here. > At least this change is a must. I have had this discussion with kernel people before and they insist that initing the PLLs and clocks to desired values is the job of the bootloader and the kernel reads back the values from this core. It is same philosophy at the GIC init, which is at the end of the day, done by some pre-boot software. The same bootloader (FSBL) makes other changes that kernels past present and future may rely on and it would be good to have those. Regards, Peter > thanks > -- PMM