From: Brian Cain <bcain@quicinc.com>
To: "Matheus Bernardino (QUIC)" <quic_mathbern@quicinc.com>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: Sid Manning <sidneym@quicinc.com>, "ale@rev.ng" <ale@rev.ng>,
"anjo@rev.ng" <anjo@rev.ng>,
"ltaylorsimpson@gmail.com" <ltaylorsimpson@gmail.com>
Subject: RE: [PATCH] Hexagon: add PC alignment check and exception
Date: Sat, 27 Apr 2024 03:50:41 +0000 [thread overview]
Message-ID: <CH3PR02MB1024736477D0FF232AD689F9FB8152@CH3PR02MB10247.namprd02.prod.outlook.com> (raw)
In-Reply-To: <c7af62451b02ffdc1d68bc00093b40a8080bc3ff.1714155331.git.quic_mathbern@quicinc.com>
> -----Original Message-----
> From: Matheus Bernardino (QUIC) <quic_mathbern@quicinc.com>
> Sent: Friday, April 26, 2024 1:16 PM
> To: qemu-devel@nongnu.org
> Cc: Brian Cain <bcain@quicinc.com>; Sid Manning <sidneym@quicinc.com>;
> ale@rev.ng; anjo@rev.ng; ltaylorsimpson@gmail.com
> Subject: [PATCH] Hexagon: add PC alignment check and exception
>
> The Hexagon Programmer's Reference Manual says that the exception 0x1e
> should be raised upon an unaligned program counter. Let's implement that
> and also add tests for both the most common case as well as packets with
> multiple change-of-flow instructions.
>
> Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Reviewed-by: Brian Cain <bcain@quicinc.com>
> ---
> target/hexagon/cpu_bits.h | 1 +
> target/hexagon/translate.h | 2 ++
> target/hexagon/genptr.c | 21 ++++++++++++++++-----
> target/hexagon/translate.c | 2 +-
> tests/tcg/hexagon/Makefile.target | 13 +++++++++++++
> tests/tcg/hexagon/unaligned_pc.S | 10 ++++++++++
> tests/tcg/hexagon/unaligned_pc_multi_cof.S | 13 +++++++++++++
> 7 files changed, 56 insertions(+), 6 deletions(-)
> create mode 100644 tests/tcg/hexagon/unaligned_pc.S
> create mode 100644 tests/tcg/hexagon/unaligned_pc_multi_cof.S
>
> diff --git a/target/hexagon/cpu_bits.h b/target/hexagon/cpu_bits.h
> index 96fef71729..d6900c8bda 100644
> --- a/target/hexagon/cpu_bits.h
> +++ b/target/hexagon/cpu_bits.h
> @@ -23,6 +23,7 @@
> #define HEX_EXCP_FETCH_NO_UPAGE 0x012
> #define HEX_EXCP_INVALID_PACKET 0x015
> #define HEX_EXCP_INVALID_OPCODE 0x015
> +#define HEX_EXCP_PC_NOT_ALIGNED 0x01e
> #define HEX_EXCP_PRIV_NO_UREAD 0x024
> #define HEX_EXCP_PRIV_NO_UWRITE 0x025
>
> diff --git a/target/hexagon/translate.h b/target/hexagon/translate.h
> index 4dd59c6726..daf11eb584 100644
> --- a/target/hexagon/translate.h
> +++ b/target/hexagon/translate.h
> @@ -75,6 +75,8 @@ typedef struct DisasContext {
> TCGv dczero_addr;
> } DisasContext;
>
> +void gen_exception_end_tb(DisasContext *ctx, int excp);
> +
> static inline void ctx_log_pred_write(DisasContext *ctx, int pnum)
> {
> if (!test_bit(pnum, ctx->pregs_written)) {
> diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c
> index dbae6c570a..c96edd9379 100644
> --- a/target/hexagon/genptr.c
> +++ b/target/hexagon/genptr.c
> @@ -473,6 +473,7 @@ static void gen_write_new_pc_addr(DisasContext
> *ctx, TCGv addr,
> TCGCond cond, TCGv pred)
> {
> TCGLabel *pred_false = NULL;
> + TCGLabel *branch_taken = NULL;
> if (cond != TCG_COND_ALWAYS) {
> pred_false = gen_new_label();
> tcg_gen_brcondi_tl(cond, pred, 0, pred_false);
> @@ -480,12 +481,22 @@ static void gen_write_new_pc_addr(DisasContext
> *ctx, TCGv addr,
>
> if (ctx->pkt->pkt_has_multi_cof) {
> /* If there are multiple branches in a packet, ignore the second one */
> - tcg_gen_movcond_tl(TCG_COND_NE, hex_gpr[HEX_REG_PC],
> - ctx->branch_taken, tcg_constant_tl(0),
> - hex_gpr[HEX_REG_PC], addr);
> + branch_taken = gen_new_label();
> + tcg_gen_brcondi_tl(TCG_COND_NE, ctx->branch_taken, 0,
> branch_taken);
> tcg_gen_movi_tl(ctx->branch_taken, 1);
> - } else {
> - tcg_gen_mov_tl(hex_gpr[HEX_REG_PC], addr);
> + }
> +
> + TCGLabel *pc_aligned = gen_new_label();
> + TCGv pc_remainder = tcg_temp_new();
> + tcg_gen_andi_tl(pc_remainder, addr, PCALIGN_MASK);
> + tcg_gen_brcondi_tl(TCG_COND_EQ, pc_remainder, 0, pc_aligned);
> + gen_exception_end_tb(ctx, HEX_EXCP_PC_NOT_ALIGNED);
> + gen_set_label(pc_aligned);
> +
> + tcg_gen_mov_tl(hex_gpr[HEX_REG_PC], addr);
> +
> + if (ctx->pkt->pkt_has_multi_cof) {
> + gen_set_label(branch_taken);
> }
>
> if (cond != TCG_COND_ALWAYS) {
> diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c
> index f163eefe97..e6ee63a53e 100644
> --- a/target/hexagon/translate.c
> +++ b/target/hexagon/translate.c
> @@ -185,7 +185,7 @@ static void gen_end_tb(DisasContext *ctx)
> ctx->base.is_jmp = DISAS_NORETURN;
> }
>
> -static void gen_exception_end_tb(DisasContext *ctx, int excp)
> +void gen_exception_end_tb(DisasContext *ctx, int excp)
> {
> gen_exec_counters(ctx);
> tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], ctx->next_PC);
> diff --git a/tests/tcg/hexagon/Makefile.target
> b/tests/tcg/hexagon/Makefile.target
> index f839b2c0d5..02d7fff34c 100644
> --- a/tests/tcg/hexagon/Makefile.target
> +++ b/tests/tcg/hexagon/Makefile.target
> @@ -51,6 +51,19 @@ HEX_TESTS += scatter_gather
> HEX_TESTS += hvx_misc
> HEX_TESTS += hvx_histogram
> HEX_TESTS += invalid-slots
> +HEX_TESTS += unaligned_pc
> +HEX_TESTS += unaligned_pc_multi_cof
> +
> +run-unaligned_pc: unaligned_pc
> +run-unaligned_pc_multi_cof: unaligned_pc_multi_cof
> +run-unaligned_pc run-unaligned_pc_multi_cof:
> + $(call run-test, $<, $(QEMU) $< 2> $<.stderr,"$< on
> $(TARGET_NAME)"); \
> + if [ $$? -ne 1 ] ; then \
> + return 1; \
> + fi
> + $(call quiet-command, \
> + grep -q "exception 0x1e" $<.stderr, \
> + "GREP", "exception 0x1e");
>
> run-and-check-exception = $(call run-test,$2,$3 2>$2.stderr; \
> test $$? -eq 1 && grep -q "exception $(strip $1)" $2.stderr)
> diff --git a/tests/tcg/hexagon/unaligned_pc.S
> b/tests/tcg/hexagon/unaligned_pc.S
> new file mode 100644
> index 0000000000..39d6b2060b
> --- /dev/null
> +++ b/tests/tcg/hexagon/unaligned_pc.S
> @@ -0,0 +1,10 @@
> +test:
> + allocframe(#0x8)
> + r0 = #0xffffffff
> + framekey = r0
> + dealloc_return
> +
> +.global _start
> +_start:
> + call test
> + jump pass
> diff --git a/tests/tcg/hexagon/unaligned_pc_multi_cof.S
> b/tests/tcg/hexagon/unaligned_pc_multi_cof.S
> new file mode 100644
> index 0000000000..a83e248ece
> --- /dev/null
> +++ b/tests/tcg/hexagon/unaligned_pc_multi_cof.S
> @@ -0,0 +1,13 @@
> +.org 0x3
> +test:
> + nop
> + jumpr r31
> +
> +.global _start
> +_start:
> + p0 = cmp.eq(r0, r0)
> + {
> + if (p0) jump test
> + jump pass
> + }
> + jump pass
> --
> 2.37.2
next prev parent reply other threads:[~2024-04-27 3:51 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-26 18:15 [PATCH] Hexagon: add PC alignment check and exception Matheus Tavares Bernardino
2024-04-27 3:50 ` Brian Cain [this message]
2024-04-27 14:56 ` Richard Henderson
2024-04-29 18:19 ` Richard Henderson
2024-04-29 14:40 ` ltaylorsimpson
2024-04-29 14:51 ` ltaylorsimpson
[not found] <028e01da9a44_b05d2940_11177bc0_@gmail.com>
2024-04-29 18:02 ` Matheus Tavares Bernardino
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CH3PR02MB1024736477D0FF232AD689F9FB8152@CH3PR02MB10247.namprd02.prod.outlook.com \
--to=bcain@quicinc.com \
--cc=ale@rev.ng \
--cc=anjo@rev.ng \
--cc=ltaylorsimpson@gmail.com \
--cc=qemu-devel@nongnu.org \
--cc=quic_mathbern@quicinc.com \
--cc=sidneym@quicinc.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.