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Mon, 9 Aug 2021 22:08:20 +0000 From: "Bae, Chang Seok" To: "Macieira, Thiago" CC: "bp@suse.de" , "Lutomirski, Andy" , "tglx@linutronix.de" , "mingo@kernel.org" , "x86@kernel.org" , "Brown, Len" , "Hansen, Dave" , "Liu, Jing2" , "Shankar, Ravi V" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH v9 14/26] x86/arch_prctl: Create ARCH_SET_STATE_ENABLE/ARCH_GET_STATE_ENABLE Thread-Topic: [PATCH v9 14/26] x86/arch_prctl: Create ARCH_SET_STATE_ENABLE/ARCH_GET_STATE_ENABLE Thread-Index: AQHXhVR0BYy4P9XafESfiMTncJD6GatmuoMAgAUQ8IA= Date: Mon, 9 Aug 2021 22:08:19 +0000 Message-ID: References: <20210730145957.7927-1-chang.seok.bae@intel.com> <20210730145957.7927-15-chang.seok.bae@intel.com> <3718618.i2J648eyUT@tjmaciei-mobl5> In-Reply-To: <3718618.i2J648eyUT@tjmaciei-mobl5> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: Apple Mail (2.3608.120.23.2.7) authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=intel.com; 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charset="us-ascii" Content-ID: <232E6B5F1EC51D439C352896244429CE@namprd11.prod.outlook.com> Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PH0PR11MB4855.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8bf495fa-a606-42f4-9020-08d95b82327d X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Aug 2021 22:08:19.8550 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: imMiqyhhNzn3ccnFP4vrbk5WJM1sb1MPafJDh4AXJIPveGsXpAnMxI4PazM1kyZD34ysnpLsmSO/ioMJXHHNuCK/0c5mJ8qodFOQ5ZpvO/Q= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR11MB4934 X-OriginatorOrg: intel.com Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Aug 6, 2021, at 09:46, Macieira, Thiago wrot= e: > On Friday, 30 July 2021 07:59:45 PDT Chang S. Bae wrote: >> + for_each_thread(tsk, t) { >> + t->thread.fpu.dynamic_state_perm |=3D req_dynstate_perm; >> + nr_threads++; >> + } >> + >> + if (nr_threads !=3D tsk->signal->nr_threads) { >> + for_each_thread(tsk, t) >> + t->thread.fpu.dynamic_state_perm =3D >> old_dynstate_perm;=20 >> + pr_err("x86/fpu: ARCH_XSTATE_PERM failed >> as thread number mismatched.\n");=20 >> + return -EBUSY; >> + } >> + return 0; >> +} > First the simpler one: that EBUSY. It must go and you can do that with a = lock.=20 > Library code cannot ensure that it is running in single-threaded state an= d=20 > that no other threads are started or exit while they make the system call= .=20 > There's nothing the library in question can do if it got an EBUSY. Do you= want=20 > me to try again? What if it fails again? What's the state of the dynamica= lly=20 > permitted states after an EBUSY? It's probably inconsistent. Moreover, th= ere's=20 > an ABA problem there: what happens if a thread starts and another exits w= hile=20 > this system call is running? And what happens if two threads are making t= his=20 > system call?=20 > (also, shouldn't tsk->signal->nr_threads be an atomic read?) I suspect the EBUSY situation is somewhat imaginative. In theory, the situation might be possible one thread calls this syscall at some point whe= n a new task is being created -- after task data duplication [1] and before enlisted [2]. As stated in the changelog, the alternative is possible: > An alternative implementation would not save the permission bitmap in > every task. But instead would extend the per-process signal data, and > that would not be subject to this race. But it involves quite a bit of code complexity and this is pretty much backend. I think it is possible to follow up and update when the case ever turns out to be real. At least, I'm not aware of any report against the PR_SET_FP_MODE prctl(2) [3] which took the same way -- walk and update the task list. Perhaps, the hunk above can be improved to be atomic. > So I have to insist that the XGETBV instruction's result match exactly wh= at is=20 > permitted to run. That means we either enable AMX unconditionally with no= need=20 > for system calls (with or without XFD trapping to dynamically allocate mo= re=20 > state), or that the XCR0 register be set without the AMX bits by default,= =20 > until the system call is issued. XCR0 provokes VMEXIT which will impact the performance hardly. At least the opt-in model is a consensus out of the long debate [4]. Let alone the quest= ion on how well advertise this new syscall though. Thanks, Chang [1]: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tre= e/kernel/fork.c#n2128 [2]: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tre= e/kernel/fork.c#n2320 [3]: https://man7.org/linux/man-pages/man2/prctl.2.html [4]: https://lore.kernel.org/lkml/CALCETrW2QHa2TLvnUuVxAAheqcbSZ-5_WRXtDSAG= cbG8N+gtdQ@mail.gmail.com/