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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id y14-20020a9d460e000000b006370c0e5be0sm1640450ote.48.2022.08.19.21.09.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Aug 2022 21:09:49 -0700 (PDT) Date: Fri, 19 Aug 2022 23:09:47 -0500 From: Bjorn Andersson To: Prashant Malani Cc: Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Greg Kroah-Hartman , Krzysztof Kozlowski , Heikki Krogerus , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Pin-yen Lin Subject: Re: [PATCH 1/2] dt-bindings: usb: Introduce GPIO-based SBU mux Message-ID: References: <20220810204750.3672362-1-bjorn.andersson@linaro.org> <20220810204750.3672362-2-bjorn.andersson@linaro.org> <20220814210104.GA690892-robh@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri 19 Aug 17:55 CDT 2022, Prashant Malani wrote: > On Fri, Aug 19, 2022 at 3:01 PM Bjorn Andersson > wrote: > > > > > > You can't physically connect 1, 2 or 4 lanes of DP from a DP chip to > > your usb-c-connector at the same time as you physically connect 0, 2 or > > 4 lanes of USB from a USB PHY. > > I apologize in case I'm misunderstanding, but why is that not possible? > anx7625 allows that configuration (2 lane DP + 2 lane USB going to > a single USB-C-connector) > Right, but you can not connect 4 lanes DP from one chip at the same time that you connect 4 lanes USB from another chip. > Since the discussion is to support various conceivable hardware configurations > That same anx7625 can support 1 1-lane DP (or 2 1-lane DPs), and 1 > 2-lane Type-C output. > The cross-point switch allows for that level of configuration. > We're talking about the static configuration here, where you describe which component are connected together. We can not dynamically switch the Devicetree representation around to match what the Type-C controller negotiates. > > > So, how about 4 endpoints (1 for each SS lane) in the usb-c-connector port@1? > > > That should support every conceivable configuration and bridge/PHY hardware. > > > and also allows a way to specify any lane remapping (similar to what > > > "data lanes" does) > > > if that is required. > > > > Wouldn't that prevent you from handling orientation switching, given > > that the graph is static? > > It depends. If the end-points from the usb-c-connector > go to the same switch, then it should allow orientation switching > (anx7625 allows > this). The port driver would just tell the orientation switch(es) attached to > it that we are in NORMAL or REVERSE orientation. > But why do you need to express the relationship between these 2 components with > 1 link in the graph? > The graph is static, since the hardware line routing between components > doesn't change (e.g SSTX1 from the Type-C port is always routed to Pin > X1,X2 on the switch hardware), but that is what the switch is for. > Note that in this case, the expectation is that > the switch driver only registers 1 switch (it can figure out that all > 4 endpoints > go to the same Type-C port). > Why do we need to express this with 4 endpoints and then implement code to discover that the 4 endpoints points to the same remote? Why not just describe the logical relationship between the two components in one endpoint reference? > The limitation to orientation switching would depend on how the > hardware is routed. Regards, Bjorn