From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756428AbbFPIVp (ORCPT ); Tue, 16 Jun 2015 04:21:45 -0400 Received: from www.linutronix.de ([62.245.132.108]:42978 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756292AbbFPIVh (ORCPT ); Tue, 16 Jun 2015 04:21:37 -0400 Date: Tue, 16 Jun 2015 10:21:29 +0200 (CEST) From: Thomas Gleixner To: Krzysztof Kozlowski cc: Javier Martinez Canillas , Sudeep Holla , Doug Anderson , "linux-samsung-soc@vger.kernel.org" , Jason Cooper , Chanho Park , "linux-kernel@vger.kernel.org" , Kukjin Kim , Peter Chubb , Shuah Khan , Tomasz Figa , "linux-arm-kernel@lists.infradead.org" Subject: Re: [PATCH v2 1/1] irqchip: exynos-combiner: Save IRQ enable set on suspend In-Reply-To: <557F6677.8080507@samsung.com> Message-ID: References: <1434087795-13990-1-git-send-email-javier.martinez@collabora.co.uk> <557AB00C.5040606@arm.com> <557AC23D.8040602@collabora.co.uk> <557AC85E.5070705@arm.com> <557AD728.7090908@collabora.co.uk> <557B34A7.4090507@collabora.co.uk> <557E82BC.7080203@collabora.co.uk> <557E947B.3030804@arm.com> <557EE890.2050001@collabora.co.uk> <557EEA6C.6020002@arm.com> <557EEDFB.7080502@collabora.co.uk> <557F6677.8080507@samsung.com> User-Agent: Alpine 2.11 (DEB 23 2013-08-11) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 16 Jun 2015, Krzysztof Kozlowski wrote: > On 16.06.2015 00:23, Javier Martinez Canillas wrote: > (...) > >>> To do a more intrusive change, I should better understand the interactions > >>> between the Exynos pinctrl / GPIO, interrupt combiner and the GIC and in the > >>> meantime S2R will continue to be broken on these platforms unless someone > >>> more familiar with all this could point me in the right direction. > >>> > >> > >> As I said I am fine with this patch for now and I don't want to block it. > >> > > > > Thanks a lot, Krzysztof who is one of the Exynos maintainers has also agreed > > with the patch so hopefully this can land sooner rather than later. > > I assume this will go through irqchip tree, right? yes, picking it up now Thanks, tglx From mboxrd@z Thu Jan 1 00:00:00 1970 From: tglx@linutronix.de (Thomas Gleixner) Date: Tue, 16 Jun 2015 10:21:29 +0200 (CEST) Subject: [PATCH v2 1/1] irqchip: exynos-combiner: Save IRQ enable set on suspend In-Reply-To: <557F6677.8080507@samsung.com> References: <1434087795-13990-1-git-send-email-javier.martinez@collabora.co.uk> <557AB00C.5040606@arm.com> <557AC23D.8040602@collabora.co.uk> <557AC85E.5070705@arm.com> <557AD728.7090908@collabora.co.uk> <557B34A7.4090507@collabora.co.uk> <557E82BC.7080203@collabora.co.uk> <557E947B.3030804@arm.com> <557EE890.2050001@collabora.co.uk> <557EEA6C.6020002@arm.com> <557EEDFB.7080502@collabora.co.uk> <557F6677.8080507@samsung.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Tue, 16 Jun 2015, Krzysztof Kozlowski wrote: > On 16.06.2015 00:23, Javier Martinez Canillas wrote: > (...) > >>> To do a more intrusive change, I should better understand the interactions > >>> between the Exynos pinctrl / GPIO, interrupt combiner and the GIC and in the > >>> meantime S2R will continue to be broken on these platforms unless someone > >>> more familiar with all this could point me in the right direction. > >>> > >> > >> As I said I am fine with this patch for now and I don't want to block it. > >> > > > > Thanks a lot, Krzysztof who is one of the Exynos maintainers has also agreed > > with the patch so hopefully this can land sooner rather than later. > > I assume this will go through irqchip tree, right? yes, picking it up now Thanks, tglx