* [PATCH] drm/amdgpu: do not execute 0-sized IBs
@ 2019-10-03 8:03 Pelloux-prayer, Pierre-eric
[not found] ` <20191003080306.3514-1-pierre-eric.pelloux-prayer-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 6+ messages in thread
From: Pelloux-prayer, Pierre-eric @ 2019-10-03 8:03 UTC (permalink / raw
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Pelloux-prayer, Pierre-eric
This can be safely skipped entirely.
This seems to help with https://bugs.freedesktop.org/show_bug.cgi?id=111481.
Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index 60655834d649..aa163e679f1f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -227,6 +227,11 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
!amdgpu_sriov_vf(adev)) /* for SRIOV preemption, Preamble CE ib must be inserted anyway */
continue;
+ if (ib->length_dw == 0) {
+ /* On Navi gmc_v10_0_flush_gpu_tlb emits 0 sized IB */
+ continue;
+ }
+
amdgpu_ring_emit_ib(ring, job, ib, status);
status &= ~AMDGPU_HAVE_CTX_SWITCH;
}
--
2.23.0.rc1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/amdgpu: do not execute 0-sized IBs
[not found] ` <20191003080306.3514-1-pierre-eric.pelloux-prayer-5C7GfCeVMHo@public.gmane.org>
@ 2019-10-03 8:09 ` Christian König
[not found] ` <12e0b546-faaf-38c3-c0fc-1e713348b62e-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
0 siblings, 1 reply; 6+ messages in thread
From: Christian König @ 2019-10-03 8:09 UTC (permalink / raw
To: Pelloux-prayer, Pierre-eric,
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Am 03.10.19 um 10:03 schrieb Pelloux-prayer, Pierre-eric:
> This can be safely skipped entirely.
> This seems to help with https://bugs.freedesktop.org/show_bug.cgi?id=111481.
NAK, please instead fix gmc_v10_0_flush_gpu_tlb to include at least some
NOP in the submitted IBs.
Christian.
>
> Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> index 60655834d649..aa163e679f1f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> @@ -227,6 +227,11 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
> !amdgpu_sriov_vf(adev)) /* for SRIOV preemption, Preamble CE ib must be inserted anyway */
> continue;
>
> + if (ib->length_dw == 0) {
> + /* On Navi gmc_v10_0_flush_gpu_tlb emits 0 sized IB */
> + continue;
> + }
> +
> amdgpu_ring_emit_ib(ring, job, ib, status);
> status &= ~AMDGPU_HAVE_CTX_SWITCH;
> }
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/amdgpu: do not execute 0-sized IBs
[not found] ` <12e0b546-faaf-38c3-c0fc-1e713348b62e-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
@ 2019-10-03 8:25 ` Pelloux-prayer, Pierre-eric
[not found] ` <a8d4871c-4b00-3a72-1cff-50878e1d8818-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 6+ messages in thread
From: Pelloux-prayer, Pierre-eric @ 2019-10-03 8:25 UTC (permalink / raw
To: Koenig, Christian,
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
On 03/10/2019 10:09, Christian König wrote:
> Am 03.10.19 um 10:03 schrieb Pelloux-prayer, Pierre-eric:
>> This can be safely skipped entirely.
>> This seems to help with https://bugs.freedesktop.org/show_bug.cgi?id=111481.
>
> NAK, please instead fix gmc_v10_0_flush_gpu_tlb to include at least some NOP in the submitted IBs.
Is there any interest in executing an empty (or only filled with NOPs) IB?
Anyway I can modify the patch to do this.
Thanks,
Pierre-Eric
>
> Christian.
>
>>
>> Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 5 +++++
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>> index 60655834d649..aa163e679f1f 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>> @@ -227,6 +227,11 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
>> !amdgpu_sriov_vf(adev)) /* for SRIOV preemption, Preamble CE ib must be inserted anyway */
>> continue;
>> + if (ib->length_dw == 0) {
>> + /* On Navi gmc_v10_0_flush_gpu_tlb emits 0 sized IB */
>> + continue;
>> + }
>> +
>> amdgpu_ring_emit_ib(ring, job, ib, status);
>> status &= ~AMDGPU_HAVE_CTX_SWITCH;
>> }
>
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/amdgpu: do not execute 0-sized IBs
@ 2019-10-03 9:25 Koenig, Christian
0 siblings, 0 replies; 6+ messages in thread
From: Koenig, Christian @ 2019-10-03 9:25 UTC (permalink / raw
To: Pelloux-prayer, Pierre-eric
Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
[-- Attachment #1.1: Type: text/plain, Size: 1871 bytes --]
Am 03.10.2019 10:25 schrieb "Pelloux-prayer, Pierre-eric" <Pierre-eric.Pelloux-prayer@amd.com>:
On 03/10/2019 10:09, Christian König wrote:
> Am 03.10.19 um 10:03 schrieb Pelloux-prayer, Pierre-eric:
>> This can be safely skipped entirely.
>> This seems to help with https://bugs.freedesktop.org/show_bug.cgi?id=111481.
>
> NAK, please instead fix gmc_v10_0_flush_gpu_tlb to include at least some NOP in the submitted IBs.
Is there any interest in executing an empty (or only filled with NOPs) IB?
Yeah, we used to have some dummy zero sized IBs for the MM engines which otherwise couldn't execute a fence command.
It shouldn't matter for modern firmware/hardware, but you could actually silently break somewhere else with this, so better not do this.
Sorry should have mentioned that directly,
Christian.
Anyway I can modify the patch to do this.
Thanks,
Pierre-Eric
>
> Christian.
>
>>
>> Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 5 +++++
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>> index 60655834d649..aa163e679f1f 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>> @@ -227,6 +227,11 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
>> !amdgpu_sriov_vf(adev)) /* for SRIOV preemption, Preamble CE ib must be inserted anyway */
>> continue;
>> + if (ib->length_dw == 0) {
>> + /* On Navi gmc_v10_0_flush_gpu_tlb emits 0 sized IB */
>> + continue;
>> + }
>> +
>> amdgpu_ring_emit_ib(ring, job, ib, status);
>> status &= ~AMDGPU_HAVE_CTX_SWITCH;
>> }
>
[-- Attachment #1.2: Type: text/html, Size: 3753 bytes --]
[-- Attachment #2: Type: text/plain, Size: 153 bytes --]
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/amdgpu: do not execute 0-sized IBs
[not found] ` <a8d4871c-4b00-3a72-1cff-50878e1d8818-5C7GfCeVMHo@public.gmane.org>
@ 2019-10-03 13:12 ` Deucher, Alexander
[not found] ` <BN6PR12MB1809256856DE153A35FD7EF6F79F0-/b2+HYfkarSEx6ez0IUAagdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
0 siblings, 1 reply; 6+ messages in thread
From: Deucher, Alexander @ 2019-10-03 13:12 UTC (permalink / raw
To: Pelloux-prayer, Pierre-eric, Koenig, Christian,
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
[-- Attachment #1.1: Type: text/plain, Size: 2259 bytes --]
Does some variant of the patch on this thread help?
https://patchwork.freedesktop.org/patch/333068/
Alex
________________________________
From: amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Pelloux-prayer, Pierre-eric <Pierre-eric.Pelloux-prayer-5C7GfCeVMHo@public.gmane.org>
Sent: Thursday, October 3, 2019 4:25 AM
To: Koenig, Christian <Christian.Koenig-5C7GfCeVMHo@public.gmane.org>; amd-gfx-PD4FTy7X32lNgt0PjOBp93gSJqDPrsil@public.gmane.org.org <amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
Subject: Re: [PATCH] drm/amdgpu: do not execute 0-sized IBs
On 03/10/2019 10:09, Christian König wrote:
> Am 03.10.19 um 10:03 schrieb Pelloux-prayer, Pierre-eric:
>> This can be safely skipped entirely.
>> This seems to help with https://bugs.freedesktop.org/show_bug.cgi?id=111481.
>
> NAK, please instead fix gmc_v10_0_flush_gpu_tlb to include at least some NOP in the submitted IBs.
Is there any interest in executing an empty (or only filled with NOPs) IB?
Anyway I can modify the patch to do this.
Thanks,
Pierre-Eric
>
> Christian.
>
>>
>> Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 5 +++++
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>> index 60655834d649..aa163e679f1f 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>> @@ -227,6 +227,11 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
>> !amdgpu_sriov_vf(adev)) /* for SRIOV preemption, Preamble CE ib must be inserted anyway */
>> continue;
>> + if (ib->length_dw == 0) {
>> + /* On Navi gmc_v10_0_flush_gpu_tlb emits 0 sized IB */
>> + continue;
>> + }
>> +
>> amdgpu_ring_emit_ib(ring, job, ib, status);
>> status &= ~AMDGPU_HAVE_CTX_SWITCH;
>> }
>
_______________________________________________
amd-gfx mailing list
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[-- Attachment #1.2: Type: text/html, Size: 4483 bytes --]
[-- Attachment #2: Type: text/plain, Size: 153 bytes --]
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/amdgpu: do not execute 0-sized IBs
[not found] ` <BN6PR12MB1809256856DE153A35FD7EF6F79F0-/b2+HYfkarSEx6ez0IUAagdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
@ 2019-10-03 13:36 ` Pelloux-prayer, Pierre-eric
0 siblings, 0 replies; 6+ messages in thread
From: Pelloux-prayer, Pierre-eric @ 2019-10-03 13:36 UTC (permalink / raw
To: Deucher, Alexander, Koenig, Christian,
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
On 03/10/2019 15:12, Deucher, Alexander wrote:
> Does some variant of the patch on this thread help?
> https://patchwork.freedesktop.org/patch/333068/
Hi Alex,
The added condition in this patch is:
!(adev->asic_type >= CHIP_NAVI10 && adev->asic_type <= CHIP_NAVI12) ||
which will evaluate to "false ||" on Navi10 so I don't think it'll help.
I'll send an updated version of my patch that will only modify gmc_v10_0_flush_gpu_tlb
to not send a 0-sized IB.
Thanks,
Pierre-Eric
>
> Alex
>
> ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
> *From:* amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Pelloux-prayer, Pierre-eric <Pierre-eric.Pelloux-prayer@amd.com>
> *Sent:* Thursday, October 3, 2019 4:25 AM
> *To:* Koenig, Christian <Christian.Koenig@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
> *Subject:* Re: [PATCH] drm/amdgpu: do not execute 0-sized IBs
>
>
> On 03/10/2019 10:09, Christian König wrote:
>> Am 03.10.19 um 10:03 schrieb Pelloux-prayer, Pierre-eric:
>>> This can be safely skipped entirely.
>>> This seems to help with https://bugs.freedesktop.org/show_bug.cgi?id=111481.
>>
>> NAK, please instead fix gmc_v10_0_flush_gpu_tlb to include at least some NOP in the submitted IBs.
>
> Is there any interest in executing an empty (or only filled with NOPs) IB?
>
> Anyway I can modify the patch to do this.
>
> Thanks,
> Pierre-Eric
>
>>
>> Christian.
>>
>>>
>>> Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
>>> ---
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 5 +++++
>>> 1 file changed, 5 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>>> index 60655834d649..aa163e679f1f 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>>> @@ -227,6 +227,11 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
>>> !amdgpu_sriov_vf(adev)) /* for SRIOV preemption, Preamble CE ib must be inserted anyway */
>>> continue;
>>> + if (ib->length_dw == 0) {
>>> + /* On Navi gmc_v10_0_flush_gpu_tlb emits 0 sized IB */
>>> + continue;
>>> + }
>>> +
>>> amdgpu_ring_emit_ib(ring, job, ib, status);
>>> status &= ~AMDGPU_HAVE_CTX_SWITCH;
>>> }
>>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2019-10-03 13:36 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2019-10-03 8:03 [PATCH] drm/amdgpu: do not execute 0-sized IBs Pelloux-prayer, Pierre-eric
[not found] ` <20191003080306.3514-1-pierre-eric.pelloux-prayer-5C7GfCeVMHo@public.gmane.org>
2019-10-03 8:09 ` Christian König
[not found] ` <12e0b546-faaf-38c3-c0fc-1e713348b62e-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2019-10-03 8:25 ` Pelloux-prayer, Pierre-eric
[not found] ` <a8d4871c-4b00-3a72-1cff-50878e1d8818-5C7GfCeVMHo@public.gmane.org>
2019-10-03 13:12 ` Deucher, Alexander
[not found] ` <BN6PR12MB1809256856DE153A35FD7EF6F79F0-/b2+HYfkarSEx6ez0IUAagdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2019-10-03 13:36 ` Pelloux-prayer, Pierre-eric
-- strict thread matches above, loose matches on Subject: below --
2019-10-03 9:25 Koenig, Christian
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.