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X-IronPort-AV: E=McAfee;i="6600,9927,11019"; a="5771437" X-IronPort-AV: E=Sophos;i="6.07,140,1708416000"; d="scan'208";a="5771437" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Mar 2024 10:12:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,140,1708416000"; d="scan'208";a="14618463" Received: from linux.intel.com ([10.54.29.200]) by orviesa007.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Mar 2024 10:12:35 -0700 Received: from [10.212.76.154] (kliang2-mobl1.ccr.corp.intel.com [10.212.76.154]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by linux.intel.com (Postfix) with ESMTPS id 477B9580E13; Wed, 20 Mar 2024 10:12:33 -0700 (PDT) Message-ID: Date: Wed, 20 Mar 2024 13:12:31 -0400 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH 02/41] perf: Support guest enter/exit interfaces To: Raghavendra Rao Ananta , Xiong Zhang Cc: seanjc@google.com, pbonzini@redhat.com, peterz@infradead.org, mizhang@google.com, kan.liang@intel.com, zhenyuw@linux.intel.com, dapeng1.mi@linux.intel.com, jmattson@google.com, kvm@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, zhiyuan.lv@intel.com, eranian@google.com, irogers@google.com, samantha.alt@intel.com, like.xu.linux@gmail.com, chao.gao@intel.com References: <20240126085444.324918-1-xiong.y.zhang@linux.intel.com> <20240126085444.324918-3-xiong.y.zhang@linux.intel.com> Content-Language: en-US From: "Liang, Kan" In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 2024-03-20 12:40 p.m., Raghavendra Rao Ananta wrote: > Hi Kan, > >> >> +static void __perf_force_exclude_guest_pmu(struct perf_event_pmu_context *pmu_ctx, >> + struct perf_event *event) >> +{ >> + struct perf_event_context *ctx = pmu_ctx->ctx; >> + struct perf_event *sibling; >> + bool include_guest = false; >> + >> + event_sched_out(event, ctx); >> + if (!event->attr.exclude_guest) >> + include_guest = true; >> + for_each_sibling_event(sibling, event) { >> + event_sched_out(sibling, ctx); >> + if (!sibling->attr.exclude_guest) >> + include_guest = true; >> + } >> + if (include_guest) { >> + perf_event_set_state(event, PERF_EVENT_STATE_ERROR); >> + for_each_sibling_event(sibling, event) >> + perf_event_set_state(event, PERF_EVENT_STATE_ERROR); >> + } > Does the perf core revert the PERF_EVENT_STATE_ERROR state somewhere > from the perf_guest_exit() path, or is it expected to remain in this > state? > IIUC, in the perf_guest_exit() path, when we land into > merge_sched_in(), we never schedule the event back if event->state <= > PERF_EVENT_STATE_OFF. > The perf doesn't revert event with the ERROR STATE. A user asks to profile both guest and host, but the pass-through mode doesn't allow the profiling of the guest. So it has to error out and remain the ERROR STATE. Thanks, Kan