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From: Michael Tokarev <mjt@tls.msk.ru>
To: Yong-Xuan Wang <yongxuan.wang@sifive.com>,
	qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
	qemu-stable <qemu-stable@nongnu.org>
Cc: greentime.hu@sifive.com, vincent.chen@sifive.com,
	frank.chang@sifive.com, jim.shu@sifive.com,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Alistair Francis" <alistair.francis@wdc.com>,
	"Bin Meng" <bin.meng@windriver.com>,
	"Weiwei Li" <liwei1518@gmail.com>,
	"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
	"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
	"Andrew Jones" <ajones@ventanamicro.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: Re: [PATCH v2 1/1] target/riscv/kvm: fix timebase-frequency when using KVM acceleration
Date: Sat, 27 Apr 2024 02:44:42 +0300	[thread overview]
Message-ID: <e841b1ba-1348-48ae-89b7-bfa14ff8e70c@tls.msk.ru> (raw)
In-Reply-To: <20240314061510.9800-1-yongxuan.wang@sifive.com>

14.03.2024 09:15, Yong-Xuan Wang:
> The timebase-frequency of guest OS should be the same with host
> machine. The timebase-frequency value in DTS should be got from
> hypervisor when using KVM acceleration.

This change ended up in stable-8.2 (v8.2.3).  Interestingly, this thing
compiled not even once, or else it would be obvious it fails to compile.
Somehow I was too used to CI, forgetting that we don't have riscv *host*
in CI (and I don't have one locally either).  So 8.2.3 is broken on
riscv64 *host*.

In 8.2, KVM_RISCV_GET_TIMER macro accepts 4 arguments, because it does
not have 10f86d1b845087d1 "target/riscv/kvm: change timer regs size to u64".

What do you think, should I revert this change for stable-8.2, or pick
10f86d1b845087d1 too, or change this commit (fix timebase-frequency) to
provide the missing argument for this macro?

Thanks,

/mjt


> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>
> 
> ---
> Changelog
> v2:
> - update the function definition
> - restructure if-else statement
> ---
>   hw/riscv/virt.c              | 2 ++
>   target/riscv/kvm/kvm-cpu.c   | 9 +++++++++
>   target/riscv/kvm/kvm_riscv.h | 1 +
>   3 files changed, 12 insertions(+)
> 
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index a094af97c32a..533b17799581 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -711,6 +711,8 @@ static void create_fdt_sockets(RISCVVirtState *s, const MemMapEntry *memmap,
>   
>       qemu_fdt_add_subnode(ms->fdt, "/cpus");
>       qemu_fdt_setprop_cell(ms->fdt, "/cpus", "timebase-frequency",
> +                          kvm_enabled() ?
> +                          kvm_riscv_get_timebase_frequency(first_cpu) :
>                             RISCV_ACLINT_DEFAULT_TIMEBASE_FREQ);
>       qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#size-cells", 0x0);
>       qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#address-cells", 0x1);
> diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
> index c7afdb1e81b7..bbb115eaa867 100644
> --- a/target/riscv/kvm/kvm-cpu.c
> +++ b/target/riscv/kvm/kvm-cpu.c
> @@ -739,6 +739,15 @@ static void kvm_riscv_put_regs_timer(CPUState *cs)
>       env->kvm_timer_dirty = false;
>   }
>   
> +uint64_t kvm_riscv_get_timebase_frequency(CPUState *cs)
> +{
> +    uint64_t reg;
> +
> +    KVM_RISCV_GET_TIMER(cs, frequency, reg);
> +
> +    return reg;
> +}
> +
>   static int kvm_riscv_get_regs_vector(CPUState *cs)
>   {
>       RISCVCPU *cpu = RISCV_CPU(cs);
> diff --git a/target/riscv/kvm/kvm_riscv.h b/target/riscv/kvm/kvm_riscv.h
> index 4bd98fddc776..58518988681d 100644
> --- a/target/riscv/kvm/kvm_riscv.h
> +++ b/target/riscv/kvm/kvm_riscv.h
> @@ -28,5 +28,6 @@ void kvm_riscv_aia_create(MachineState *machine, uint64_t group_shift,
>   void riscv_kvm_aplic_request(void *opaque, int irq, int level);
>   int kvm_riscv_sync_mpstate_to_kvm(RISCVCPU *cpu, int state);
>   void riscv_kvm_cpu_finalize_features(RISCVCPU *cpu, Error **errp);
> +uint64_t kvm_riscv_get_timebase_frequency(CPUState *cs);
>   
>   #endif

-- 
GPG Key transition (from rsa2048 to rsa4096) since 2024-04-24.
New key: rsa4096/61AD3D98ECDF2C8E  9D8B E14E 3F2A 9DD7 9199  28F1 61AD 3D98 ECDF 2C8E
Old key: rsa2048/457CE0A0804465C5  6EE1 95D1 886E 8FFB 810D  4324 457C E0A0 8044 65C5
Transition statement: http://www.corpit.ru/mjt/gpg-transition-2024.txt



  parent reply	other threads:[~2024-04-26 23:45 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-14  6:15 [PATCH v2 1/1] target/riscv/kvm: fix timebase-frequency when using KVM acceleration Yong-Xuan Wang
2024-03-14  6:55 ` Philippe Mathieu-Daudé
2024-03-22  4:46 ` Alistair Francis
2024-03-22  4:47 ` Alistair Francis
2024-04-26 23:44 ` Michael Tokarev [this message]
2024-04-27  6:23   ` Andrew Jones
2024-04-27  6:59     ` Michael Tokarev
2024-04-27  7:24       ` Michael Tokarev
2024-04-27 15:17         ` Andrew Jones
2024-04-27 16:39           ` Michael Tokarev
2024-04-29  2:01             ` Alistair Francis

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