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From: tip-bot for Dave Hansen <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: fenghua.yu@intel.com, torvalds@linux-foundation.org,
	linux-kernel@vger.kernel.org, luto@amacapital.net,
	peterz@infradead.org, mingo@kernel.org, tglx@linutronix.de,
	dvlasenk@redhat.com, bp@alien8.de, hpa@zytor.com,
	dave.hansen@linux.intel.com, tim.c.chen@linux.intel.com,
	brgerst@gmail.com
Subject: [tip:x86/fpu] x86/fpu/mpx: Rework MPX 'xstate' types
Date: Mon, 14 Sep 2015 05:22:55 -0700	[thread overview]
Message-ID: <tip-1126cb4535c4ff172c37a412a6bd25d6b47a1901@git.kernel.org> (raw)
In-Reply-To: <20150902233129.384B73EB@viggo.jf.intel.com>

Commit-ID:  1126cb4535c4ff172c37a412a6bd25d6b47a1901
Gitweb:     http://git.kernel.org/tip/1126cb4535c4ff172c37a412a6bd25d6b47a1901
Author:     Dave Hansen <dave.hansen@linux.intel.com>
AuthorDate: Wed, 2 Sep 2015 16:31:29 -0700
Committer:  Ingo Molnar <mingo@kernel.org>
CommitDate: Mon, 14 Sep 2015 12:22:00 +0200

x86/fpu/mpx: Rework MPX 'xstate' types

MPX includes two separate "extended state components".  There is
no real need to have an 'mpx_struct' because we never really
manage the states together.

We also separate out the actual data in 'mpx_bndcsr_state' from
the padding.  We will shortly be checking the state sizes
against our structures and need them to match.  For consistency,
we also ensure to prefix these types with 'mpx_'.

Lastly, we add some comments to mirror some of the descriptions
in the Intel documents (SDM) of the various state components.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tim Chen <tim.c.chen@linux.intel.com>
Cc: dave@sr71.net
Cc: linux-kernel@vger.kernel.org
Link: http://lkml.kernel.org/r/20150902233129.384B73EB@viggo.jf.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
 arch/x86/include/asm/fpu/types.h | 29 +++++++++++++++++++++++------
 arch/x86/include/asm/trace/mpx.h |  7 ++++---
 arch/x86/kernel/traps.c          |  2 +-
 arch/x86/mm/mpx.c                |  9 +++++----
 4 files changed, 33 insertions(+), 14 deletions(-)

diff --git a/arch/x86/include/asm/fpu/types.h b/arch/x86/include/asm/fpu/types.h
index 9f57930..4d8c200 100644
--- a/arch/x86/include/asm/fpu/types.h
+++ b/arch/x86/include/asm/fpu/types.h
@@ -141,20 +141,37 @@ struct ymmh_struct {
 };
 
 /* Intel MPX support: */
-struct bndreg {
+
+struct mpx_bndreg {
 	u64				lower_bound;
 	u64				upper_bound;
 } __packed;
+/*
+ * State component 3 is used for the 4 128-bit bounds registers
+ */
+struct mpx_bndreg_state {
+	struct mpx_bndreg		bndreg[4];
+} __packed;
 
-struct bndcsr {
+/*
+ * State component 4 is used for the 64-bit user-mode MPX
+ * configuration register BNDCFGU and the 64-bit MPX status
+ * register BNDSTATUS.  We call the pair "BNDCSR".
+ */
+struct mpx_bndcsr {
 	u64				bndcfgu;
 	u64				bndstatus;
 } __packed;
 
-struct mpx_struct {
-	struct bndreg			bndreg[4];
-	struct bndcsr			bndcsr;
-};
+/*
+ * The BNDCSR state is padded out to be 64-bytes in size.
+ */
+struct mpx_bndcsr_state {
+	union {
+		struct mpx_bndcsr		bndcsr;
+		u8				pad_to_64_bytes[64];
+	};
+} __packed;
 
 struct xstate_header {
 	u64				xfeatures;
diff --git a/arch/x86/include/asm/trace/mpx.h b/arch/x86/include/asm/trace/mpx.h
index 173dd3b..0f492fc 100644
--- a/arch/x86/include/asm/trace/mpx.h
+++ b/arch/x86/include/asm/trace/mpx.h
@@ -11,7 +11,7 @@
 TRACE_EVENT(mpx_bounds_register_exception,
 
 	TP_PROTO(void *addr_referenced,
-		 const struct bndreg *bndreg),
+		 const struct mpx_bndreg *bndreg),
 	TP_ARGS(addr_referenced, bndreg),
 
 	TP_STRUCT__entry(
@@ -44,7 +44,7 @@ TRACE_EVENT(mpx_bounds_register_exception,
 
 TRACE_EVENT(bounds_exception_mpx,
 
-	TP_PROTO(const struct bndcsr *bndcsr),
+	TP_PROTO(const struct mpx_bndcsr *bndcsr),
 	TP_ARGS(bndcsr),
 
 	TP_STRUCT__entry(
@@ -116,7 +116,8 @@ TRACE_EVENT(mpx_new_bounds_table,
 /*
  * This gets used outside of MPX-specific code, so we need a stub.
  */
-static inline void trace_bounds_exception_mpx(const struct bndcsr *bndcsr)
+static inline
+void trace_bounds_exception_mpx(const struct mpx_bndcsr *bndcsr)
 {
 }
 
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 0cd2ac5..ade185a 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -361,7 +361,7 @@ dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
 
 dotraplinkage void do_bounds(struct pt_regs *regs, long error_code)
 {
-	const struct bndcsr *bndcsr;
+	const struct mpx_bndcsr *bndcsr;
 	siginfo_t *info;
 
 	RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
diff --git a/arch/x86/mm/mpx.c b/arch/x86/mm/mpx.c
index f35fc9c..b0ae85f 100644
--- a/arch/x86/mm/mpx.c
+++ b/arch/x86/mm/mpx.c
@@ -237,7 +237,8 @@ bad_opcode:
  */
 siginfo_t *mpx_generate_siginfo(struct pt_regs *regs)
 {
-	const struct bndreg *bndregs, *bndreg;
+	const struct mpx_bndreg_state *bndregs;
+	const struct mpx_bndreg *bndreg;
 	siginfo_t *info = NULL;
 	struct insn insn;
 	uint8_t bndregno;
@@ -264,7 +265,7 @@ siginfo_t *mpx_generate_siginfo(struct pt_regs *regs)
 		goto err_out;
 	}
 	/* now go select the individual register in the set of 4 */
-	bndreg = &bndregs[bndregno];
+	bndreg = &bndregs->bndreg[bndregno];
 
 	info = kzalloc(sizeof(*info), GFP_KERNEL);
 	if (!info) {
@@ -306,7 +307,7 @@ err_out:
 
 static __user void *mpx_get_bounds_dir(void)
 {
-	const struct bndcsr *bndcsr;
+	const struct mpx_bndcsr *bndcsr;
 
 	if (!cpu_feature_enabled(X86_FEATURE_MPX))
 		return MPX_INVALID_BOUNDS_DIR;
@@ -489,7 +490,7 @@ out_unmap:
 static int do_mpx_bt_fault(void)
 {
 	unsigned long bd_entry, bd_base;
-	const struct bndcsr *bndcsr;
+	const struct mpx_bndcsr *bndcsr;
 	struct mm_struct *mm = current->mm;
 
 	bndcsr = get_xsave_field_ptr(XFEATURE_MASK_BNDCSR);

  reply	other threads:[~2015-09-14 12:24 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-02 23:31 [PATCH 00/15] [v4] x86, fpu: XSAVE cleanups and sanity checks Dave Hansen
2015-09-02 23:31 ` [PATCH 02/15] x86, fpu: move XSAVE-disabling code to a helper Dave Hansen
2015-09-14 12:19   ` [tip:x86/fpu] x86/fpu: Move " tip-bot for Dave Hansen
2015-09-02 23:31 ` [PATCH 01/15] x86, fpu: print xfeature buffer size in decimal Dave Hansen
2015-09-14 12:19   ` [tip:x86/fpu] x86/fpu: Print " tip-bot for Dave Hansen
2015-09-02 23:31 ` [PATCH 03/15] x86, fpu: remove XSTATE_RESERVE Dave Hansen
2015-09-14 12:20   ` [tip:x86/fpu] x86/fpu: Remove XSTATE_RESERVE tip-bot for Dave Hansen
2015-09-02 23:31 ` [PATCH 04/15] x86, fpu: kill LWP support Dave Hansen
2015-09-14 12:20   ` [tip:x86/fpu] x86/fpu: Remove partial LWP support definitions tip-bot for Dave Hansen
2015-09-02 23:31 ` [PATCH 05/15] x86, fpu: XSAVE macro renames Dave Hansen
2015-09-14 12:21   ` [tip:x86/fpu] x86/fpu: Rename XSAVE macros tip-bot for Dave Hansen
2015-09-23 10:49     ` Borislav Petkov
2015-09-24  7:24       ` [tip:x86/fpu] x86/fpu: Fixup uninitialized feature_name warning tip-bot for Borislav Petkov
2015-09-02 23:31 ` [PATCH 06/15] x86, fpu: rename XFEATURES_NR_MAX Dave Hansen
2015-09-14 12:21   ` [tip:x86/fpu] x86/fpu: Rename XFEATURES_NR_MAX tip-bot for Dave Hansen
2015-09-02 23:31 ` [PATCH 07/15] x86, fpu: rework XSTATE_* macros to remove magic '2' Dave Hansen
2015-09-14 12:21   ` [tip:x86/fpu] x86/fpu: Rework " tip-bot for Dave Hansen
2015-09-02 23:31 ` [PATCH 08/15] x86, fpu: remove xfeature_nr Dave Hansen
2015-09-14 12:22   ` [tip:x86/fpu] x86/fpu: Remove 'xfeature_nr' tip-bot for Dave Hansen
2015-09-02 23:31 ` [PATCH 11/15] x86, fpu: rework YMM definition Dave Hansen
2015-09-14 12:23   ` [tip:x86/fpu] x86/fpu: Rework " tip-bot for Dave Hansen
2015-09-02 23:31 ` [PATCH 09/15] x86, fpu: add helper xfeature_enabled() instead of test_bit() Dave Hansen
2015-09-14 12:22   ` [tip:x86/fpu] x86/fpu: Add xfeature_enabled() helper " tip-bot for Dave Hansen
2015-09-02 23:31 ` [PATCH 10/15] x86, fpu: rework MPX 'xstate' types Dave Hansen
2015-09-14 12:22   ` tip-bot for Dave Hansen [this message]
2015-09-02 23:31 ` [PATCH 12/15] x86, fpu: add C structures for AVX-512 state components Dave Hansen
2015-09-14 12:23   ` [tip:x86/fpu] x86/fpu: Add " tip-bot for Dave Hansen
2015-09-02 23:31 ` [PATCH 13/15] x86, fpu: correct and check XSAVE xstate size calculations Dave Hansen
2015-09-14 12:23   ` [tip:x86/fpu] x86/fpu: Correct " tip-bot for Dave Hansen
2015-09-02 23:31 ` [PATCH 14/15] x86, fpu: check to ensure increasing-offset xstate offsets Dave Hansen
2015-09-14 12:24   ` [tip:x86/fpu] x86/fpu: Check " tip-bot for Dave Hansen
2015-09-02 23:31 ` [PATCH 15/15] x86, fpu: check CPU-provided sizes against struct declarations Dave Hansen
2015-09-14 12:24   ` [tip:x86/fpu] x86/fpu: Check " tip-bot for Dave Hansen
2015-09-14 10:07 ` [PATCH 00/15] [v4] x86, fpu: XSAVE cleanups and sanity checks Ingo Molnar

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