From: Lijo Lazar <lijo.lazar@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: <Hawking.Zhang@amd.com>, <Alexander.Deucher@amd.com>,
<kevinyang.wang@amd.com>
Subject: [PATCH] drm/amd/pm: Fix aldebaran pcie speed reporting
Date: Thu, 9 May 2024 14:29:25 +0530 [thread overview]
Message-ID: <20240509085925.61641-1-lijo.lazar@amd.com> (raw)
Fix the field definitions for LC_CURRENT_DATA_RATE.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Fixes: c05d1c401572 ("drm/amd/swsmu: add aldebaran smu13 ip support")
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
index 0fd25b72a40c..9c0445fa9f9b 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
@@ -79,8 +79,8 @@ MODULE_FIRMWARE("amdgpu/smu_13_0_10.bin");
#define PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD_MASK 0x00000070L
#define PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD__SHIFT 0x4
#define smnPCIE_LC_SPEED_CNTL 0x11140290
-#define PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE_MASK 0xC000
-#define PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE__SHIFT 0xE
+#define PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE_MASK 0xE0
+#define PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE__SHIFT 0x5
#define ENABLE_IMU_ARG_GFXOFF_ENABLE 1
--
2.25.1
next reply other threads:[~2024-05-09 8:59 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-09 8:59 Lijo Lazar [this message]
2024-05-09 12:46 ` [PATCH] drm/amd/pm: Fix aldebaran pcie speed reporting Kamal, Asad
2024-05-09 12:47 ` Wang, Yang(Kevin)
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