AMD-GFX Archive mirror
 help / color / mirror / Atom feed
* [PATCH 01/13] drm/amd/display: Fix incorrect cursor position for dcn401
@ 2024-05-23 19:20 Aurabindo Pillai
  2024-05-23 19:20 ` [PATCH 02/13] drm/amd/display: Enable ISHARP support for DCN401 Aurabindo Pillai
                   ` (11 more replies)
  0 siblings, 12 replies; 14+ messages in thread
From: Aurabindo Pillai @ 2024-05-23 19:20 UTC (permalink / raw
  To: amd-gfx
  Cc: harry.wentland, sunpeng.li, rodrigo.siqueira, aurabindo.pillai,
	Arvindekar, Sridevi, Rodrigo Siqueira, Sridevi

From: "Arvindekar, Sridevi" <Sridevi.Arvindekar@amd.com>

[Why]
Incorrect cursor position calculation in some scenarios.  Also for
mirror and rotation cases.

[How]
Fix for incorrect cursor position.  Added new test scenarios for diags
cursor test.  Updated CRC for few of the diags cursor test scenarios.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Sridevi <sarvinde@amd.com>
---
 .../amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c | 18 +++++++----
 .../amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 30 +++++++++++++------
 2 files changed, 34 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c
index a54b9089f15d..aef73bd1221a 100644
--- a/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c
+++ b/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c
@@ -185,15 +185,23 @@ void dpp401_set_cursor_position(
 		rec_y_offset = y_pos - (cursor_height - y_hotspot);
 	}
 
-	if (rec_x_offset >= (int)param->recout.width)
-		cur_en = 0;  /* not visible beyond right edge*/
+	if (param->rotation == ROTATION_ANGLE_0 && !param->mirror) {
+		if (rec_x_offset >= (int)param->recout.width)
+			cur_en = 0;  /* not visible beyond right edge*/
+
+		if (rec_y_offset >= (int)param->recout.height)
+			cur_en = 0;  /* not visible beyond bottom edge*/
+	} else {
+		if (rec_x_offset > (int)param->recout.width)
+			cur_en = 0;  /* not visible beyond right edge*/
+
+		if (rec_y_offset > (int)param->recout.height)
+			cur_en = 0;  /* not visible beyond bottom edge*/
+	}
 
 	if (rec_x_offset + cursor_width <= 0)
 		cur_en = 0;  /* not visible beyond left edge*/
 
-	if (rec_y_offset >= (int)param->recout.height)
-		cur_en = 0;  /* not visible beyond bottom edge*/
-
 	if (rec_y_offset + cursor_height <= 0)
 		cur_en = 0;  /* not visible beyond top edge*/
 
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
index f5333a095adb..407a45a3ae2c 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
@@ -1126,14 +1126,14 @@ void dcn401_set_cursor_position(struct pipe_ctx *pipe_ctx)
 	 */
 
 	if (param.rotation == ROTATION_ANGLE_90 || param.rotation == ROTATION_ANGLE_270) {
-		x_pos = x_pos * pipe_ctx->stream->dst.width /
+		x_pos = pipe_ctx->stream->dst.x + x_pos * pipe_ctx->stream->dst.width /
 			pipe_ctx->stream->src.height;
-		y_pos = y_pos * pipe_ctx->stream->dst.height /
+		y_pos = pipe_ctx->stream->dst.y + y_pos * pipe_ctx->stream->dst.height /
 			pipe_ctx->stream->src.width;
 	} else {
-		x_pos = x_pos * pipe_ctx->stream->dst.width /
+		x_pos = pipe_ctx->stream->dst.x + x_pos * pipe_ctx->stream->dst.width /
 			pipe_ctx->stream->src.width;
-		y_pos = y_pos * pipe_ctx->stream->dst.height /
+		y_pos = pipe_ctx->stream->dst.y + y_pos * pipe_ctx->stream->dst.height /
 			pipe_ctx->stream->src.height;
 	}
 
@@ -1225,10 +1225,15 @@ void dcn401_set_cursor_position(struct pipe_ctx *pipe_ctx)
 			}
 		}
 	} else if (param.rotation == ROTATION_ANGLE_90) {
-		uint32_t temp_y = pos_cpy.y;
+		if (!param.mirror) {
+			uint32_t temp_y = pos_cpy.y;
+
+			pos_cpy.y = pipe_ctx->plane_res.scl_data.recout.height - pos_cpy.x;
+			pos_cpy.x = temp_y - prev_odm_width;
+		} else {
+			swap(pos_cpy.x, pos_cpy.y);
+		}
 
-		pos_cpy.y = pipe_ctx->plane_res.scl_data.recout.height - pos_cpy.x;
-		pos_cpy.x = temp_y - prev_odm_width;
 	} else if (param.rotation == ROTATION_ANGLE_270) {
 		// Swap axis and mirror vertically
 		uint32_t temp_x = pos_cpy.x;
@@ -1279,8 +1284,15 @@ void dcn401_set_cursor_position(struct pipe_ctx *pipe_ctx)
 				pos_cpy.y = temp_x;
 			}
 		} else {
-			pos_cpy.x = pipe_ctx->plane_res.scl_data.recout.width - pos_cpy.y;
-			pos_cpy.y = temp_x;
+			if (param.mirror) {
+				swap(pos_cpy.x, pos_cpy.y);
+
+				pos_cpy.x = pipe_ctx->plane_res.scl_data.recout.width - pos_cpy.x + 2 * pipe_ctx->plane_res.scl_data.recout.x;
+				pos_cpy.y = (2 * pipe_ctx->plane_res.scl_data.recout.y) + pipe_ctx->plane_res.scl_data.recout.height - pos_cpy.y;
+			} else {
+				pos_cpy.x = pipe_ctx->plane_res.scl_data.recout.width - pos_cpy.y;
+				pos_cpy.y = temp_x;
+			}
 		}
 	} else if (param.rotation == ROTATION_ANGLE_180) {
 		// Mirror horizontally and vertically
-- 
2.39.2


^ permalink raw reply related	[flat|nested] 14+ messages in thread

end of thread, other threads:[~2024-05-27 14:50 UTC | newest]

Thread overview: 14+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-05-23 19:20 [PATCH 01/13] drm/amd/display: Fix incorrect cursor position for dcn401 Aurabindo Pillai
2024-05-23 19:20 ` [PATCH 02/13] drm/amd/display: Enable ISHARP support for DCN401 Aurabindo Pillai
2024-05-23 19:20 ` [PATCH 03/13] drm/amd/display: Remove unused code Aurabindo Pillai
2024-05-23 19:20 ` [PATCH 04/13] drm/amd/display: Refactor HUBP into component folder Aurabindo Pillai
2024-05-23 19:20 ` [PATCH 05/13] drm/amd/display: Update DML2.1 generated code Aurabindo Pillai
2024-05-23 19:20 ` [PATCH 06/13] drm/amd/display: Remove unnecessary HPD entry for DCN401 Aurabindo Pillai
2024-05-23 19:20 ` [PATCH 07/13] drm/amd/display: Use DCN 410 includes " Aurabindo Pillai
2024-05-23 19:20 ` [PATCH 08/13] drm/amd/display: Remove incorrect FP context start Aurabindo Pillai
2024-05-23 19:20 ` [PATCH 09/13] drm/amd/display: Fix null pointer dereference for dcn401 Aurabindo Pillai
2024-05-23 19:20 ` [PATCH 10/13] drm/amd/display: Add missing registers for DCN401 Aurabindo Pillai
2024-05-23 19:20 ` [PATCH 11/13] drm/amd/display: Move some init routines to dm_sw_init() Aurabindo Pillai
2024-05-23 19:20 ` [PATCH 12/13] drm/amd/display: Add new GPINT command definitions Aurabindo Pillai
2024-05-23 19:20 ` [PATCH 13/13] drm/amd/display: Enable copying of bounding box data from VBIOS DMUB Aurabindo Pillai
2024-05-27 14:50   ` Harry Wentland

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).