* [PATCH] drm/amdgpu: remove the access of xxx_PSP_DEBUG on cycan_skillfish
@ 2021-07-28 2:10 Huang Rui
2021-07-28 2:15 ` Alex Deucher
0 siblings, 1 reply; 2+ messages in thread
From: Huang Rui @ 2021-07-28 2:10 UTC (permalink / raw
To: amd-gfx
Cc: Chen Gong, Tao Zhou, Huang Rui, Alex Deucher, Lang Yu,
Hawking Zhang
It won't need to clear the xxx_PSP_DEBUG registers, because firmware
will handle this change.
Signed-off-by: Huang Rui <ray.huang@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index f94ef15b3166..24b0195fe665 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -3541,8 +3541,6 @@ static const struct soc15_reg_golden golden_settings_gc_10_3_5[] = {
static const struct soc15_reg_golden golden_settings_gc_10_0_cyan_skillfish[] = {
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000),
- SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPG_PSP_DEBUG, 0x0000003f, 0x00000000),
- SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPC_PSP_DEBUG, 0x0000003f, 0x00000000),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGE_FAST_CLKS, 0x3fffffff, 0x0000493e),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_CPF_CLK_CTRL, 0xfcff8fff, 0xf8000100),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_CLK_CTRL, 0xff7f0fff, 0x3c000100),
--
2.25.1
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^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] drm/amdgpu: remove the access of xxx_PSP_DEBUG on cycan_skillfish
2021-07-28 2:10 [PATCH] drm/amdgpu: remove the access of xxx_PSP_DEBUG on cycan_skillfish Huang Rui
@ 2021-07-28 2:15 ` Alex Deucher
0 siblings, 0 replies; 2+ messages in thread
From: Alex Deucher @ 2021-07-28 2:15 UTC (permalink / raw
To: Huang Rui
Cc: Chen Gong, Tao Zhou, amd-gfx list, Alex Deucher, Lang Yu,
Hawking Zhang
Acked-by: Alex Deucher <alexander.deucher@amd.com>
On Tue, Jul 27, 2021 at 10:11 PM Huang Rui <ray.huang@amd.com> wrote:
>
> It won't need to clear the xxx_PSP_DEBUG registers, because firmware
> will handle this change.
>
> Signed-off-by: Huang Rui <ray.huang@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> index f94ef15b3166..24b0195fe665 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> @@ -3541,8 +3541,6 @@ static const struct soc15_reg_golden golden_settings_gc_10_3_5[] = {
>
> static const struct soc15_reg_golden golden_settings_gc_10_0_cyan_skillfish[] = {
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000),
> - SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPG_PSP_DEBUG, 0x0000003f, 0x00000000),
> - SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPC_PSP_DEBUG, 0x0000003f, 0x00000000),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmGE_FAST_CLKS, 0x3fffffff, 0x0000493e),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_CPF_CLK_CTRL, 0xfcff8fff, 0xf8000100),
> SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_CLK_CTRL, 0xff7f0fff, 0x3c000100),
> --
> 2.25.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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