From mboxrd@z Thu Jan 1 00:00:00 1970 From: Konstantin Ryabitsev Date: Tue, 30 Aug 2022 09:31:28 -0400 Subject: [PATCH RESEND v3 3/4] arm64: dts: allwinner: h6: Add GPU OPP table MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset="utf-8" Message-Id: <20220825-test-endpoint-send-2-v3-3-736c986dd55c@linuxfoundation.org> References: <20220825-test-endpoint-send-2-v3-0-736c986dd55c@linuxfoundation.org> In-Reply-To: <20220825-test-endpoint-send-2-v3-0-736c986dd55c@linuxfoundation.org> To: mricon@kernel.org X-Mailer: b4 0.10.0-dev-bfc54 X-Developer-Signature: v=1; a=openpgp-sha256; l=2686; i=konstantin@linuxfoundation.org; h=from:subject:message-id; bh=Ok5NRC2vsdxLD4aWmE8wJJbR+LR2KXy7VL52YxbTg1E=; b=owGbwMvMwCW27YjM47CUmTmMp9WSGJL5BPUS/h8XUi7ZV2n6e/VE1oregNgXuzdEZt97bRu/q6Dh YIhFRykLgxgXg6yYIkvZvthNQYUPPeTSe0xh5rAygQxh4OIUgInMYGVkOMyu2GpWqxPGe0SLOW+64o 3Xsparmt6InapbuTza2EE9kZHh1OuWc718B51U9nRPuOW+tDq16fWTz0xK5/ZyPD1TdukWMwA= X-Developer-Key: i=konstantin@linuxfoundation.org; a=openpgp; fpr=DE0E66E32F1FDD0902666B96E63EDCA9329DD07E X-Endpoint-Received: by B4 Submission Endpoint for konstantin@linuxfoundation.org/default with auth_id=3 List-Id: B4 Web Endpoint Patches From: Clément Péron Add an Operating Performance Points table for the GPU to enable Dynamic Voltage & Frequency Scaling on the H6. The voltage range is set with minival voltage set to the target and the maximal voltage set to 1.2V. This allow DVFS framework to work properly on board with fixed regulator. Signed-off-by: Clément Péron Signed-off-by: Konstantin Ryabitsev diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-gpu-opp.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-gpu-opp.dtsi new file mode 100644 index 000000000000..a66204243515 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-gpu-opp.dtsi @@ -0,0 +1,88 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (C) 2022 Clément Péron + +/ { + gpu_opp_table: gpu-opp-table { + compatible = "operating-points-v2"; + + opp@216000000 { + opp-hz = /bits/ 64 <216000000>; + opp-microvolt = <810000 810000 1200000>; + }; + + opp@264000000 { + opp-hz = /bits/ 64 <264000000>; + opp-microvolt = <810000 810000 1200000>; + }; + + opp@312000000 { + opp-hz = /bits/ 64 <312000000>; + opp-microvolt = <810000 810000 1200000>; + }; + + opp@336000000 { + opp-hz = /bits/ 64 <336000000>; + opp-microvolt = <810000 810000 1200000>; + }; + + opp@360000000 { + opp-hz = /bits/ 64 <360000000>; + opp-microvolt = <820000 820000 1200000>; + }; + + opp@384000000 { + opp-hz = /bits/ 64 <384000000>; + opp-microvolt = <830000 830000 1200000>; + }; + + opp@408000000 { + opp-hz = /bits/ 64 <408000000>; + opp-microvolt = <840000 840000 1200000>; + }; + + opp@420000000 { + opp-hz = /bits/ 64 <420000000>; + opp-microvolt = <850000 850000 1200000>; + }; + + opp@432000000 { + opp-hz = /bits/ 64 <432000000>; + opp-microvolt = <860000 860000 1200000>; + }; + + opp@456000000 { + opp-hz = /bits/ 64 <456000000>; + opp-microvolt = <870000 870000 1200000>; + }; + + opp@504000000 { + opp-hz = /bits/ 64 <504000000>; + opp-microvolt = <890000 890000 1200000>; + }; + + opp@540000000 { + opp-hz = /bits/ 64 <540000000>; + opp-microvolt = <910000 910000 1200000>; + }; + + opp@576000000 { + opp-hz = /bits/ 64 <576000000>; + opp-microvolt = <930000 930000 1200000>; + }; + + opp@624000000 { + opp-hz = /bits/ 64 <624000000>; + opp-microvolt = <950000 950000 1200000>; + }; + + opp@756000000 { + opp-hz = /bits/ 64 <756000000>; + opp-microvolt = <1040000 1040000 1200000>; + }; + }; + +}; + +&gpu { + operating-points-v2 = <&gpu_opp_table>; +}; -- b4 0.10.0-dev-bfc54