From: "Wang, Xiao W" <xiao.w.wang@intel.com>
To: Conor Dooley <conor@kernel.org>
Cc: "paul.walmsley@sifive.com" <paul.walmsley@sifive.com>,
"palmer@dabbelt.com" <palmer@dabbelt.com>,
"aou@eecs.berkeley.edu" <aou@eecs.berkeley.edu>,
"luke.r.nels@gmail.com" <luke.r.nels@gmail.com>,
"xi.wang@gmail.com" <xi.wang@gmail.com>,
"bjorn@kernel.org" <bjorn@kernel.org>,
"ast@kernel.org" <ast@kernel.org>,
"daniel@iogearbox.net" <daniel@iogearbox.net>,
"andrii@kernel.org" <andrii@kernel.org>,
"martin.lau@linux.dev" <martin.lau@linux.dev>,
"eddyz87@gmail.com" <eddyz87@gmail.com>,
"song@kernel.org" <song@kernel.org>,
"yonghong.song@linux.dev" <yonghong.song@linux.dev>,
"john.fastabend@gmail.com" <john.fastabend@gmail.com>,
"kpsingh@kernel.org" <kpsingh@kernel.org>,
"sdf@google.com" <sdf@google.com>,
"haoluo@google.com" <haoluo@google.com>,
"jolsa@kernel.org" <jolsa@kernel.org>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"bpf@vger.kernel.org" <bpf@vger.kernel.org>,
"pulehui@huawei.com" <pulehui@huawei.com>,
"Li, Haicheng" <haicheng.li@intel.com>
Subject: RE: [PATCH] riscv, bpf: Optimize zextw insn with Zba extension
Date: Sat, 11 May 2024 01:17:04 +0000 [thread overview]
Message-ID: <DM8PR11MB57513749704B776A9E51151BB8E02@DM8PR11MB5751.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20240510-essay-subwoofer-e055375ff1cb@spud>
> -----Original Message-----
> From: Conor Dooley <conor@kernel.org>
> Sent: Saturday, May 11, 2024 4:56 AM
> To: Wang, Xiao W <xiao.w.wang@intel.com>
> Cc: paul.walmsley@sifive.com; palmer@dabbelt.com;
> aou@eecs.berkeley.edu; luke.r.nels@gmail.com; xi.wang@gmail.com;
> bjorn@kernel.org; ast@kernel.org; daniel@iogearbox.net; andrii@kernel.org;
> martin.lau@linux.dev; eddyz87@gmail.com; song@kernel.org;
> yonghong.song@linux.dev; john.fastabend@gmail.com; kpsingh@kernel.org;
> sdf@google.com; haoluo@google.com; jolsa@kernel.org; linux-
> riscv@lists.infradead.org; linux-kernel@vger.kernel.org; bpf@vger.kernel.org;
> pulehui@huawei.com; Li, Haicheng <haicheng.li@intel.com>
> Subject: Re: [PATCH] riscv, bpf: Optimize zextw insn with Zba extension
>
> On Tue, May 07, 2024 at 06:45:28PM +0800, Xiao Wang wrote:
> > The Zba extension provides add.uw insn which can be used to implement
> > zext.w with rs2 set as ZERO.
> >
> > Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
> > ---
> > arch/riscv/Kconfig | 19 +++++++++++++++++++
> > arch/riscv/net/bpf_jit.h | 18 ++++++++++++++++++
> > 2 files changed, 37 insertions(+)
> >
> > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > index 6bec1bce6586..0679127cc0ea 100644
> > --- a/arch/riscv/Kconfig
> > +++ b/arch/riscv/Kconfig
> > @@ -586,6 +586,14 @@ config RISCV_ISA_V_PREEMPTIVE
> > preemption. Enabling this config will result in higher memory
> > consumption due to the allocation of per-task's kernel Vector
> context.
> >
> > +config TOOLCHAIN_HAS_ZBA
> > + bool
> > + default y
> > + depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zba)
> > + depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zba)
> > + depends on LLD_VERSION >= 150000 || LD_VERSION >= 23900
> > + depends on AS_HAS_OPTION_ARCH
> > +
> > config TOOLCHAIN_HAS_ZBB
> > bool
> > default y
> > @@ -601,6 +609,17 @@ config TOOLCHAIN_HAS_VECTOR_CRYPTO
> > def_bool $(as-instr, .option arch$(comma) +v$(comma) +zvkb)
> > depends on AS_HAS_OPTION_ARCH
> >
> > +config RISCV_ISA_ZBA
> > + bool "Zba extension support for bit manipulation instructions"
> > + depends on TOOLCHAIN_HAS_ZBA
> > + depends on RISCV_ALTERNATIVE
> > + default y
> > + help
> > + Adds support to dynamically detect the presence of the ZBA
> > + extension (address generation acceleration) and enable its usage.
>
> Recently I sent some patches to reword other extensions' help text,
> because the "add support to dynamically detect" had confused people a
> bit. Dynamic detection is done regardless of config options for Zba.
> The wording I went with in my patch for Zbb was:
> Add support for enabling optimisations in the kernel when the
> Zbb extension is detected at boot.
> Could you use something similar here in the opening sentence please?
Agree with you. Yes, I would reword it in next version.
Thanks,
Xiao
>
> Thanks,
> Conor.
prev parent reply other threads:[~2024-05-11 1:17 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-07 10:45 [PATCH] riscv, bpf: Optimize zextw insn with Zba extension Xiao Wang
2024-05-07 12:47 ` Pu Lehui
2024-05-07 14:00 ` Ben Dooks
2024-05-09 9:31 ` Wang, Xiao W
2024-05-08 11:20 ` Wang, Xiao W
2024-05-10 20:56 ` Conor Dooley
2024-05-11 1:17 ` Wang, Xiao W [this message]
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