devicetree-spec.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>
Cc: Mailing List <devicetree-spec-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Subject: Re: [PATCH] schemas: pci-bus: make reg optional for Marvell PCI controllers
Date: Mon, 29 Aug 2022 15:48:34 -0500	[thread overview]
Message-ID: <CAL_JsqL94_wp13DdZ_jVOU-AFt1mJ_ZL-eVnrDWMvY0qBxeybw@mail.gmail.com> (raw)
In-Reply-To: <20220823200033.3428436-1-andrew-g2DYL2Zd6BY@public.gmane.org>

On Tue, Aug 23, 2022 at 3:00 PM Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org> wrote:
>
> Marvell devices have PCE endpoints, but no PCI controller. The driver
> provides an emulated PCI controller. As such, it does not have a reg
> property.
>
> Signed-off-by: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>
> ---
>
> I've not posted the conversion of the Marvell PCI driver from .txt to
> .yaml yet. When i do, i will need something like this.
>
> dtschema/schemas/pci/pci-bus.yaml | 15 ++++++++++++++-
>  1 file changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/dtschema/schemas/pci/pci-bus.yaml b/dtschema/schemas/pci/pci-bus.yaml
> index 31bc1b9..0481bf6 100644
> --- a/dtschema/schemas/pci/pci-bus.yaml
> +++ b/dtschema/schemas/pci/pci-bus.yaml
> @@ -178,10 +178,23 @@ patternProperties:
>  required:
>    - device_type
>    - ranges
> -  - reg
>    - "#address-cells"
>    - "#size-cells"
>
> +if:
> +  not:
> +    properties:
> +      compatible:

This will also be true if compatible is not present which makes the 'if' false.

I think I'd just skip all this and just drop reg as required. There's
pending work to split pci-bus.yaml into host bridge,PCI-to-PCI bridge,
and PCI device schemas, so we can make it required for PCI devices and
bridges, but not host bridges which I think would work for you.

> +        contains:
> +          enum:
> +            - marvell,armada-370-pcie
> +            - marvell,armada-xp-pcie
> +            - marvell,dove-pcie
> +            - marvell,kirkwood-pcie
> +then:
> +  required:
> +    - reg
> +
>  dependentRequired:
>    msi-map-mask: [ msi-map ]
>
> --
> 2.37.2
>

      parent reply	other threads:[~2022-08-29 20:48 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-23 20:00 [PATCH] schemas: pci-bus: make reg optional for Marvell PCI controllers Andrew Lunn
     [not found] ` <20220823200033.3428436-1-andrew-g2DYL2Zd6BY@public.gmane.org>
2022-08-29 20:48   ` Rob Herring [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAL_JsqL94_wp13DdZ_jVOU-AFt1mJ_ZL-eVnrDWMvY0qBxeybw@mail.gmail.com \
    --to=robh-dgejt+ai2ygdnm+yrofe0a@public.gmane.org \
    --cc=andrew-g2DYL2Zd6BY@public.gmane.org \
    --cc=devicetree-spec-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).