From: Rob Herring <robh@kernel.org>
To: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: linux-sh@vger.kernel.org, "Damien Le Moal" <dlemoal@kernel.org>,
"Niklas Cassel" <cassel@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Geert Uytterhoeven" <geert+renesas@glider.be>,
"Michael Turquette" <mturquette@baylibre.com>,
"Stephen Boyd" <sboyd@kernel.org>,
"David Airlie" <airlied@gmail.com>,
"Daniel Vetter" <daniel@ffwll.ch>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Magnus Damm" <magnus.damm@gmail.com>,
"Daniel Lezcano" <daniel.lezcano@linaro.org>,
"Rich Felker" <dalias@libc.org>,
"John Paul Adrian Glaubitz" <glaubitz@physik.fu-berlin.de>,
"Lee Jones" <lee@kernel.org>, "Helge Deller" <deller@gmx.de>,
"Heiko Stuebner" <heiko.stuebner@cherry.de>,
"Shawn Guo" <shawnguo@kernel.org>,
"Sebastian Reichel" <sre@kernel.org>,
"Chris Morgan" <macromorgan@hotmail.com>,
"Linus Walleij" <linus.walleij@linaro.org>,
"Arnd Bergmann" <arnd@arndb.de>,
"David Rientjes" <rientjes@google.com>,
"Hyeonggon Yoo" <42.hyeyoo@gmail.com>,
"Vlastimil Babka" <vbabka@suse.cz>, "Baoquan He" <bhe@redhat.com>,
"Andrew Morton" <akpm@linux-foundation.org>,
"Guenter Roeck" <linux@roeck-us.net>,
"Kefeng Wang" <wangkefeng.wang@huawei.com>,
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"Guo Ren" <guoren@kernel.org>,
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"Jonathan Corbet" <corbet@lwn.net>,
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"Herve Codina" <herve.codina@bootlin.com>,
"Manikanta Guntupalli" <manikanta.guntupalli@amd.com>,
"Anup Patel" <apatel@ventanamicro.com>,
"Biju Das" <biju.das.jz@bp.renesas.com>,
"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
"Sam Ravnborg" <sam@ravnborg.org>,
"Sergey Shtylyov" <s.shtylyov@omp.ru>,
"Laurent Pinchart" <laurent.pinchart+renesas@ideasonboard.com>,
linux-ide@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-pci@vger.kernel.org, linux-serial@vger.kernel.org,
linux-fbdev@vger.kernel.org
Subject: Re: [RESEND v7 13/37] dt-bindings: clock: sh7750-cpg: Add renesas,sh7750-cpg header.
Date: Wed, 10 Apr 2024 11:13:11 -0500 [thread overview]
Message-ID: <20240410161311.GA4074406-robh@kernel.org> (raw)
In-Reply-To: <1db8627e4ca50b9d2d27e95d245518cac1cd62dc.1712207606.git.ysato@users.sourceforge.jp>
On Thu, Apr 04, 2024 at 02:14:24PM +0900, Yoshinori Sato wrote:
> SH7750 CPG Clock output define.
This and the subject don't match what the patch does.
>
> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> ---
> .../bindings/clock/renesas,sh7750-cpg.yaml | 105 ++++++++++++++++++
> include/dt-bindings/clock/sh7750-cpg.h | 26 +++++
> 2 files changed, 131 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.yaml
> create mode 100644 include/dt-bindings/clock/sh7750-cpg.h
>
> diff --git a/Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.yaml b/Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.yaml
> new file mode 100644
> index 000000000000..04c10b0834ee
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.yaml
> @@ -0,0 +1,105 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/renesas,sh7750-cpg.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Renesas SH7750/7751 Clock Pulse Generator (CPG)
> +
> +maintainers:
> + - Yoshinori Sato <ysato@users.sourceforge.jp>
> +
> +description:
> + The Clock Pulse Generator (CPG) generates core clocks for the SoC. It
> + includes PLLs, and variable ratio dividers.
> +
> + The CPG may also provide a Clock Domain for SoC devices, in combination with
> + the CPG Module Stop (MSTP) Clocks.
> +
> +properties:
> + compatible:
> + enum:
> + - renesas,sh7750-cpg # SH7750
> + - renesas,sh7750s-cpg # SH775S
> + - renesas,sh7750r-cpg # SH7750R
> + - renesas,sh7751-cpg # SH7751
> + - renesas,sh7751r-cpg # SH7751R
> +
> + reg: true
> +
> + reg-names: true
> +
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + const: extal
> +
> + '#clock-cells':
> + const: 1
> +
> + renesas,mode:
> + description: Board-specific settings of the MD[0-2] pins on SoC
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 6
> +
> + '#power-domain-cells':
> + const: 0
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - clocks
> + - clock-names
> + - '#clock-cells'
> +
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - renesas,sh7750-cpg
> + - renesas,sh7750s-cpg
> + then:
> + properties:
> + reg:
> + maxItems: 1
> + reg-names:
> + items:
> + - const: FRQCR
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - renesas,sh7750r-cpg
> + - renesas,sh7751-cpg
> + - renesas,sh7751r-cpg
> + then:
> + properties:
> + reg:
> + maxItems: 2
minItems: 2 (instead)
> + reg-names:
> + items:
> + - const: FRQCR
> + - const: CLKSTP00
Move this to the top-level and add 'minItems: 1'. Then above you just
need 'maxItems: 1' and here 'minItems: 2'.
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/sh7750-cpg.h>
> + cpg: clock-controller@ffc00000 {
> + #clock-cells = <1>;
> + #power-domain-cells = <0>;
> + compatible = "renesas,sh7751r-cpg";
> + clocks = <&extal>;
> + clock-names = "extal";
> + reg = <0xffc00000 20>, <0xfe0a0000 16>;
> + reg-names = "FRQCR", "CLKSTP00";
> + renesas,mode = <0>;
> + };
> diff --git a/include/dt-bindings/clock/sh7750-cpg.h b/include/dt-bindings/clock/sh7750-cpg.h
> new file mode 100644
> index 000000000000..ec267be91adf
> --- /dev/null
> +++ b/include/dt-bindings/clock/sh7750-cpg.h
> @@ -0,0 +1,26 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> + *
> + * Copyright 2023 Yoshinori Sato
> + */
> +
> +#ifndef __DT_BINDINGS_CLOCK_SH7750_H__
> +#define __DT_BINDINGS_CLOCK_SH7750_H__
> +
> +#define SH7750_CPG_PLLOUT 0
> +
> +#define SH7750_CPG_PCK 1
> +#define SH7750_CPG_BCK 2
> +#define SH7750_CPG_ICK 3
> +
> +#define SH7750_MSTP_SCI 4
> +#define SH7750_MSTP_RTC 5
> +#define SH7750_MSTP_TMU012 6
> +#define SH7750_MSTP_SCIF 7
> +#define SH7750_MSTP_DMAC 8
> +#define SH7750_MSTP_UBC 9
> +#define SH7750_MSTP_SQ 10
> +#define SH7750_CSTP_INTC 11
> +#define SH7750_CSTP_TMU34 12
> +#define SH7750_CSTP_PCIC 13
> +
> +#endif
> --
> 2.39.2
>
next prev parent reply other threads:[~2024-04-10 16:13 UTC|newest]
Thread overview: 61+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <cover.1712207606.git.ysato@users.sourceforge.jp>
2024-04-04 5:14 ` [RESEND v7 01/37] sh: passing FDT address to kernel startup Yoshinori Sato
2024-04-04 5:14 ` [RESEND v7 02/37] sh: Kconfig unified OF supported targets Yoshinori Sato
2024-04-04 5:14 ` [RESEND v7 03/37] sh: Enable OF support for build and configuration Yoshinori Sato
2024-04-04 5:14 ` [RESEND v7 04/37] dt-bindings: interrupt-controller: Add header for Renesas SH3/4 INTC Yoshinori Sato
2024-04-04 6:08 ` Krzysztof Kozlowski
2024-04-04 5:14 ` [RESEND v7 05/37] sh: GENERIC_IRQ_CHIP support for CONFIG_OF=y Yoshinori Sato
2024-04-04 5:14 ` [RESEND v7 06/37] sh: kernel/setup Update DT support Yoshinori Sato
2024-04-04 16:48 ` Rob Herring
2024-04-04 5:14 ` [RESEND v7 07/37] sh: Fix COMMON_CLK support in CONFIG_OF=y Yoshinori Sato
2024-04-04 5:14 ` [RESEND v7 08/37] clocksource: sh_tmu: CLOCKSOURCE support Yoshinori Sato
2024-04-09 13:56 ` Geert Uytterhoeven
2024-04-04 5:14 ` [RESEND v7 09/37] dt-binding: Add compatible SH7750 SoC Yoshinori Sato
2024-04-05 12:31 ` Geert Uytterhoeven
2024-04-10 12:12 ` Rob Herring
2024-04-04 5:14 ` [RESEND v7 10/37] sh: Common PCI Framework driver support Yoshinori Sato
2024-04-04 5:14 ` [RESEND v7 11/37] pci: pci-sh7751: Add SH7751 PCI driver Yoshinori Sato
2024-04-04 5:14 ` [RESEND v7 12/37] dt-bindings: pci: pci-sh7751: Add SH7751 PCI Yoshinori Sato
2024-04-10 12:16 ` Rob Herring
2024-04-04 5:14 ` [RESEND v7 13/37] dt-bindings: clock: sh7750-cpg: Add renesas, sh7750-cpg header Yoshinori Sato
2024-04-05 12:40 ` [RESEND v7 13/37] dt-bindings: clock: sh7750-cpg: Add renesas,sh7750-cpg header Geert Uytterhoeven
2024-04-10 16:13 ` Rob Herring [this message]
2024-04-04 5:14 ` [RESEND v7 14/37] clk: Compatible with narrow registers Yoshinori Sato
2024-04-05 12:56 ` Geert Uytterhoeven
2024-04-05 13:07 ` Damien Le Moal
2024-04-04 5:14 ` [RESEND v7 15/37] clk: renesas: Add SH7750/7751 CPG Driver Yoshinori Sato
2024-05-21 7:41 ` Geert Uytterhoeven
2024-04-04 5:14 ` [RESEND v7 16/37] irqchip: Add SH7751 INTC driver Yoshinori Sato
2024-04-04 5:14 ` [RESEND v7 17/37] dt-bindings: interrupt-controller: renesas, sh7751-intc: Add json-schema Yoshinori Sato
2024-04-10 16:14 ` [RESEND v7 17/37] dt-bindings: interrupt-controller: renesas,sh7751-intc: " Rob Herring
2024-04-04 5:14 ` [RESEND v7 18/37] irqchip: SH7751 external interrupt encoder with enable gate Yoshinori Sato
2024-04-04 5:14 ` [RESEND v7 19/37] dt-bindings: interrupt-controller: renesas, sh7751-irl-ext: Add json-schema Yoshinori Sato
2024-04-04 7:45 ` [RESEND v7 19/37] dt-bindings: interrupt-controller: renesas,sh7751-irl-ext: " Rob Herring
2024-04-04 5:14 ` [RESEND v7 20/37] serial: sh-sci: fix SH4 OF support Yoshinori Sato
2024-04-04 5:14 ` [RESEND v7 21/37] dt-bindings: serial: renesas, scif: Add scif-sh7751 Yoshinori Sato
2024-04-05 14:02 ` Geert Uytterhoeven
2024-04-04 5:14 ` [RESEND v7 22/37] dt-bindings: display: smi, sm501: SMI SM501 binding json-schema Yoshinori Sato
2024-04-10 16:33 ` [RESEND v7 22/37] dt-bindings: display: smi,sm501: " Rob Herring
2024-04-04 5:14 ` [RESEND v7 23/37] dt-bindings: display: sm501 register definition helper Yoshinori Sato
2024-04-05 13:25 ` Geert Uytterhoeven
2024-04-04 5:14 ` [RESEND v7 24/37] mfd: sm501: Convert platform_data to OF property Yoshinori Sato
2024-05-02 16:02 ` Lee Jones
2024-04-04 5:14 ` [RESEND v7 25/37] dt-binding: sh: cpus: Add SH CPUs json-schema Yoshinori Sato
2024-04-10 16:37 ` Rob Herring
2024-04-04 5:14 ` [RESEND v7 26/37] dt-bindings: vendor-prefixes: Add iodata Yoshinori Sato
2024-04-04 6:57 ` Krzysztof Kozlowski
2024-04-04 5:14 ` [RESEND v7 27/37] dt-bindings: ata: ata-generic: Add new targets Yoshinori Sato
2024-04-04 6:57 ` Krzysztof Kozlowski
2024-04-04 5:14 ` [RESEND v7 28/37] dt-bindings: soc: renesas: sh: Add SH7751 based target Yoshinori Sato
2024-04-05 13:44 ` Geert Uytterhoeven
2024-04-10 16:38 ` Rob Herring
2024-04-04 5:14 ` [RESEND v7 29/37] sh: SH7751R SoC Internal peripheral definition dtsi Yoshinori Sato
2024-04-04 5:14 ` [RESEND v7 30/37] sh: add RTS7751R2D Plus DTS Yoshinori Sato
2024-04-04 5:14 ` [RESEND v7 31/37] sh: Add IO DATA LANDISK dts Yoshinori Sato
2024-04-04 5:14 ` [RESEND v7 32/37] sh: Add IO DATA USL-5P dts Yoshinori Sato
2024-04-04 5:14 ` [RESEND v7 33/37] sh: j2_mimas_v2.dts update Yoshinori Sato
2024-04-05 12:44 ` Geert Uytterhoeven
2024-04-04 5:14 ` [RESEND v7 34/37] sh: Add dtbs target support Yoshinori Sato
2024-04-05 12:45 ` Geert Uytterhoeven
2024-04-04 5:14 ` [RESEND v7 35/37] sh: RTS7751R2D Plus OF defconfig Yoshinori Sato
2024-04-04 5:14 ` [RESEND v7 36/37] sh: LANDISK " Yoshinori Sato
2024-04-04 5:14 ` [RESEND v7 37/37] sh: j2_defconfig: update Yoshinori Sato
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