From: Lucas Stach <l.stach@pengutronix.de>
To: "Heiko Stübner" <heiko@sntech.de>,
"Andy Yan" <andy.yan@rock-chips.com>,
"Sandy Huang" <hjc@rock-chips.com>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Inki Dae" <inki.dae@samsung.com>,
"Seung-Woo Kim" <sw0312.kim@samsung.com>,
"Kyungmin Park" <kyungmin.park@samsung.com>,
"Andrzej Hajda" <andrzej.hajda@intel.com>,
"Neil Armstrong" <neil.armstrong@linaro.org>,
"Robert Foss" <rfoss@kernel.org>,
"Laurent Pinchart" <Laurent.pinchart@ideasonboard.com>,
"Jonas Karlman" <jonas@kwiboo.se>,
"Jernej Skrabec" <jernej.skrabec@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-samsung-soc@vger.kernel.org,
linux-rockchip@lists.infradead.org,
dri-devel@lists.freedesktop.org, kernel@pengutronix.de,
patchwork-lst@pengutronix.de
Subject: [PATCH 11/14] drm/bridge: analogix_dp: don't wait for PLL lock too early
Date: Fri, 3 May 2024 17:11:26 +0200 [thread overview]
Message-ID: <20240503151129.3901815-12-l.stach@pengutronix.de> (raw)
In-Reply-To: <20240503151129.3901815-1-l.stach@pengutronix.de>
The PLL will be reconfigured later, which may cause it to go out of lock
anyways, so there is no point in waiting for the PLL to lock here. Instead
we can continue execution of the link setup, which will properly set the
PLL parameters and will wait for the PLL to lock at the appropriate times.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 14 +-------------
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index d267cf05cbca..e9c643a8b6fc 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -356,7 +356,6 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
int analogix_dp_init_analog_func(struct analogix_dp_device *dp)
{
u32 reg;
- int timeout_loop = 0;
analogix_dp_set_analog_power_down(dp, POWER_ALL, 0);
@@ -368,18 +367,7 @@ int analogix_dp_init_analog_func(struct analogix_dp_device *dp)
writel(reg, dp->reg_base + ANALOGIX_DP_DEBUG_CTL);
/* Power up PLL */
- if (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
- analogix_dp_set_pll_power_down(dp, 0);
-
- while (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
- timeout_loop++;
- if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) {
- dev_err(dp->dev, "failed to get pll lock status\n");
- return -ETIMEDOUT;
- }
- usleep_range(10, 20);
- }
- }
+ analogix_dp_set_pll_power_down(dp, 0);
/* Enable Serdes FIFO function and Link symbol clock domain module */
reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
--
2.39.2
next prev parent reply other threads:[~2024-05-03 15:12 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-03 15:11 [PATCH 00/14] improve Analogix DP AUX channel handling Lucas Stach
2024-05-03 15:11 ` [PATCH 01/14] drm/bridge: analogix_dp: remove unused platform power_on_end callback Lucas Stach
2024-05-07 12:02 ` Robert Foss
2024-05-03 15:11 ` [PATCH 02/14] drm/rockchip: analogix_dp: add runtime PM handling Lucas Stach
2024-05-07 12:15 ` Robert Foss
2024-05-03 15:11 ` [PATCH 03/14] drm/bridge: analogix_dp: register AUX bus after enabling runtime PM Lucas Stach
2024-05-07 12:49 ` Robert Foss
2024-05-03 15:11 ` [PATCH 04/14] drm/bridge: analogix_dp: handle clock via " Lucas Stach
2024-05-07 12:57 ` Robert Foss
2024-05-03 15:11 ` [PATCH 05/14] drm/bridge: analogix_dp: remove unused analogix_dp_remove Lucas Stach
2024-05-07 12:58 ` Robert Foss
2024-05-03 15:11 ` [PATCH 06/14] drm/bridge: analogix_dp: remove clk handling from analogix_dp_set_bridge Lucas Stach
2024-05-07 13:00 ` Robert Foss
2024-05-03 15:11 ` [PATCH 07/14] drm/bridge: analogix_dp: move platform and PHY power handling into runtime PM Lucas Stach
2024-05-07 13:01 ` Robert Foss
2024-05-03 15:11 ` [PATCH 08/14] drm/bridge: analogix_dp: move basic controller init " Lucas Stach
2024-05-07 13:05 ` Robert Foss
2024-05-03 15:11 ` [PATCH 09/14] drm/bridge: analogix_dp: remove PLL lock check from analogix_dp_config_video Lucas Stach
2024-05-07 13:06 ` Robert Foss
2024-05-03 15:11 ` [PATCH 10/14] drm/bridge: analogix_dp: move macro reset after link bandwidth setting Lucas Stach
2024-05-07 13:07 ` Robert Foss
2024-05-03 15:11 ` Lucas Stach [this message]
2024-05-03 15:11 ` [PATCH 12/14] drm/bridge: analogix_dp: simplify and correct PLL lock checks Lucas Stach
2024-05-03 15:11 ` [PATCH 13/14] drm/bridge: analogix_dp: only read AUX status when an error occured Lucas Stach
2024-05-03 15:11 ` [PATCH 14/14] drm/bridge: analogix_dp: handle AUX transfer timeouts Lucas Stach
2024-05-07 13:10 ` [PATCH 00/14] improve Analogix DP AUX channel handling Robert Foss
2024-05-15 10:31 ` Lucas Stach
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