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From: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: uma.shankar@intel.com, jani.nikula@intel.com
Subject: [PATCH v8 0/7] Implement CMRR Support
Date: Thu,  9 May 2024 13:28:26 +0530	[thread overview]
Message-ID: <20240509075833.1858363-1-mitulkumar.ajitkumar.golani@intel.com> (raw)

CMRR is a display feature that uses adaptive sync
framework to vary Vtotal slightly to match the
content rate exactly without frame drops. This
feature is a variation of VRR where it varies Vtotal
slightly (between additional 0 and 1 Vtotal scanlines)
to match content rate exactly without frame drops
using the adaptive sync framework.

enable this feature by programing new registers for
CMRR enable, CMRR_M, CMRR_N, vmin=vmax=flipline.The
CMRR_M/CMRR_N ratio represents the fractional part
in (actual refresh rate/target refresh rate) * origVTotal.

--v6:
- CMRR handling in co-existatnce of LRR and DRRS
- Correct vtotal paramas accuracy and add 2 digit precision.

--v7:
- Rebased patches in-accordance to AS SDP merge.
- Add neccessary gaurd to prevent crtc_state mismatch
during intel_vrr_get_config.

-v8:
- Add support for AS SDP for CMRR.
- update palce holder for CMRR register(Jani).
- Make CMRR as subset of FAVT, as per comments in patch#3.

Mitul Golani (7):
  drm/i915: Define and compute Transcoder CMRR registers
  drm/i915: Add Enable/Disable for CMRR based on VRR state
  drm/i915: Compute CMRR and calculate vtotal
  Add refresh rate divider to struct representing AS SDP
  drm/i915/display: Add support for pack and unpack
  drm/i915/display: Compute Adaptive sync SDP params
  drm/i915/display: Compute vrr vsync params

 drivers/gpu/drm/i915/display/intel_display.c  |  61 ++++++-
 .../drm/i915/display/intel_display_device.h   |   1 +
 .../drm/i915/display/intel_display_types.h    |   6 +
 drivers/gpu/drm/i915/display/intel_dp.c       |  20 ++-
 drivers/gpu/drm/i915/display/intel_vrr.c      | 168 +++++++++++++++---
 drivers/gpu/drm/i915/i915_reg.h               |  10 ++
 include/drm/display/drm_dp_helper.h           |   1 +
 7 files changed, 230 insertions(+), 37 deletions(-)

-- 
2.25.1


             reply	other threads:[~2024-05-09  8:04 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-09  7:58 Mitul Golani [this message]
2024-05-09  7:58 ` [PATCH v8 1/7] drm/i915: Define and compute Transcoder CMRR registers Mitul Golani
2024-05-13  6:59   ` Murthy, Arun R
2024-05-13 11:54     ` Jani Nikula
2024-05-13 11:53   ` Jani Nikula
2024-05-09  7:58 ` [PATCH v8 2/7] drm/i915: Add Enable/Disable for CMRR based on VRR state Mitul Golani
2024-05-13 11:20   ` Murthy, Arun R
2024-05-09  7:58 ` [PATCH v8 3/7] drm/i915: Compute CMRR and calculate vtotal Mitul Golani
2024-05-17 10:38   ` Murthy, Arun R
2024-05-23 11:21   ` Nautiyal, Ankit K
2024-05-09  7:58 ` [PATCH v8 4/7] Add refresh rate divider to struct representing AS SDP Mitul Golani
2024-05-20  3:27   ` Murthy, Arun R
2024-05-09  7:58 ` [PATCH v8 5/7] drm/i915/display: Add support for pack and unpack Mitul Golani
2024-05-23 11:31   ` Nautiyal, Ankit K
2024-05-09  7:58 ` [PATCH v8 6/7] drm/i915/display: Compute Adaptive sync SDP params Mitul Golani
2024-05-09  7:58 ` [PATCH v8 7/7] drm/i915/display: Compute vrr vsync params Mitul Golani
2024-05-23 11:38   ` Nautiyal, Ankit K
2024-05-09  8:31 ` ✗ Fi.CI.CHECKPATCH: warning for Implement CMRR Support (rev8) Patchwork
2024-05-09  8:32 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-05-09  8:38 ` ✓ Fi.CI.BAT: success " Patchwork
2024-05-09 19:42 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-05-10  7:36 ` Patchwork
2024-05-10  8:05 ` ✓ Fi.CI.IGT: success " Patchwork

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