messages from 2021-05-18 07:29:12 to 2021-05-19 14:53:52 UTC [more...]
[Intel-gfx] [PATCH i-g-t 0/9] DG1/LMEM uAPI basics v2
2021-05-19 14:53 UTC (2+ messages)
` [Intel-gfx] [PATCH i-g-t 1/9] i915_drm.h sync
[Intel-gfx] [PATCH V3] drm/i915/jsl: Add W/A 1409054076 for JSL
2021-05-19 14:18 UTC
[Intel-gfx] [RFC 0/2] GuC submission / DRM scheduler integration plan + new uAPI
2021-05-19 13:57 UTC (9+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for GuC submission / DRM scheduler integration plan + new uAPI (rev2)
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] [RFC 1/2] drm/doc/rfc: i915 GuC submission / DRM scheduler
` [Intel-gfx] [RFC 2/2] drm/doc/rfc: i915 new parallel submission uAPI plan
` [Intel-gfx] [Mesa-dev] "
` [Intel-gfx] ✓ Fi.CI.BAT: success for GuC submission / DRM scheduler integration plan + new uAPI (rev2)
[Intel-gfx] New uAPI for color management proposal and feedback request
2021-05-19 13:49 UTC (4+ messages)
[Intel-gfx] [PATCH] drm/i915/gvt: remove local storage of debugfs file
2021-05-19 13:45 UTC (9+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 1/3] gpu: drm: replace occurrences of invalid character
2021-05-19 8:15 UTC
[Intel-gfx] [PATCH 0/9] drm + usb-type-c: Add support for out-of-band hotplug notification (v2)
2021-05-19 13:37 UTC (3+ messages)
` [Intel-gfx] [PATCH 9/9] platform/x86/intel_cht_int33fe: Correct "displayport" fwnode reference
[Intel-gfx] [drm-rerere PATCH] nightly.conf: drop amd branches from drm-tip
2021-05-19 13:28 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for "
[Intel-gfx] [PATCH i-g-t 00/12] DG1/LMEM uAPI basics
2021-05-19 12:07 UTC (10+ messages)
` [Intel-gfx] [PATCH i-g-t 07/12] i915_drm.h sync
` [Intel-gfx] [igt-dev] [PATCH i-g-t 00/12] DG1/LMEM uAPI basics
[Intel-gfx] [PATCH 1/2] drm/i915/cmdparser: No-op failed batches on all platforms
2021-05-19 11:40 UTC (7+ messages)
` [Intel-gfx] [PATCH 2/2] Revert "drm/i915: Propagate errors on awaiting already signaled fences"
` [Intel-gfx] [PATCH] "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/cmdparser: No-op failed batches on all platforms
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/cmdparser: No-op failed batches on all platforms (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH v2 00/15] drm/i915: Move LMEM (VRAM) management over to TTM
2021-05-19 11:29 UTC (62+ messages)
` [Intel-gfx] [PATCH v2 01/15] drm/i915: Untangle the vma pages_mutex
` [Intel-gfx] [PATCH v2 02/15] drm/i915: Don't free shared locks while shared
` [Intel-gfx] [PATCH v2 03/15] drm/i915: Fix i915_sg_page_sizes to record dma segments rather than physical pages
` [Intel-gfx] [PATCH v2 04/15] drm/ttm: Export functions to initialize and finalize the ttm range manager standalone
` [Intel-gfx] [PATCH v2 05/15] drm/i915/ttm Initialize the ttm device and memory managers
` [Intel-gfx] [PATCH v2 06/15] drm/i915/ttm: Embed a ttm buffer object in the i915 gem object
` [Intel-gfx] [PATCH v2 07/15] drm/ttm: Export ttm_bo_tt_destroy()
` [Intel-gfx] [PATCH v2 08/15] drm/i915/ttm Add a generic TTM memcpy move for page-based iomem
` [Intel-gfx] [PATCH v2 09/15] drm/ttm, drm/amdgpu: Allow the driver some control over swapping
` [Intel-gfx] [PATCH v2 10/15] drm/i915/ttm: Introduce a TTM i915 gem object backend
` [Intel-gfx] [PATCH v2 11/15] drm/i915/lmem: Verify checks for lmem residency
` [Intel-gfx] [PATCH v2 12/15] drm/i915: Disable mmap ioctl for gen12+
` [Intel-gfx] [PATCH v2 13/15] drm/ttm: Add BO and offset arguments for vm_access and vm_fault ttm handlers
` [Intel-gfx] [PATCH v2 14/15] drm/i915: Use ttm mmap handling for ttm bo's
` [Intel-gfx] [PATCH v2 15/15] drm/i915/ttm: Add io sgt caching to i915_ttm_io_mem_pfn
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Move LMEM (VRAM) management over to TTM (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✓ Fi.CI.IGT: success "
[Intel-gfx] [PATCH] drm/i915/plane: add intel_plane_helper_add() helper
2021-05-19 10:37 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PULL] gvt-fixes
2021-05-19 8:50 UTC (2+ messages)
[Intel-gfx] [PATCH v4 00/23] Alder Lake-P Support
2021-05-19 6:49 UTC (13+ messages)
` [Intel-gfx] [PATCH v4 03/23] drm/i915/xelpd: Calculate VDSC RC parameters
` [Intel-gfx] [PATCH v4 10/23] drm/i915/adl_p: Don't config MBUS and DBUF during display initialization
` [Intel-gfx] [PATCH v4 11/23] drm/i915/adl_p: Add ddb allocation support
` [Intel-gfx] [PATCH v4 16/23] drm/i915/display: Remove a redundant function argument from intel_psr_enable_source()
` [Intel-gfx] [PATCH v4 18/23] drm/i915/display: Introduce new intel_psr_pause/resume function
[Intel-gfx] [PATCH] drm/i915/reg: replace BIT() usage with REG_BIT()
2021-05-19 6:47 UTC (5+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/reg: replace BIT() usage with REG_BIT() (rev2)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] add remap_pfn_range_notrack instead of reinventing it in i915 v2
2021-05-19 5:51 UTC (16+ messages)
` [Intel-gfx] [PATCH 4/4] i915: fix remap_io_sg to verify the pgprot
[Intel-gfx] [CI 0/5] Rename all CSR references to DMC
2021-05-19 5:48 UTC (14+ messages)
` [Intel-gfx] [CI 1/5] drm/i915/dmc: s/intel_csr/intel_dmc
` [Intel-gfx] [CI 2/5] drm/i915/dmc: s/HAS_CSR/HAS_DMC
` [Intel-gfx] [CI 3/5] drm/i915/dmc: Rename macro names containing csr
` [Intel-gfx] [CI 4/5] drm/i915/dmc: Rename functions names having "csr"
` [Intel-gfx] [CI 5/5] drm/i915/dmc: s/intel_csr.c/intel_dmc.c and s/intel_csr.h/intel_dmc.h
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Rename all CSR references to DMC (rev5)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [RFC PATCH 00/97] Basic GuC submission support in the i915
2021-05-19 3:31 UTC (7+ messages)
` [Intel-gfx] [RFC PATCH 01/97] drm/i915/gt: Move engine setup out of set_default_submission
` [Intel-gfx] [RFC PATCH 02/97] drm/i915/gt: Move submission_method into intel_gt
` [Intel-gfx] [RFC PATCH 03/97] drm/i915/gt: Move CS interrupt handler to the backend
[Intel-gfx] [CI 00/17] ADL-P: more reviewed patches
2021-05-19 0:53 UTC (21+ messages)
` [Intel-gfx] [CI 01/17] drm/i915/xelpd: Calculate VDSC RC parameters
` [Intel-gfx] [CI 02/17] drm/i915/xelpd: Add rc_qp_table for rcparams calculation
` [Intel-gfx] [CI 03/17] drm/i915/adl_p: Add dedicated SAGV watermarks
` [Intel-gfx] [CI 04/17] drm/i915/adl_p: Setup ports/phys
` [Intel-gfx] [CI 05/17] drm/i915/adl_p: Implement TC sequences
` [Intel-gfx] [CI 06/17] drm/i915/adl_p: Don't config MBUS and DBUF during display initialization
` [Intel-gfx] [CI 07/17] drm/i915/adl_p: Add ddb allocation support
` [Intel-gfx] [CI 08/17] drm/i915: Introduce MBUS relative dbuf offsets
` [Intel-gfx] [CI 09/17] drm/i915/adl_p: MBUS programming
` [Intel-gfx] [CI 10/17] drm/i915/adl_p: Tx escape clock with DSI
` [Intel-gfx] [CI 11/17] drm/i915/display: Replace dc3co_enabled with dc3co_exitline on intel_psr struct
` [Intel-gfx] [CI 12/17] drm/i915/display: Add PSR interrupt error check function
` [Intel-gfx] [CI 13/17] drm/i915/adl_p: Define and use ADL-P specific DP translation tables
` [Intel-gfx] [CI 14/17] drm/i915/adl_p: Add PLL Support
` [Intel-gfx] [CI 15/17] drm/i915/adl_p: Program DP/HDMI link rate to DDI_BUF_CTL
` [Intel-gfx] [CI 16/17] drm/i915/adlp: Add PIPE_MISC2 programming
` [Intel-gfx] [CI 17/17] drm/i915/adl_p: Update memory bandwidth parameters
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for ADL-P: more reviewed patches
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [CI 0/5] Rename all CSR references to DMC
2021-05-18 20:46 UTC (10+ messages)
` [Intel-gfx] [CI 1/5] drm/i915/dmc: s/intel_csr/intel_dmc
` [Intel-gfx] [CI 2/5] drm/i915/dmc: s/HAS_CSR/HAS_DMC
` [Intel-gfx] [CI 3/5] drm/i915/dmc: Rename macro names containing csr
` [Intel-gfx] [CI 4/5] drm/i915/dmc: Rename functions names having "csr"
` [Intel-gfx] [CI 5/5] drm/i915/dmc: s/intel_csr.c/intel_dmc.c and s/intel_csr.h/intel_dmc.h
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Rename all CSR references to DMC (rev4)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH v6 0/9] drm: Extract DPCD backlight helpers from i915, add support in nouveau
2021-05-18 20:12 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: Extract DPCD backlight helpers from i915, add support in nouveau (rev10)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH CI] drm/i915: Initialize err in remap_io_sg()
2021-05-18 18:00 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for "
[Intel-gfx] [PATCH 0/7] Per client engine busyness
2021-05-18 12:06 UTC (21+ messages)
[Intel-gfx] [PATCH] drm/i915/gt: Disable HiZ Raw Stall Optimization on broken gen7
2021-05-18 12:59 UTC (5+ messages)
[Intel-gfx] [PATCH] drm/i915: only disable default vga device
2021-05-18 12:39 UTC (5+ messages)
[Intel-gfx] [PATCH 00/27] drm/i915/gem: ioctl clean-ups (v5)
2021-05-18 10:51 UTC (8+ messages)
` [Intel-gfx] [PATCH 19/27] drm/i915/gem: Use the proto-context to handle create parameters
[Intel-gfx] 5.13 i915/PAT regression on Brasswell, adding nopat to the kernel commandline worksaround this
2021-05-18 9:28 UTC (4+ messages)
[Intel-gfx] [PATCH v7 00/15] Restricted DMA
2021-05-18 9:10 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for Restricted DMA (rev3)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH V2] drm/i915/jsl: Add W/A 1409054076 for JSL
2021-05-18 9:08 UTC (5+ messages)
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