messages from 2021-05-21 15:33:43 to 2021-05-25 05:48:44 UTC [more...]
[Intel-gfx] [PATCH v4 00/17] drm/i915: Introduce Intel PXP
2021-05-25 5:47 UTC (9+ messages)
` [Intel-gfx] [PATCH v4 01/17] drm/i915/pxp: Define PXP component interface
` [Intel-gfx] [PATCH v4 02/17] mei: pxp: export pavp client to me client bus
` [Intel-gfx] [PATCH v4 03/17] drm/i915/pxp: define PXP device flag and kconfig
` [Intel-gfx] [PATCH v4 04/17] drm/i915/gt: Export the pinned context constructor and destructor
` [Intel-gfx] [PATCH v4 05/17] drm/i915/pxp: allocate a vcs context for pxp usage
` [Intel-gfx] [PATCH v4 06/17] drm/i915/pxp: Implement funcs to create the TEE channel
` [Intel-gfx] [PATCH v4 07/17] drm/i915/pxp: set KCR reg init
` [Intel-gfx] [PATCH v4 08/17] drm/i915/pxp: Create the arbitrary session after boot
[Intel-gfx] [PATCH 0/6] dma-buf: Add an API for exporting sync files (v10)
2021-05-25 5:27 UTC (11+ messages)
` [Intel-gfx] [PATCH 1/6] dma-buf: add dma_fence_array_for_each (v2)
` [Intel-gfx] [PATCH 2/6] dma-buf: Rename dma_resv helpers from _rcu to _unlocked
` [Intel-gfx] [PATCH 3/6] dma-buf: add dma_resv_get_singleton_unlocked (v4)
` [Intel-gfx] [PATCH 4/6] dma-buf: Add an API for exporting sync files (v9)
` [Intel-gfx] [PATCH 5/6] RFC: dma-buf: Add an extra fence to dma_resv_get_singleton_unlocked
` [Intel-gfx] [PATCH 6/6] RFC: dma-buf: Add an API for importing sync files (v6)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for dma-buf: Add an API for exporting sync files (v10)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [RFC PATCH 00/97] Basic GuC submission support in the i915
2021-05-25 3:21 UTC (45+ messages)
` [Intel-gfx] [RFC PATCH 05/97] drm/i915/guc: use probe_error log for CT enablement failure
` [Intel-gfx] [RFC PATCH 06/97] drm/i915/guc: enable only the user interrupt when using GuC submission
` [Intel-gfx] [RFC PATCH 07/97] drm/i915/guc: Remove sample_forcewake h2g action
` [Intel-gfx] [RFC PATCH 08/97] drm/i915/guc: Keep strict GuC ABI definitions
` [Intel-gfx] [RFC PATCH 09/97] drm/i915/guc: Stop using fence/status from CTB descriptor
` [Intel-gfx] [RFC PATCH 10/97] drm/i915: Promote ptrdiff() to i915_utils.h
` [Intel-gfx] [RFC PATCH 11/97] drm/i915/guc: Only rely on own CTB size
` [Intel-gfx] [RFC PATCH 12/97] drm/i915/guc: Don't repeat CTB layout calculations
` [Intel-gfx] [RFC PATCH 13/97] drm/i915/guc: Replace CTB array with explicit members
` [Intel-gfx] [RFC PATCH 14/97] drm/i915/guc: Update sizes of CTB buffers
` [Intel-gfx] [RFC PATCH 16/97] drm/i915/guc: Start protecting access to CTB descriptors
` [Intel-gfx] [RFC PATCH 23/97] drm/i915/guc: Support per context scheduling policies
` [Intel-gfx] [RFC PATCH 28/97] drm/i915/guc: Kill guc_clients.ct_pool
` [Intel-gfx] [RFC PATCH 30/97] drm/i915/uc: turn on GuC/HuC auto mode by default
` [Intel-gfx] [RFC PATCH 35/97] drm/i915/guc: Improve error message for unsolicited CT response
` [Intel-gfx] [RFC PATCH 36/97] drm/i915/guc: Add non blocking CTB send function
` [Intel-gfx] [RFC PATCH 37/97] drm/i915/guc: Add stall timer to "
` [Intel-gfx] [RFC PATCH 38/97] drm/i915/guc: Optimize CTB writes and reads
` [Intel-gfx] [RFC PATCH 39/97] drm/i915/guc: Increase size of CTB buffers
` [Intel-gfx] [RFC PATCH 40/97] drm/i915/guc: Module load failure test for CT buffer creation
[Intel-gfx] [PATCH v7 00/15] Restricted DMA
2021-05-25 3:08 UTC (14+ messages)
` [Intel-gfx] [PATCH v7 01/15] swiotlb: Refactor swiotlb init functions
` [Intel-gfx] [PATCH v7 04/15] swiotlb: Add restricted DMA pool initialization
` [Intel-gfx] [PATCH v7 05/15] swiotlb: Add a new get_io_tlb_mem getter
[Intel-gfx] [CI 0/3] More DMC cleanup
2021-05-25 2:24 UTC (7+ messages)
` [Intel-gfx] [CI 1/3] drm/i915/dmc: s/DRM_ERROR/drm_err
` [Intel-gfx] [CI 2/3] drm/i915/dmc: Add intel_dmc_has_payload() helper
` [Intel-gfx] [CI 3/3] drm/i915/dmc: Move struct intel_dmc to intel_dmc.h
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for More DMC cleanup (rev4)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 1/3] drm/i915/adlp: Require DPT FB CCS color planes to be 2MB aligned
2021-05-25 0:22 UTC (8+ messages)
` [Intel-gfx] [PATCH 2/3] drm/i915/adlp: Fix GEM VM asserts for DPT VMs
` [Intel-gfx] [PATCH 3/3] drm/i915/debugfs: Print remap info for DPT VMAs as well
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915/adlp: Require DPT FB CCS color planes to be 2MB aligned
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 0/3] GPD Win Max display fixes
2021-05-24 23:27 UTC (8+ messages)
` [Intel-gfx] [PATCH 1/3] drm/i915/opregion: add support for mailbox #5 EDID
` [Intel-gfx] [PATCH 2/3] drm/i915/dp: use opregion mailbox #5 EDID for eDP, if available
` [Intel-gfx] [PATCH 3/3] drm: Add orientation quirk for GPD Win Max
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for GPD Win Max display fixes
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH 1/5] drm/i915/display/adl_p: Drop earlier return in tc_has_modular_fia()
2021-05-24 23:25 UTC (12+ messages)
` [Intel-gfx] [PATCH 2/5] drm/i915/adl_p: Handle TC cold
` [Intel-gfx] [PATCH 3/5] drm/i915: WA for zero memory channel
` [Intel-gfx] [PATCH 4/5] drm/i915/display/adl_p: Allow DC3CO in pipe and port B
` [Intel-gfx] [PATCH 5/5] drm/i915/display/adl_p: Disable PSR2
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/5] drm/i915/display/adl_p: Drop earlier return in tc_has_modular_fia()
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH 0/7] Pipe DMC Support
2021-05-24 21:58 UTC (13+ messages)
` [Intel-gfx] [PATCH 1/7] drm/i915/dmc: s/DRM_ERROR/drm_err
` [Intel-gfx] [PATCH 2/7] drm/i915/dmc: Add intel_dmc_has_payload() helper
` [Intel-gfx] [PATCH 3/7] drm/i915/dmc: Move struct intel_dmc to intel_dmc.h
` [Intel-gfx] [PATCH 4/7] drm/i915/dmc: Introduce DMC_FW_MAIN
` [Intel-gfx] [PATCH 5/7] drm/i915/xelpd: Pipe A DMC plugging
` [Intel-gfx] [PATCH 6/7] drm/i915/adl_p: Pipe B DMC Support
` [Intel-gfx] [PATCH 7/7] drm/i915/adl_p: Load DMC
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Pipe DMC Support (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH v3 00/12] drm/i915: Move LMEM (VRAM) management over to TTM
2021-05-24 18:47 UTC (12+ messages)
` [Intel-gfx] [PATCH v3 07/12] drm, drm/i915: Move the memcpy_from_wc functionality to core drm
` [Intel-gfx] [PATCH v3 08/12] drm/ttm: Use drm_memcpy_from_wc_dbm for TTM bo moves
` [Intel-gfx] [PATCH v3 12/12] drm/i915/lmem: Verify checks for lmem residency
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Move LMEM (VRAM) management over to TTM (rev3)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [RFC 0/2] GuC submission / DRM scheduler integration plan + new uAPI
2021-05-24 15:33 UTC (21+ messages)
` [Intel-gfx] [RFC 2/2] drm/doc/rfc: i915 new parallel submission uAPI plan
` [Intel-gfx] [Mesa-dev] "
[Intel-gfx] [PATCH i-g-t] gem_watchdog: Skip test if default request expiry is not compiled in
2021-05-24 14:38 UTC (3+ messages)
` [Intel-gfx] [igt-dev] "
` [Intel-gfx] [PATCH i-g-t v2] "
[Intel-gfx] [RFC] intel-gpu-top: Adapt for fdinfo stats
2021-05-24 14:02 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for "
[Intel-gfx] [PATCH v4 00/23] Alder Lake-P Support
2021-05-24 13:40 UTC (9+ messages)
` [Intel-gfx] [PATCH v4 05/23] drm/i915/xelpd: Add VRR guardband for VRR CTL
` [Intel-gfx] [PATCH v4 18/23] drm/i915/display: Introduce new intel_psr_pause/resume function
[Intel-gfx] Bug: 5.12.5 - list_add double add at __i915_gem_object_make_shrinkable+0xa6/0xe0
2021-05-24 13:38 UTC (3+ messages)
[Intel-gfx] [drm-rerere PATCH] nightly.conf: drop amd branches from drm-tip
2021-05-24 12:05 UTC (4+ messages)
[Intel-gfx] [PATCH 01/11] drm/amdgpu: Comply with implicit fencing rules
2021-05-24 7:54 UTC (19+ messages)
` [Intel-gfx] [PATCH 06/11] drm/<driver>: drm_gem_plane_helper_prepare_fb is now the default
` [Intel-gfx] [PATCH 09/11] drm/omap: Follow implicit fencing in prepare_fb
` [Intel-gfx] [PATCH 11/11] drm/tiny: drm_gem_simple_display_pipe_prepare_fb is the default
` [Intel-gfx] [Mesa-dev] [PATCH 01/11] drm/amdgpu: Comply with implicit fencing rules
` [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [01/11] "
[Intel-gfx] [PATCH 0/7] Per client engine busyness
2021-05-24 10:48 UTC (16+ messages)
[Intel-gfx] i915 gvt broke drm-tip; Fix ASAP
2021-05-24 9:58 UTC (3+ messages)
[Intel-gfx] [PATCH] drm/i915/gvt: Add missing macro name changes
2021-05-24 9:19 UTC (6+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH i-g-t 0/9] DG1/LMEM uAPI basics v2
2021-05-24 6:32 UTC (7+ messages)
` [Intel-gfx] [PATCH i-g-t 4/9] tests/gem_gpgpu_fill: Convert from simple to standard igt_main
` [Intel-gfx] [igt-dev] "
` [Intel-gfx] [PATCH i-g-t 6/9] tests/i915/gem_gpgpu_fill: Use memory region interface
` [Intel-gfx] [PATCH i-g-t 7/9] tests/i915/gem_media_fill: "
[Intel-gfx] [PATCH] drm/i915/gvt: Add missing macro name changes
2021-05-24 5:59 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gvt: Add missing macro name changes (rev2)
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 0/3] More DMC cleanup
2021-05-24 4:12 UTC (7+ messages)
` [Intel-gfx] [PATCH 1/3] drm/i915/dmc: s/DRM_ERROR/drm_err
` [Intel-gfx] [PATCH 2/3] drm/i915/dmc: Add intel_dmc_has_payload() helper
` [Intel-gfx] [PATCH 3/3] drm/i915/dmc: Move struct intel_dmc to intel_dmc.h
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for More DMC cleanup (rev3)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 0/3] Clean a few backend interfaces in the i915
2021-05-24 3:45 UTC (6+ messages)
` [Intel-gfx] [PATCH 1/3] drm/i915/gt: Move engine setup out of set_default_submission
` [Intel-gfx] [PATCH 2/3] drm/i915/gt: Move submission_method into intel_gt
` [Intel-gfx] [PATCH 3/3] drm/i915/gt: Move CS interrupt handler to the backend
` [Intel-gfx] ✓ Fi.CI.BAT: success for Clean a few backend interfaces in the i915
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v2] drm/i915/gem: Use list_entry to access list members
2021-05-23 18:01 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gem: Use list_entry to access list members (rev2)
[Intel-gfx] [PATCH] drm/i915: Implement PSF GV point support
2021-05-23 17:32 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Implement PSF GV point support (rev2)
[Intel-gfx] [PATCH] drm/i915/plane: add intel_plane_helper_add() helper
2021-05-23 8:13 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/plane: add intel_plane_helper_add() helper (rev2)
[Intel-gfx] [PATCH] drm/i915/gem: Use list_entry to access list members
2021-05-23 2:59 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH] drm/i915/display: fix typo when returning table
2021-05-22 13:03 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for "
[Intel-gfx] [PATCH 0/3] More DMC cleanup
2021-05-22 11:15 UTC (6+ messages)
` [Intel-gfx] [PATCH 2/3] drm/i915/dmc: Add intel_dmc_has_payload() helper
` [Intel-gfx] ✓ Fi.CI.IGT: success for More DMC cleanup (rev2)
[Intel-gfx] [PATCH v2 0/1] drm/dp_mst: Use kHz as link rate units when settig source max link caps at init
2021-05-22 2:55 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/dp_mst: Use kHz as link rate units when settig source max link caps at init (rev2)
[Intel-gfx] [RFC 0/7] Per client engine busyness
2021-05-22 0:22 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for "
[Intel-gfx] [PATCH 0/7] Pipe DMC Support
2021-05-21 23:43 UTC (12+ messages)
` [Intel-gfx] [PATCH 1/7] drm/i915/dmc: s/DRM_ERROR/drm_err
` [Intel-gfx] [PATCH 2/7] drm/i915/dmc: Add intel_dmc_has_payload() helper
` [Intel-gfx] [PATCH 3/7] drm/i915/dmc: Move struct intel_dmc to intel_dmc.h
` [Intel-gfx] [PATCH 4/7] drm/i915/dmc: Introduce DMC_FW_MAIN
` [Intel-gfx] [PATCH 5/7] drm/i915/xelpd: Pipe A DMC plugging
` [Intel-gfx] [PATCH 6/7] drm/i915/adl_p: Pipe B DMC Support
` [Intel-gfx] [PATCH 7/7] drm/i915/adl_p: Load DMC
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Pipe DMC Support
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [RFC PATCH 0/5] Core TTM changes for i915 TTM enabling
2021-05-21 23:14 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for "
[Intel-gfx] [PATCH v6 0/9] drm: Extract DPCD backlight helpers from i915, add support in nouveau
2021-05-21 20:03 UTC (5+ messages)
` [Intel-gfx] [PATCH v6 1/9] drm/i915/dpcd_bl: Remove redundant AUX backlight frequency calculations
` [Intel-gfx] [PATCH v6 8/9] drm/dp: Extract i915's eDP backlight code into DRM helpers
[Intel-gfx] [PATCH v2 1/4] drm/i915/display: Fix fastsets involving PSR
2021-05-21 19:58 UTC (4+ messages)
` [Intel-gfx] [PATCH v2 3/4] drm/i915/display: Nuke has_infoframe
[Intel-gfx] [PATCH] drm/i915/gt: fix typo issue
2021-05-21 19:45 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for "
[Intel-gfx] [PATCH] drm/i915/gvt: remove local storage of debugfs file
2021-05-21 18:43 UTC (6+ messages)
[Intel-gfx] [PATCH] drm/i915: Reenable LTTPR non-transparent LT mode for DPCD_REV<1.4
2021-05-21 16:32 UTC (5+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for "
` [Intel-gfx] ✓ Fi.CI.IGT: success "
[Intel-gfx] [CI 0/5] Rename all CSR references to DMC
2021-05-21 16:31 UTC (5+ messages)
` [Intel-gfx] [CI 3/5] drm/i915/dmc: Rename macro names containing csr
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).