From: Animesh Manna <animesh.manna@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: uma.shankar@intel.com, dibin.moolakadan.subrahmanian@intel.com,
jani.nikula@intel.com, Animesh Manna <animesh.manna@intel.com>
Subject: [PATCH v4 10/13] drm/i915/cmtg: Add trigger to enable/disable cmtg
Date: Sun, 12 Apr 2026 16:07:09 +0530 [thread overview]
Message-ID: <20260412103712.4021213-11-animesh.manna@intel.com> (raw)
In-Reply-To: <20260412103712.4021213-1-animesh.manna@intel.com>
Enable CMTG with fixed refresh rate mode and with dynamic
dc state enabled.
Disable CMTG with transcoder disable or if there is a transition
to vrr mode from fixed refresh rate mode.
v2:
- Move the enabled flag update to avoid issue in the disable timeout
path. [Uma]
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
drivers/gpu/drm/i915/display/intel_cmtg.c | 5 +++++
drivers/gpu/drm/i915/display/intel_display.c | 10 ++++++++++
drivers/gpu/drm/i915/display/intel_display_types.h | 4 ++++
3 files changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.c b/drivers/gpu/drm/i915/display/intel_cmtg.c
index 00e5bdd1b063..fc4595efec2d 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg.c
+++ b/drivers/gpu/drm/i915/display/intel_cmtg.c
@@ -172,11 +172,14 @@ static void intel_cmtg_disable_all(struct intel_display *display,
void intel_cmtg_disable(const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
if (!intel_cmtg_is_supported(crtc_state))
return;
+ crtc->cmtg.enabled = false;
+
intel_de_rmw(display, TRANS_VRR_CTL_CMTG(cpu_transcoder),
VRR_CTL_VRR_ENABLE | VRR_CTL_FLIP_LINE_EN, 0);
@@ -384,6 +387,7 @@ void intel_cmtg_enable_sync(const struct intel_crtc_state *crtc_state)
void intel_cmtg_enable_ddi(const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
if (!intel_cmtg_is_allowed(crtc_state))
@@ -391,5 +395,6 @@ void intel_cmtg_enable_ddi(const struct intel_crtc_state *crtc_state)
intel_de_rmw(display, TRANS_DDI_FUNC_CTL2(display, cpu_transcoder), 0, CMTG_SECONDARY_MODE);
+ crtc->cmtg.enabled = true;
drm_dbg_kms(display->drm, "CMTG: %s enabled\n", transcoder_name(cpu_transcoder));
}
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e8470b7ce13f..30bc209d8fb6 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1061,6 +1061,11 @@ static void intel_post_plane_update(struct intel_atomic_state *state,
intel_alpm_lobf_enable(new_crtc_state);
intel_psr_post_plane_update(state, crtc);
+
+ if (!crtc->cmtg.enabled && intel_vrr_is_fixed_rr(new_crtc_state)) {
+ intel_cmtg_enable_sync(new_crtc_state);
+ intel_cmtg_enable_ddi(new_crtc_state);
+ }
}
static void intel_post_plane_update_after_readout(struct intel_atomic_state *state,
@@ -1771,6 +1776,8 @@ static void hsw_crtc_disable(struct intel_atomic_state *state,
struct intel_crtc *pipe_crtc;
int i;
+ if (crtc->cmtg.enabled)
+ intel_cmtg_disable(old_crtc_state);
/*
* FIXME collapse everything to one hook.
* Need care with mst->ddi interactions.
@@ -6865,6 +6872,9 @@ static void intel_update_crtc(struct intel_atomic_state *state,
if (intel_crtc_needs_fastset(new_crtc_state) &&
old_crtc_state->inherited)
intel_crtc_arm_fifo_underrun(crtc, new_crtc_state);
+
+ if (crtc->cmtg.enabled && intel_crtc_vrr_enabling(state, crtc))
+ intel_cmtg_disable(new_crtc_state);
}
static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index ca2581fb7bbd..f5c9ceb87e58 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1571,6 +1571,10 @@ struct intel_crtc {
#endif
bool vblank_psr_notify;
+
+ struct {
+ bool enabled;
+ } cmtg;
};
struct intel_plane_error {
--
2.29.0
next prev parent reply other threads:[~2026-04-12 11:08 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-12 10:36 [PATCH v4 00/13] CMTG enablement Animesh Manna
2026-04-12 10:37 ` [PATCH v4 01/13] drm/i915/cmtg: Add intel_cmtg_is_allowed() for CMTG Animesh Manna
2026-04-14 13:31 ` Jani Nikula
2026-04-12 10:37 ` [PATCH v4 02/13] drm/i915/cmtg: Set CMTG clock select Animesh Manna
2026-04-12 10:37 ` [PATCH v4 03/13] drm/i915/cmtg: Set timings for CMTG Animesh Manna
2026-04-14 13:33 ` Jani Nikula
2026-04-17 6:03 ` Manna, Animesh
2026-04-17 10:26 ` Ville Syrjälä
2026-04-23 4:37 ` Manna, Animesh
2026-04-23 4:55 ` Manna, Animesh
2026-04-23 10:51 ` Ville Syrjälä
2026-04-23 11:07 ` Manna, Animesh
2026-04-29 12:01 ` Ville Syrjälä
2026-04-30 7:16 ` Manna, Animesh
2026-04-12 10:37 ` [PATCH v4 04/13] drm/i915/cmtg: Program VRR registers of CMTG Animesh Manna
2026-04-12 10:37 ` [PATCH v4 05/13] drm/i915/cmtg: Set transcoder mn for CMTG Animesh Manna
2026-04-12 10:37 ` [PATCH v4 06/13] drm/i915/cmtg: Add hook to enable CMTG with sync to port Animesh Manna
2026-04-12 10:37 ` [PATCH v4 07/13] drm/i915/cmtg: Add a hook to make eDP transcoder secondary Animesh Manna
2026-04-12 10:37 ` [PATCH v4 08/13] drm/i915/cmtg: Split CMTG support check from intel_cmtg_is_allowed() Animesh Manna
2026-04-12 10:37 ` [PATCH v4 09/13] drm/i915/cmtg: Modify existing hook to disable CMTG Animesh Manna
2026-04-12 10:37 ` Animesh Manna [this message]
2026-04-12 10:37 ` [PATCH v4 11/13] drm/i915/cmtg: Add CMTG interrupt handling Animesh Manna
2026-04-12 10:37 ` [PATCH v4 12/13] drm/i915/cmtg: Disable CMTG if dc3co is not allowed Animesh Manna
2026-04-12 10:37 ` [PATCH v4 13/13] drm/i915/cmtg: Set target_dc_state flag for lobf/psr2/pr-alpm Animesh Manna
2026-04-13 12:19 ` Dibin Moolakadan Subrahmanian
2026-04-12 11:16 ` ✓ CI.KUnit: success for CMTG enablement (rev5) Patchwork
2026-04-12 12:05 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-12 13:01 ` ✗ Xe.CI.FULL: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260412103712.4021213-11-animesh.manna@intel.com \
--to=animesh.manna@intel.com \
--cc=dibin.moolakadan.subrahmanian@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
--cc=jani.nikula@intel.com \
--cc=uma.shankar@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).