From: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: animesh.manna@intel.com, uma.shankar@intel.com,
suresh.kumar.kurmi@intel.com
Subject: [PATCH v2 04/13] drm/i915/display: Add DC3CO DC_STATE enable/disable support
Date: Wed, 22 Apr 2026 21:56:12 +0530 [thread overview]
Message-ID: <20260422162622.1869831-5-dibin.moolakadan.subrahmanian@intel.com> (raw)
In-Reply-To: <20260422162622.1869831-1-dibin.moolakadan.subrahmanian@intel.com>
Add DC3CO handling to the dc_off power well sequencing and disable the
DMC wakelock when exiting DC3CO.
BSpec: 75253
Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
.../drm/i915/display/intel_display_power_well.c | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
index b5e6437c3d8d..5e002d459e95 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -866,6 +866,13 @@ void gen9_set_dc_state(struct intel_display *display, u32 state)
power_domains->dc_state = val & mask;
}
+static void xe3lpd_enable_dc3co(struct intel_display *display)
+{
+ drm_dbg_kms(display->drm, "Enabling DC3CO\n");
+ intel_dmc_wl_enable(display, DC_STATE_EN_UPTO_DC3CO);
+ gen9_set_dc_state(display, DC_STATE_EN_UPTO_DC3CO);
+}
+
static void assert_can_enable_dc5(struct intel_display *display)
{
enum i915_power_well_id high_pg;
@@ -1054,9 +1061,13 @@ void gen9_disable_dc_states(struct intel_display *display)
}
if (old_state == DC_STATE_EN_UPTO_DC5 ||
- old_state == DC_STATE_EN_UPTO_DC6)
+ old_state == DC_STATE_EN_UPTO_DC6 ||
+ old_state == DC_STATE_EN_UPTO_DC3CO)
intel_dmc_wl_disable(display);
+ if (old_state == DC_STATE_EN_UPTO_DC3CO)
+ return;
+
intel_cdclk_get_cdclk(display, &cdclk_config);
/* Can't read out voltage_level so can't use intel_cdclk_changed() */
drm_WARN_ON(display->drm,
@@ -1092,6 +1103,9 @@ static void gen9_dc_off_power_well_disable(struct intel_display *display,
return;
switch (power_domains->target_dc_state) {
+ case DC_STATE_EN_UPTO_DC3CO:
+ xe3lpd_enable_dc3co(display);
+ break;
case DC_STATE_EN_UPTO_DC6:
skl_enable_dc6(display);
break;
--
2.43.0
next prev parent reply other threads:[~2026-04-22 16:26 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-22 16:26 [PATCH v2 00/13] drm/i915/display: Add DC3CO support Dibin Moolakadan Subrahmanian
2026-04-22 16:26 ` [PATCH v2 01/13] drm/i915/display: Remove TGL " Dibin Moolakadan Subrahmanian
2026-04-22 16:26 ` [PATCH v2 02/13] drm/i915/display: Switch DC3Co enable from standalone bit to DC level encoding Dibin Moolakadan Subrahmanian
2026-04-22 16:26 ` [PATCH v2 03/13] drm/i915/display: Use FIELD_PREP() for DC state enable bits Dibin Moolakadan Subrahmanian
2026-04-22 16:26 ` Dibin Moolakadan Subrahmanian [this message]
2026-04-22 16:26 ` [PATCH v2 05/13] drm/i915/display: Add DC3CO support check and validate target DC state Dibin Moolakadan Subrahmanian
2026-04-29 5:13 ` Manna, Animesh
2026-04-29 7:31 ` Dibin Moolakadan Subrahmanian
2026-04-22 16:26 ` [PATCH v2 06/13] drm/i915/display: Add HAS_DC3CO() macro Dibin Moolakadan Subrahmanian
2026-04-27 3:00 ` Shankar, Uma
2026-04-22 16:26 ` [PATCH v2 07/13] drm/i915/display: Add DC3CO eligibility computation Dibin Moolakadan Subrahmanian
2026-04-27 3:10 ` Shankar, Uma
2026-04-27 6:06 ` Dibin Moolakadan Subrahmanian
2026-04-29 5:42 ` Manna, Animesh
2026-04-29 7:05 ` Dibin Moolakadan Subrahmanian
2026-04-22 16:26 ` [PATCH v2 08/13] drm/i915/display: Store DC3CO eligibility in PSR state Dibin Moolakadan Subrahmanian
2026-04-27 3:11 ` Shankar, Uma
2026-04-22 16:26 ` [PATCH v2 09/13] drm/i915/display: PSR2: Set idle_frames to 0 for DC3CO Dibin Moolakadan Subrahmanian
2026-04-27 3:13 ` Shankar, Uma
2026-04-22 16:26 ` [PATCH v2 10/13] drm/i915/display: Enable DC3CO idle protocol in ALPM Dibin Moolakadan Subrahmanian
2026-04-27 3:14 ` Shankar, Uma
2026-04-22 16:26 ` [PATCH v2 11/13] drm/i915/display: PSR Add delayed work to exit DC3CO Dibin Moolakadan Subrahmanian
2026-04-27 3:15 ` Shankar, Uma
2026-04-22 16:26 ` [PATCH v2 12/13] drm/i915/display: Add helper to enable DC counter Dibin Moolakadan Subrahmanian
2026-04-22 16:26 ` [PATCH v2 13/13] drm/i915/display: Add DC3CO count and residency in dmc debugfs Dibin Moolakadan Subrahmanian
2026-04-22 21:27 ` ✓ CI.KUnit: success for drm/i915/display: Add DC3CO support (rev2) Patchwork
2026-04-22 22:50 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-23 6:15 ` ✗ Xe.CI.FULL: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260422162622.1869831-5-dibin.moolakadan.subrahmanian@intel.com \
--to=dibin.moolakadan.subrahmanian@intel.com \
--cc=animesh.manna@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
--cc=suresh.kumar.kurmi@intel.com \
--cc=uma.shankar@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).