From: Vinod Govindapillai <vinod.govindapillai@intel.com>
To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: vinod.govindapillai@intel.com, ville.syrjala@linux.intel.com
Subject: [PATCH v2 05/11] drm/i915/bw: sort the qgv points based on the dclk
Date: Mon, 11 May 2026 15:28:10 +0300 [thread overview]
Message-ID: <20260511122816.1235478-6-vinod.govindapillai@intel.com> (raw)
In-Reply-To: <20260511122816.1235478-1-vinod.govindapillai@intel.com>
QGV points reported from BIOS are not in any sorted order. But the
this order cannot be modified as the pcode was expecting the qgv
point index on pre display 14 versions. But after the introduction
of pmdemand, pcode is expecting the peak bw of the selected qgv
point. But because this point is not sorted, we would have to go
through all of these points to find any exact match. So sort the
qgv point based on the dclk and this sorted order will benefit
in all calculations which need to find appropriate qgv point.
Assisted-by: Copilot:claude-sonnet-4.6
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
---
drivers/gpu/drm/i915/display/intel_bw.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index e9cfa3edd09e..7b8801a88cb2 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -7,6 +7,8 @@
#include <drm/drm_print.h>
#include <drm/intel/intel_pcode_regs.h>
+#include <linux/sort.h>
+
#include "intel_bw.h"
#include "intel_crtc.h"
#include "intel_de.h"
@@ -317,6 +319,20 @@ static int icl_init_qgv_info(struct intel_display *display,
return 0;
}
+static int qgv_point_cmp(const void *a, const void *b)
+{
+ const struct intel_qgv_point *pa = a;
+ const struct intel_qgv_point *pb = b;
+
+ return pa->dclk - pb->dclk;
+}
+
+static void intel_sort_qgv_points(struct intel_qgv_info *qi)
+{
+ sort(qi->points, qi->num_points, sizeof(*qi->points),
+ qgv_point_cmp, NULL);
+}
+
static int icl_get_qgv_points(struct intel_display *display,
const struct dram_info *dram_info,
struct intel_qgv_info *qi,
@@ -346,6 +362,9 @@ static int icl_get_qgv_points(struct intel_display *display,
sp->t_rcd, sp->t_rc);
}
+ if (HAS_PMDEMAND(display))
+ intel_sort_qgv_points(qi);
+
if (qi->num_psf_points > 0) {
ret = adls_pcode_read_psf_gv_point_info(display, qi->psf_points);
if (ret) {
--
2.43.0
next prev parent reply other threads:[~2026-05-11 12:28 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-11 12:28 [PATCH v2 00/11] drm/i915/display: reduce the pm demand peak bw based on display data rate Vinod Govindapillai
2026-05-11 12:28 ` [PATCH v2 01/11] drm/i915/wm: clear the plane ddb_y entries on plane disable Vinod Govindapillai
2026-05-11 12:28 ` [PATCH v2 02/11] drm/i915/pm_demand: introduce HAS_PMDEMAND macro Vinod Govindapillai
2026-05-11 12:28 ` [PATCH v2 03/11] drm/i915/display: sagv pre/post plane calls to check pmdemand support Vinod Govindapillai
2026-05-11 12:28 ` [PATCH v2 04/11] drm/i915/bw: Extract icl_init_qgv_info() Vinod Govindapillai
2026-05-11 12:28 ` Vinod Govindapillai [this message]
2026-05-11 12:28 ` [PATCH v2 06/11] drm/i915/bw: update the routine to get max dclk from qgv points Vinod Govindapillai
2026-05-11 12:28 ` [PATCH v2 07/11] drm/i915/bw: update the routine to find the peakbw in MTL Vinod Govindapillai
2026-05-11 12:28 ` [PATCH v2 08/11] drm/i915/bw: update the tile-y dependency based on the display version Vinod Govindapillai
2026-05-11 12:28 ` [PATCH v2 09/11] drm/i915/bw: consolidate the debug info of bw/dgv/psf data Vinod Govindapillai
2026-05-12 11:49 ` Jani Nikula
2026-05-11 12:28 ` [PATCH v2 10/11] drm/i915/bw: extract update_sagv_status() Vinod Govindapillai
2026-05-11 12:28 ` [PATCH v2 11/11] drm/i915/bw: insert a sw bw info entry to cater low data rate usecases Vinod Govindapillai
2026-05-12 11:51 ` Jani Nikula
2026-05-12 12:02 ` Govindapillai, Vinod
2026-05-11 16:28 ` ✓ CI.KUnit: success for drm/i915/display: reduce the pm demand peak bw based on display data rate Patchwork
2026-05-11 17:33 ` ✓ Xe.CI.BAT: " Patchwork
2026-05-11 19:30 ` ✗ Xe.CI.FULL: failure " Patchwork
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