From: "Shankar, Uma" <uma.shankar@intel.com>
To: "Borah, Chaitanya Kumar" <chaitanya.kumar.borah@intel.com>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>
Cc: "harry.wentland@amd.com" <harry.wentland@amd.com>,
"louis.chauvet@bootlin.com" <louis.chauvet@bootlin.com>,
"mwen@igalia.com" <mwen@igalia.com>,
"contact@emersion.fr" <contact@emersion.fr>,
"alex.hung@amd.com" <alex.hung@amd.com>,
"daniels@collabora.com" <daniels@collabora.com>,
"Lankhorst, Maarten" <maarten.lankhorst@intel.com>,
"pekka.paalanen@collabora.com" <pekka.paalanen@collabora.com>,
"Samala, Pranay" <pranay.samala@intel.com>,
"Sharma, Swati2" <swati2.sharma@intel.com>
Subject: RE: [PATCH v2 05/13] drm/i915/color: Fix HDR pre-CSC LUT programming loop
Date: Mon, 18 May 2026 09:09:41 +0000 [thread overview]
Message-ID: <CY5PR11MB634413E35E771881DD890843F4032@CY5PR11MB6344.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20260408051514.608781-6-chaitanya.kumar.borah@intel.com>
> -----Original Message-----
> From: Borah, Chaitanya Kumar <chaitanya.kumar.borah@intel.com>
> Sent: Wednesday, April 8, 2026 10:45 AM
> To: dri-devel@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; intel-
> xe@lists.freedesktop.org
> Cc: harry.wentland@amd.com; louis.chauvet@bootlin.com; mwen@igalia.com;
> contact@emersion.fr; alex.hung@amd.com; daniels@collabora.com; Shankar,
> Uma <uma.shankar@intel.com>; Lankhorst, Maarten
> <maarten.lankhorst@intel.com>; pekka.paalanen@collabora.com; Samala,
> Pranay <pranay.samala@intel.com>; Sharma, Swati2
> <swati2.sharma@intel.com>; Borah, Chaitanya Kumar
> <chaitanya.kumar.borah@intel.com>
> Subject: [PATCH v2 05/13] drm/i915/color: Fix HDR pre-CSC LUT programming
> loop
>
> From: Pranay Samala <pranay.samala@intel.com>
>
> The integer lut programming loop never executes completely due to incorrect
> condition (i++ > 130).
>
> Fix to properly program 129th+ entries for values > 1.0.
Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> Cc: <stable@vger.kernel.org> #v6.19
> Fixes: 82caa1c8813f ("drm/i915/color: Program Pre-CSC registers")
> Signed-off-by: Pranay Samala <pranay.samala@intel.com>
> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_color.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c
> b/drivers/gpu/drm/i915/display/intel_color.c
> index e7950655434b..6d1cffc6d2be 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -3976,7 +3976,7 @@ xelpd_program_plane_pre_csc_lut(struct intel_dsb
> *dsb,
> intel_de_write_dsb(display, dsb,
>
> PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),
> (1 << 24));
> - } while (i++ > 130);
> + } while (i++ < 130);
> } else {
> for (i = 0; i < lut_size; i++) {
> u32 v = (i * ((1 << 24) - 1)) / (lut_size - 1);
> --
> 2.25.1
next prev parent reply other threads:[~2026-05-18 9:09 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-08 5:15 [PATCH v2 00/13] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
2026-04-08 5:15 ` [PATCH v2 01/13] drm/colorop: Add DRM_COLOROP_FIXED_MATRIX Chaitanya Kumar Borah
2026-04-21 13:10 ` Melissa Wen
2026-04-21 14:57 ` Borah, Chaitanya Kumar
2026-04-22 21:30 ` Melissa Wen
2026-04-23 9:38 ` Borah, Chaitanya Kumar
2026-04-24 14:49 ` Melissa Wen
2026-04-27 8:07 ` Borah, Chaitanya Kumar
2026-04-30 17:28 ` Harry Wentland
2026-04-08 5:15 ` [PATCH v2 02/13] drm/i915/color: Add CSC on SDR plane color pipeline Chaitanya Kumar Borah
2026-04-08 5:15 ` [PATCH v2 03/13] drm/i915/color: Program fixed-function CSC on SDR planes Chaitanya Kumar Borah
2026-04-08 5:15 ` [PATCH v2 04/13] drm/i915/color: Add support for 1D LUT in " Chaitanya Kumar Borah
2026-04-08 5:15 ` [PATCH v2 05/13] drm/i915/color: Fix HDR pre-CSC LUT programming loop Chaitanya Kumar Borah
2026-05-18 9:09 ` Shankar, Uma [this message]
2026-04-08 5:15 ` [PATCH v2 06/13] drm/i915/color: Extract HDR pre-CSC LUT programming to helper function Chaitanya Kumar Borah
2026-04-08 5:15 ` [PATCH v2 07/13] drm/i915/color: Program Pre-CSC registers for SDR Chaitanya Kumar Borah
2026-04-08 5:15 ` [PATCH v2 08/13] drm/i915/color: Extract HDR post-CSC LUT programming to helper function Chaitanya Kumar Borah
2026-04-08 5:15 ` [PATCH v2 09/13] drm/i915/color: Program Plane Post CSC registers for SDR planes Chaitanya Kumar Borah
2026-04-08 5:15 ` [PATCH v2 10/13] drm/i915/color: Add color pipeline support " Chaitanya Kumar Borah
2026-04-08 5:15 ` [PATCH v2 11/13] drm/i915/color: Add YCbCr limited-to-full range color block support Chaitanya Kumar Borah
2026-04-08 5:15 ` [PATCH v2 12/13] drm/i915/color: Program plane YUV range correction colorop Chaitanya Kumar Borah
2026-04-08 5:15 ` [PATCH v2 13/13] drm/i915/color: Add YUV range correction to SDR plane pipeline Chaitanya Kumar Borah
2026-04-08 5:51 ` ✗ CI.KUnit: failure for drm/i915/color: Enable SDR plane color pipeline (rev2) Patchwork
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