From: "Shankar, Uma" <uma.shankar@intel.com>
To: Dibin Moolakadan Subrahmanian
<dibin.moolakadan.subrahmanian@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>
Cc: "Manna, Animesh" <animesh.manna@intel.com>,
"Kurmi, Suresh Kumar" <suresh.kumar.kurmi@intel.com>
Subject: RE: [PATCH v2 10/13] drm/i915/display: Enable DC3CO idle protocol in ALPM
Date: Mon, 27 Apr 2026 03:14:27 +0000 [thread overview]
Message-ID: <DM4PR11MB6360274D3E87092360E8BF86F4362@DM4PR11MB6360.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20260422162622.1869831-11-dibin.moolakadan.subrahmanian@intel.com>
> -----Original Message-----
> From: Dibin Moolakadan Subrahmanian
> <dibin.moolakadan.subrahmanian@intel.com>
> Sent: Wednesday, April 22, 2026 9:56 PM
> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>; Shankar, Uma
> <uma.shankar@intel.com>; Kurmi, Suresh Kumar
> <suresh.kumar.kurmi@intel.com>
> Subject: [PATCH v2 10/13] drm/i915/display: Enable DC3CO idle protocol in ALPM
>
> Add PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL bit definition and set it
> when DC3CO is allowed.
Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> Changes in v2:
> - Squash "Define DC3CO idle protocol bit in PR_ALPM_CTL"
> into this patch (Uma Shankar)
> - Use intel_display_power_dc3co_allowed(display)
> instead of intel_dc3co_allowed(state)
>
> BSpec: 75253
> Signed-off-by: Dibin Moolakadan Subrahmanian
> <dibin.moolakadan.subrahmanian@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_alpm.c | 6 ++++++
> drivers/gpu/drm/i915/display/intel_psr_regs.h | 1 +
> 2 files changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> b/drivers/gpu/drm/i915/display/intel_alpm.c
> index a7350ce8e716..6394d1568b54 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -389,6 +389,12 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
> if (crtc_state->disable_as_sdp_when_pr_active)
> pr_alpm_ctl |=
> PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
>
> + if (intel_display_power_dc3co_allowed(display) &&
> + intel_display_power_dc3co_supported(display))
> + pr_alpm_ctl |=
> PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
> + else
> + pr_alpm_ctl &=
> ~PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
> +
> intel_de_write(display, PR_ALPM_CTL(display,
> cpu_transcoder),
> pr_alpm_ctl);
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> index 8afbf5a38335..16a9e3af198d 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> @@ -268,6 +268,7 @@
>
> #define _PR_ALPM_CTL_A 0x60948
> #define PR_ALPM_CTL(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran,
> _PR_ALPM_CTL_A)
> +#define PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL
> BIT(7)
> #define PR_ALPM_CTL_ALLOW_LINK_OFF_BETWEEN_AS_SDP_AND_SU
> BIT(6)
> #define PR_ALPM_CTL_RFB_UPDATE_CONTROL
> BIT(5)
> #define PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE
> BIT(4)
> --
> 2.43.0
next prev parent reply other threads:[~2026-04-27 3:14 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-22 16:26 [PATCH v2 00/13] drm/i915/display: Add DC3CO support Dibin Moolakadan Subrahmanian
2026-04-22 16:26 ` [PATCH v2 01/13] drm/i915/display: Remove TGL " Dibin Moolakadan Subrahmanian
2026-04-22 16:26 ` [PATCH v2 02/13] drm/i915/display: Switch DC3Co enable from standalone bit to DC level encoding Dibin Moolakadan Subrahmanian
2026-04-22 16:26 ` [PATCH v2 03/13] drm/i915/display: Use FIELD_PREP() for DC state enable bits Dibin Moolakadan Subrahmanian
2026-04-22 16:26 ` [PATCH v2 04/13] drm/i915/display: Add DC3CO DC_STATE enable/disable support Dibin Moolakadan Subrahmanian
2026-04-22 16:26 ` [PATCH v2 05/13] drm/i915/display: Add DC3CO support check and validate target DC state Dibin Moolakadan Subrahmanian
2026-04-29 5:13 ` Manna, Animesh
2026-04-29 7:31 ` Dibin Moolakadan Subrahmanian
2026-04-22 16:26 ` [PATCH v2 06/13] drm/i915/display: Add HAS_DC3CO() macro Dibin Moolakadan Subrahmanian
2026-04-27 3:00 ` Shankar, Uma
2026-04-22 16:26 ` [PATCH v2 07/13] drm/i915/display: Add DC3CO eligibility computation Dibin Moolakadan Subrahmanian
2026-04-27 3:10 ` Shankar, Uma
2026-04-27 6:06 ` Dibin Moolakadan Subrahmanian
2026-04-29 5:42 ` Manna, Animesh
2026-04-29 7:05 ` Dibin Moolakadan Subrahmanian
2026-04-22 16:26 ` [PATCH v2 08/13] drm/i915/display: Store DC3CO eligibility in PSR state Dibin Moolakadan Subrahmanian
2026-04-27 3:11 ` Shankar, Uma
2026-04-22 16:26 ` [PATCH v2 09/13] drm/i915/display: PSR2: Set idle_frames to 0 for DC3CO Dibin Moolakadan Subrahmanian
2026-04-27 3:13 ` Shankar, Uma
2026-04-22 16:26 ` [PATCH v2 10/13] drm/i915/display: Enable DC3CO idle protocol in ALPM Dibin Moolakadan Subrahmanian
2026-04-27 3:14 ` Shankar, Uma [this message]
2026-04-22 16:26 ` [PATCH v2 11/13] drm/i915/display: PSR Add delayed work to exit DC3CO Dibin Moolakadan Subrahmanian
2026-04-27 3:15 ` Shankar, Uma
2026-04-22 16:26 ` [PATCH v2 12/13] drm/i915/display: Add helper to enable DC counter Dibin Moolakadan Subrahmanian
2026-04-22 16:26 ` [PATCH v2 13/13] drm/i915/display: Add DC3CO count and residency in dmc debugfs Dibin Moolakadan Subrahmanian
2026-04-22 21:27 ` ✓ CI.KUnit: success for drm/i915/display: Add DC3CO support (rev2) Patchwork
2026-04-22 22:50 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-23 6:15 ` ✗ Xe.CI.FULL: failure " Patchwork
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