From: "Shankar, Uma" <uma.shankar@intel.com>
To: Dibin Moolakadan Subrahmanian
<dibin.moolakadan.subrahmanian@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>
Cc: "Manna, Animesh" <animesh.manna@intel.com>,
"Kurmi, Suresh Kumar" <suresh.kumar.kurmi@intel.com>
Subject: RE: [PATCH v2 08/13] drm/i915/display: Store DC3CO eligibility in PSR state
Date: Mon, 27 Apr 2026 03:11:52 +0000 [thread overview]
Message-ID: <DM4PR11MB63605EA6AF69301554144DC0F4362@DM4PR11MB6360.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20260422162622.1869831-9-dibin.moolakadan.subrahmanian@intel.com>
> -----Original Message-----
> From: Dibin Moolakadan Subrahmanian
> <dibin.moolakadan.subrahmanian@intel.com>
> Sent: Wednesday, April 22, 2026 9:56 PM
> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>; Shankar, Uma
> <uma.shankar@intel.com>; Kurmi, Suresh Kumar
> <suresh.kumar.kurmi@intel.com>
> Subject: [PATCH v2 08/13] drm/i915/display: Store DC3CO eligibility in PSR state
>
> Store DC3CO eligibility in intel_dp->psr during
> intel_psr_post_plane_update() so PSR configuration can take DC3CO into
> account.
>
> This will be used to control PSR2 parameters such as idle frames.
Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> Changes in v2:
> - Use intel_display_power_dc3co_allowed(display) instead
> of intel_dc3co_allowed(state)
>
> Signed-off-by: Dibin Moolakadan Subrahmanian
> <dibin.moolakadan.subrahmanian@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_types.h | 2 ++
> drivers/gpu/drm/i915/display/intel_psr.c | 4 ++++
> 2 files changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index fc283cc429ec..28ab686b702a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1769,6 +1769,8 @@ struct intel_psr {
> ktime_t last_exit;
> bool sink_not_reliable;
> bool irq_aux_error;
> + /* DC3CO eligibility used to control PSR configuration */
> + bool dc3co_eligible;
> u16 su_w_granularity;
> u16 su_y_granularity;
> bool source_panel_replay_support;
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 34e4a1ad609e..2e0478e3d560 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2263,6 +2263,7 @@ static void intel_psr_disable_locked(struct intel_dp
> *intel_dp)
> intel_dp->psr.psr2_sel_fetch_cff_enabled = false;
> intel_dp->psr.active_non_psr_pipes = 0;
> intel_dp->psr.pkg_c_latency_used = 0;
> + intel_dp->psr.dc3co_eligible = false;
> }
>
> /**
> @@ -3095,6 +3096,9 @@ void intel_psr_post_plane_update(struct
> intel_atomic_state *state,
> */
> intel_dp->psr.busy_frontbuffer_bits = 0;
>
> + intel_dp->psr.dc3co_eligible =
> intel_display_power_dc3co_allowed(display) &&
> + intel_display_power_dc3co_supported(display);
> +
> mutex_unlock(&psr->lock);
> }
> }
> --
> 2.43.0
next prev parent reply other threads:[~2026-04-27 3:11 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-22 16:26 [PATCH v2 00/13] drm/i915/display: Add DC3CO support Dibin Moolakadan Subrahmanian
2026-04-22 16:26 ` [PATCH v2 01/13] drm/i915/display: Remove TGL " Dibin Moolakadan Subrahmanian
2026-04-22 16:26 ` [PATCH v2 02/13] drm/i915/display: Switch DC3Co enable from standalone bit to DC level encoding Dibin Moolakadan Subrahmanian
2026-04-22 16:26 ` [PATCH v2 03/13] drm/i915/display: Use FIELD_PREP() for DC state enable bits Dibin Moolakadan Subrahmanian
2026-04-22 16:26 ` [PATCH v2 04/13] drm/i915/display: Add DC3CO DC_STATE enable/disable support Dibin Moolakadan Subrahmanian
2026-04-22 16:26 ` [PATCH v2 05/13] drm/i915/display: Add DC3CO support check and validate target DC state Dibin Moolakadan Subrahmanian
2026-04-29 5:13 ` Manna, Animesh
2026-04-29 7:31 ` Dibin Moolakadan Subrahmanian
2026-04-22 16:26 ` [PATCH v2 06/13] drm/i915/display: Add HAS_DC3CO() macro Dibin Moolakadan Subrahmanian
2026-04-27 3:00 ` Shankar, Uma
2026-04-22 16:26 ` [PATCH v2 07/13] drm/i915/display: Add DC3CO eligibility computation Dibin Moolakadan Subrahmanian
2026-04-27 3:10 ` Shankar, Uma
2026-04-27 6:06 ` Dibin Moolakadan Subrahmanian
2026-04-29 5:42 ` Manna, Animesh
2026-04-29 7:05 ` Dibin Moolakadan Subrahmanian
2026-04-22 16:26 ` [PATCH v2 08/13] drm/i915/display: Store DC3CO eligibility in PSR state Dibin Moolakadan Subrahmanian
2026-04-27 3:11 ` Shankar, Uma [this message]
2026-04-22 16:26 ` [PATCH v2 09/13] drm/i915/display: PSR2: Set idle_frames to 0 for DC3CO Dibin Moolakadan Subrahmanian
2026-04-27 3:13 ` Shankar, Uma
2026-04-22 16:26 ` [PATCH v2 10/13] drm/i915/display: Enable DC3CO idle protocol in ALPM Dibin Moolakadan Subrahmanian
2026-04-27 3:14 ` Shankar, Uma
2026-04-22 16:26 ` [PATCH v2 11/13] drm/i915/display: PSR Add delayed work to exit DC3CO Dibin Moolakadan Subrahmanian
2026-04-27 3:15 ` Shankar, Uma
2026-04-22 16:26 ` [PATCH v2 12/13] drm/i915/display: Add helper to enable DC counter Dibin Moolakadan Subrahmanian
2026-04-22 16:26 ` [PATCH v2 13/13] drm/i915/display: Add DC3CO count and residency in dmc debugfs Dibin Moolakadan Subrahmanian
2026-04-22 21:27 ` ✓ CI.KUnit: success for drm/i915/display: Add DC3CO support (rev2) Patchwork
2026-04-22 22:50 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-23 6:15 ` ✗ Xe.CI.FULL: failure " Patchwork
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