From: "Srinivas, Vidya" <vidya.srinivas@intel.com>
To: "Borah, Chaitanya Kumar" <chaitanya.kumar.borah@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Cc: "intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>,
"Shankar, Uma" <uma.shankar@intel.com>
Subject: RE: [PATCH] drm/i915/display: Fix color pipeline state copy for joiner secondary planes
Date: Wed, 6 May 2026 09:56:54 +0000 [thread overview]
Message-ID: <PH7PR11MB8252955BE76E3B7A0268B653893F2@PH7PR11MB8252.namprd11.prod.outlook.com> (raw)
In-Reply-To: <7881f8e6-1c7b-4d2d-bfd4-82ecc6f0da81@intel.com>
> -----Original Message-----
> From: Borah, Chaitanya Kumar <chaitanya.kumar.borah@intel.com>
> Sent: 06 May 2026 15:02
> To: Srinivas, Vidya <vidya.srinivas@intel.com>; intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org; Shankar, Uma <uma.shankar@intel.com>
> Subject: Re: [PATCH] drm/i915/display: Fix color pipeline state copy for joiner
> secondary planes
>
> There is already a patch for this. Will appreciate some review.
>
> https://lore.kernel.org/intel-gfx/20260424054129.2148049-2-
> chaitanya.kumar.borah@intel.com/
Thank you so much Chaitanya. Kindly help merge the patch.
Providing my tested-by.
Tested-by: Vidya Srinivas <vidya.srinivas@intel.com>
Regards
Vidya
>
> ==
> Chaitanya
>
> On 5/6/2026 2:46 PM, Vidya Srinivas wrote:
> > intel_plane_color_copy_uapi_to_hw_state() is meant to copy color
> > pipeline state from the source plane (from_plane_state) to the
> > destination plane (plane_state). However, it was incorrectly iterating
> > the color_pipeline from the destination plane_state instead of the
> > source from_plane_state.
> >
> > In non-joiner configurations this doesn't matter since both point to
> > the same plane. But in bigjoiner mode, the secondary pipe's plane has
> > no color_pipeline set from userspace (only the primary pipe's plane is
> > visible to userspace). This causes the while loop to never execute,
> > leaving the secondary plane's hw.ctm, hw.degamma_lut, and hw.gamma_lut
> > as NULL.
> >
> > As a result, xelpd_load_plane_csc_matrix() skips programming the plane
> > CSC on the secondary joiner pipe (early return due to NULL blob),
> > causing a visible color split between the left and right halves of the
> > display when HDR color pipelines are active.
> >
> > Fix this by reading color_pipeline from from_plane_state (the source/
> > primary plane) so that the HDR CTM and LUT blobs are properly copied
> > to the secondary joiner plane's hw state.
> >
> > Fixes: a78f1b6baf4d ("drm/i915/color: Add framework to program CSC")
> > Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_plane.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_plane.c
> > b/drivers/gpu/drm/i915/display/intel_plane.c
> > index c181a7d063ec..e403fe4a8a20 100644
> > --- a/drivers/gpu/drm/i915/display/intel_plane.c
> > +++ b/drivers/gpu/drm/i915/display/intel_plane.c
> > @@ -396,7 +396,7 @@ intel_plane_color_copy_uapi_to_hw_state(struct
> intel_plane_state *plane_state,
> > bool changed = false;
> > int i = 0;
> >
> > - iter_colorop = plane_state->uapi.color_pipeline;
> > + iter_colorop = from_plane_state->uapi.color_pipeline;
> >
> > while (iter_colorop) {
> > for_each_new_colorop_in_state(state, colorop,
> new_colorop_state,
> > i) {
prev parent reply other threads:[~2026-05-06 9:57 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-06 9:16 [PATCH] drm/i915/display: Fix color pipeline state copy for joiner secondary planes Vidya Srinivas
2026-05-06 9:29 ` ✓ CI.KUnit: success for " Patchwork
2026-05-06 9:31 ` [PATCH] " Borah, Chaitanya Kumar
2026-05-06 9:56 ` Srinivas, Vidya [this message]
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