From: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
To: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Cc: <intel-xe@lists.freedesktop.org>, <matthew.brost@intel.com>
Subject: Re: [PATCH 2/5] drm/xe/multi_queue: Add helpers to access CS QUEUE TIMESTAMP from lrc
Date: Wed, 29 Apr 2026 12:56:47 -0700 [thread overview]
Message-ID: <afJif0_d-sySg0k3@nvishwa1-desk> (raw)
In-Reply-To: <ae/o2uQTU31CmXXR@soc-5CG1426VCC.clients.intel.com>
On Mon, Apr 27, 2026 at 03:53:14PM -0700, Umesh Nerlige Ramappa wrote:
>On Mon, Apr 13, 2026 at 02:44:18PM -0700, Niranjana Vishwanathapura wrote:
>>On Thu, Apr 09, 2026 at 01:37:17PM -0700, Umesh Nerlige Ramappa wrote:
>>>In secondary queue LRCs, the QUEUE TIMESTAMP register is saved and
>>>restored allowing us to view the individual queue run times. Add helpers
>>>to read this value from the LRC.
>>>
>>>Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>>>---
>>>drivers/gpu/drm/xe/regs/xe_lrc_layout.h | 3 ++
>>>drivers/gpu/drm/xe/xe_lrc.c | 44 +++++++++++++++++++++++++
>>>drivers/gpu/drm/xe/xe_lrc.h | 1 +
>>>drivers/gpu/drm/xe/xe_lrc_types.h | 3 ++
>>>4 files changed, 51 insertions(+)
>>>
>>>diff --git a/drivers/gpu/drm/xe/regs/xe_lrc_layout.h b/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
>>>index b5eff383902c..4ab86fc369fd 100644
>>>--- a/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
>>>+++ b/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
>>>@@ -34,6 +34,9 @@
>>>#define CTX_CS_INT_VEC_REG 0x5a
>>>#define CTX_CS_INT_VEC_DATA (CTX_CS_INT_VEC_REG + 1)
>>>
>>>+#define CTX_QUEUE_TIMESTAMP (0xd0 + 1)
>>>+#define CTX_QUEUE_TIMESTAMP_UDW (0xd2 + 1)
>>>+
>>
>>Should we also add these to XE2_CTX_COMMON() in xe_lrc.c?
>
>fwiu, this is being used to reset/update the LRC on events like GPU
>hang which seems to be unused in Xe KMD.
>
>Our use of the TIMESTAMP registers is limited to query the LRC run
>ticks, so I am not seeing any reason to include it here, but please
>share if you see a use case.
>
>>
>>>#define INDIRECT_CTX_RING_HEAD (0x02 + 1)
>>>#define INDIRECT_CTX_RING_TAIL (0x04 + 1)
>>>#define INDIRECT_CTX_RING_START (0x06 + 1)
>>>diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
>>>index 9d12a0d2f0b5..be1030c74e21 100644
>>>--- a/drivers/gpu/drm/xe/xe_lrc.c
>>>+++ b/drivers/gpu/drm/xe/xe_lrc.c
>>>@@ -788,6 +788,16 @@ static u32 __xe_lrc_ctx_timestamp_udw_offset(struct xe_lrc *lrc)
>>> return __xe_lrc_regs_offset(lrc) + CTX_TIMESTAMP_UDW * sizeof(u32);
>>>}
>>>
>>>+static u32 __xe_lrc_queue_timestamp_offset(struct xe_lrc *lrc)
>>>+{
>>>+ return __xe_lrc_regs_offset(lrc) + CTX_QUEUE_TIMESTAMP * sizeof(u32);
>>>+}
>>>+
>>>+static u32 __xe_lrc_queue_timestamp_udw_offset(struct xe_lrc *lrc)
>>>+{
>>>+ return __xe_lrc_regs_offset(lrc) + CTX_QUEUE_TIMESTAMP_UDW * sizeof(u32);
>>>+}
>>>+
>>>static inline u32 __xe_lrc_indirect_ring_offset(struct xe_lrc *lrc)
>>>{
>>> u32 offset = xe_bo_size(lrc->bo) - LRC_WA_BB_SIZE -
>>>@@ -837,6 +847,8 @@ DECL_MAP_ADDR_HELPERS(ctx_timestamp_udw, lrc->bo)
>>>DECL_MAP_ADDR_HELPERS(parallel, lrc->bo)
>>>DECL_MAP_ADDR_HELPERS(indirect_ring, lrc->bo)
>>>DECL_MAP_ADDR_HELPERS(engine_id, lrc->bo)
>>>+DECL_MAP_ADDR_HELPERS(queue_timestamp, lrc->bo)
>>>+DECL_MAP_ADDR_HELPERS(queue_timestamp_udw, lrc->bo)
>>>
>>>#undef DECL_MAP_ADDR_HELPERS
>>>
>>>@@ -885,6 +897,30 @@ static u64 xe_lrc_ctx_timestamp(struct xe_lrc *lrc)
>>> return (u64)udw << 32 | ldw;
>>>}
>>>
>>>+/**
>>>+ * xe_lrc_queue_timestamp() - Read queue timestamp value
>>>+ * @lrc: Pointer to the lrc.
>>>+ *
>>>+ * Returns: queue timestamp value
>>>+ */
>>>+static u64 xe_lrc_queue_timestamp(struct xe_lrc *lrc)
>>>+{
>>>+ struct xe_device *xe = lrc_to_xe(lrc);
>>>+ struct iosys_map map;
>>>+ u32 ldw, udw = 0;
>>>+
>>>+ if (!xe_lrc_is_multi_queue(lrc))
>>>+ return 0;
>>>+
>>>+ map = __xe_lrc_queue_timestamp_map(lrc);
>>>+ ldw = xe_map_read32(xe, &map);
>>>+
>>>+ map = __xe_lrc_queue_timestamp_udw_map(lrc);
>>>+ udw = xe_map_read32(xe, &map);
>>>+
>>>+ return (u64)udw << 32 | ldw;
>>>+}
>>
>>Should we make this function similar to xe_lrc_ctx_timestamp()
>>with the xe->info.has_64bit_timestamp check?
>
>Unlike CTX_TIMESTAMP, QUEUE_TIMESTAMP is already 64 bits on platforms
>that support it. The use of QUEUE_TIMESTAMP is gated by the
>multi-queue check, so nothing extra required, IMO.
>
Yah, makes sense. But given there is a mechanism to determine it
properly, may be we can add an assert here that has_64bit_timestamp
is set when this funtion is called? That way it is less confusing
to read also.
I am fine either way.
Niranjana
>>
>>Other than these, patch LGTM.
>>Reviewed-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
>
>Thanks,
>Umesh
>>
>>>+
>>>/**
>>>* xe_lrc_ctx_job_timestamp_ggtt_addr() - Get ctx job timestamp GGTT address
>>>* @lrc: Pointer to the lrc.
>>>@@ -1550,6 +1586,12 @@ static int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct
>>> if (lrc_to_xe(lrc)->info.has_64bit_timestamp)
>>> xe_lrc_write_ctx_reg(lrc, CTX_TIMESTAMP_UDW, 0);
>>>
>>>+ if (xe_lrc_is_multi_queue(lrc)) {
>>>+ lrc->queue_timestamp = 0;
>>>+ xe_lrc_write_ctx_reg(lrc, CTX_QUEUE_TIMESTAMP, 0);
>>>+ xe_lrc_write_ctx_reg(lrc, CTX_QUEUE_TIMESTAMP_UDW, 0);
>>>+ }
>>>+
>>> if (xe->info.has_asid && vm)
>>> xe_lrc_write_ctx_reg(lrc, CTX_ASID, vm->usm.asid);
>>>
>>>@@ -2476,6 +2518,7 @@ struct xe_lrc_snapshot *xe_lrc_snapshot_capture(struct xe_lrc *lrc)
>>> snapshot->replay_size = lrc->replay_size;
>>> snapshot->lrc_snapshot = NULL;
>>> snapshot->ctx_timestamp = lower_32_bits(xe_lrc_ctx_timestamp(lrc));
>>>+ snapshot->queue_timestamp = lower_32_bits(xe_lrc_queue_timestamp(lrc));
>>> snapshot->ctx_job_timestamp = xe_lrc_ctx_job_timestamp(lrc);
>>> return snapshot;
>>>}
>>>@@ -2529,6 +2572,7 @@ void xe_lrc_snapshot_print(struct xe_lrc_snapshot *snapshot, struct drm_printer
>>> drm_printf(p, "\tStart seqno: (memory) %d\n", snapshot->start_seqno);
>>> drm_printf(p, "\tSeqno: (memory) %d\n", snapshot->seqno);
>>> drm_printf(p, "\tTimestamp: 0x%08x\n", snapshot->ctx_timestamp);
>>>+ drm_printf(p, "\tQueue Timestamp: 0x%08x\n", snapshot->queue_timestamp);
>>> drm_printf(p, "\tJob Timestamp: 0x%08x\n", snapshot->ctx_job_timestamp);
>>>
>>> if (!snapshot->lrc_snapshot)
>>>diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
>>>index b544c8169967..178d9519b196 100644
>>>--- a/drivers/gpu/drm/xe/xe_lrc.h
>>>+++ b/drivers/gpu/drm/xe/xe_lrc.h
>>>@@ -38,6 +38,7 @@ struct xe_lrc_snapshot {
>>> u32 start_seqno;
>>> u32 seqno;
>>> u32 ctx_timestamp;
>>>+ u32 queue_timestamp;
>>> u32 ctx_job_timestamp;
>>>};
>>>
>>>diff --git a/drivers/gpu/drm/xe/xe_lrc_types.h b/drivers/gpu/drm/xe/xe_lrc_types.h
>>>index 93972536214a..4bca394ff024 100644
>>>--- a/drivers/gpu/drm/xe/xe_lrc_types.h
>>>+++ b/drivers/gpu/drm/xe/xe_lrc_types.h
>>>@@ -64,6 +64,9 @@ struct xe_lrc {
>>> /** @ctx_timestamp: readout value of CTX_TIMESTAMP on last update */
>>> u64 ctx_timestamp;
>>>
>>>+ /** @queue_timestamp: value of QUEUE_TIMESTAMP on last update */
>>>+ u64 queue_timestamp;
>>>+
>>> /** @multi_queue: Multi queue LRC related information */
>>> struct {
>>> /** @multi_queue.primary: Primary queue corresponding to this LRC */
>>>--
>>>2.43.0
>>>
next prev parent reply other threads:[~2026-04-29 19:56 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-09 20:37 [PATCH 0/5] Support run ticks for multi-queue use case Umesh Nerlige Ramappa
2026-04-09 20:37 ` [PATCH 1/5] drm/xe/multi_queue: Store primary queue and position info in LRC Umesh Nerlige Ramappa
2026-04-09 20:59 ` Matthew Brost
2026-04-09 23:30 ` Umesh Nerlige Ramappa
2026-04-13 21:33 ` Niranjana Vishwanathapura
2026-04-09 20:37 ` [PATCH 2/5] drm/xe/multi_queue: Add helpers to access CS QUEUE TIMESTAMP from lrc Umesh Nerlige Ramappa
2026-04-09 21:10 ` Matthew Brost
2026-04-09 21:16 ` Matthew Brost
2026-04-13 21:44 ` Niranjana Vishwanathapura
2026-04-27 22:53 ` Umesh Nerlige Ramappa
2026-04-29 19:56 ` Niranjana Vishwanathapura [this message]
2026-04-09 20:37 ` [PATCH 3/5] drm/xe/multi_queue: Capture queue run times for active queues Umesh Nerlige Ramappa
2026-04-09 22:00 ` Matthew Brost
2026-04-09 22:23 ` Summers, Stuart
2026-04-09 23:54 ` Umesh Nerlige Ramappa
2026-04-09 23:03 ` Summers, Stuart
2026-04-13 22:09 ` Niranjana Vishwanathapura
2026-04-13 22:19 ` Umesh Nerlige Ramappa
2026-04-13 22:40 ` Niranjana Vishwanathapura
2026-04-09 20:37 ` [PATCH 4/5] drm/xe/multi_queue: Use QUEUE_TIMESTAMP as job timestamp for multi-queue Umesh Nerlige Ramappa
2026-04-09 21:20 ` Matthew Brost
2026-04-13 19:08 ` Niranjana Vishwanathapura
2026-04-09 20:37 ` [PATCH 5/5] drm/xe/multi_queue: Whitelist QUEUE_TIMESTAMP register Umesh Nerlige Ramappa
2026-04-13 18:17 ` Niranjana Vishwanathapura
2026-04-14 18:56 ` Umesh Nerlige Ramappa
2026-04-09 20:42 ` ✗ CI.checkpatch: warning for Support run ticks for multi-queue use case Patchwork
2026-04-09 20:44 ` ✗ CI.KUnit: failure " Patchwork
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