From: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
To: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Cc: <intel-xe@lists.freedesktop.org>, <matthew.brost@intel.com>,
<stuart.summers@intel.com>
Subject: Re: [PATCH v4 06/11] drm/xe/multi_queue: Add helpers to access CS QUEUE TIMESTAMP from lrc
Date: Wed, 6 May 2026 17:29:07 -0700 [thread overview]
Message-ID: <afvc04GHOy3l0wuj@nvishwa1-desk> (raw)
In-Reply-To: <20260506223500.3769614-19-umesh.nerlige.ramappa@intel.com>
On Wed, May 06, 2026 at 03:35:07PM -0700, Umesh Nerlige Ramappa wrote:
>In secondary queue LRCs, the QUEUE TIMESTAMP register is saved and
>restored allowing us to view the individual queue run times. Add helpers
>to read this value from the LRC.
>
>BSpec: 73988
>
>Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>---
>v2: (Matt)
>- Add BSpec reference
>- Make queue_timestamp snapshot 64 bit
>- Add a snapshot of queue timestamp in ms
>
>v3:
>- Replace xe_lrc_is_multi_queue check in lrc init (Niranajana)
>- Use assert instead of check in xe_lrc_queue_timestamp
>
>v4: (Niranjana)
>- Add comment for clearing QUEUE_TIMESTAMP in LRC
>- Print snapshot based on xe_lrc_is_multi_queue
LGTM.
Reviewed-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
>---
> drivers/gpu/drm/xe/regs/xe_lrc_layout.h | 3 ++
> drivers/gpu/drm/xe/xe_lrc.c | 54 +++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_lrc.h | 2 +
> drivers/gpu/drm/xe/xe_lrc_types.h | 3 ++
> 4 files changed, 62 insertions(+)
>
>diff --git a/drivers/gpu/drm/xe/regs/xe_lrc_layout.h b/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
>index b5eff383902c..4ab86fc369fd 100644
>--- a/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
>+++ b/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
>@@ -34,6 +34,9 @@
> #define CTX_CS_INT_VEC_REG 0x5a
> #define CTX_CS_INT_VEC_DATA (CTX_CS_INT_VEC_REG + 1)
>
>+#define CTX_QUEUE_TIMESTAMP (0xd0 + 1)
>+#define CTX_QUEUE_TIMESTAMP_UDW (0xd2 + 1)
>+
> #define INDIRECT_CTX_RING_HEAD (0x02 + 1)
> #define INDIRECT_CTX_RING_TAIL (0x04 + 1)
> #define INDIRECT_CTX_RING_START (0x06 + 1)
>diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
>index 3def999ce48a..46e9b98a2dfd 100644
>--- a/drivers/gpu/drm/xe/xe_lrc.c
>+++ b/drivers/gpu/drm/xe/xe_lrc.c
>@@ -777,6 +777,16 @@ static u32 __xe_lrc_ctx_timestamp_udw_offset(struct xe_lrc *lrc)
> return __xe_lrc_regs_offset(lrc) + CTX_TIMESTAMP_UDW * sizeof(u32);
> }
>
>+static u32 __xe_lrc_queue_timestamp_offset(struct xe_lrc *lrc)
>+{
>+ return __xe_lrc_regs_offset(lrc) + CTX_QUEUE_TIMESTAMP * sizeof(u32);
>+}
>+
>+static u32 __xe_lrc_queue_timestamp_udw_offset(struct xe_lrc *lrc)
>+{
>+ return __xe_lrc_regs_offset(lrc) + CTX_QUEUE_TIMESTAMP_UDW * sizeof(u32);
>+}
>+
> static inline u32 __xe_lrc_indirect_ring_offset(struct xe_lrc *lrc)
> {
> u32 offset = xe_bo_size(lrc->bo) - LRC_WA_BB_SIZE -
>@@ -826,6 +836,8 @@ DECL_MAP_ADDR_HELPERS(ctx_timestamp_udw, lrc->bo)
> DECL_MAP_ADDR_HELPERS(parallel, lrc->bo)
> DECL_MAP_ADDR_HELPERS(indirect_ring, lrc->bo)
> DECL_MAP_ADDR_HELPERS(engine_id, lrc->bo)
>+DECL_MAP_ADDR_HELPERS(queue_timestamp, lrc->bo)
>+DECL_MAP_ADDR_HELPERS(queue_timestamp_udw, lrc->bo)
>
> #undef DECL_MAP_ADDR_HELPERS
>
>@@ -874,6 +886,29 @@ static u64 xe_lrc_ctx_timestamp(struct xe_lrc *lrc)
> return (u64)udw << 32 | ldw;
> }
>
>+/**
>+ * xe_lrc_queue_timestamp() - Read queue timestamp value
>+ * @lrc: Pointer to the lrc.
>+ *
>+ * Returns: queue timestamp value
>+ */
>+static u64 xe_lrc_queue_timestamp(struct xe_lrc *lrc)
>+{
>+ struct xe_device *xe = lrc_to_xe(lrc);
>+ struct iosys_map map;
>+ u32 ldw, udw = 0;
>+
>+ xe_assert(xe, xe_lrc_is_multi_queue(lrc));
>+
>+ map = __xe_lrc_queue_timestamp_map(lrc);
>+ ldw = xe_map_read32(xe, &map);
>+
>+ map = __xe_lrc_queue_timestamp_udw_map(lrc);
>+ udw = xe_map_read32(xe, &map);
>+
>+ return (u64)udw << 32 | ldw;
>+}
>+
> /**
> * xe_lrc_ctx_job_timestamp_ggtt_addr() - Get ctx job timestamp GGTT address
> * @lrc: Pointer to the lrc.
>@@ -1538,6 +1573,18 @@ static int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct
> if (lrc_to_xe(lrc)->info.has_64bit_timestamp)
> xe_lrc_write_ctx_reg(lrc, CTX_TIMESTAMP_UDW, 0);
>
>+ /*
>+ * Note: It's possible that this LRC may belong to an exec_queue that is
>+ * not part of a multi-queue group. That said, it doesn't hurt to set
>+ * this field anyways since any class that supports multi-queue will
>+ * have these LRC fields defined.
>+ */
>+ if (xe_gt_supports_multi_queue(gt, hwe->class)) {
>+ lrc->queue_timestamp = 0;
>+ xe_lrc_write_ctx_reg(lrc, CTX_QUEUE_TIMESTAMP, 0);
>+ xe_lrc_write_ctx_reg(lrc, CTX_QUEUE_TIMESTAMP_UDW, 0);
>+ }
>+
> if (xe->info.has_asid && vm)
> xe_lrc_write_ctx_reg(lrc, CTX_ASID, vm->usm.asid);
>
>@@ -2470,9 +2517,14 @@ struct xe_lrc_snapshot *xe_lrc_snapshot_capture(struct xe_lrc *lrc)
> snapshot->multi_queue.primary_context_desc =
> xe_lrc_ggtt_addr(lrc->multi_queue.primary_lrc);
> snapshot->multi_queue.pos = lrc->multi_queue.pos;
>+ snapshot->queue_timestamp = xe_lrc_queue_timestamp(lrc);
>+ snapshot->queue_timestamp_ms =
>+ xe_gt_clock_interval_to_ms(lrc->gt, snapshot->queue_timestamp);
> } else {
> snapshot->multi_queue.primary_context_desc = 0;
> snapshot->multi_queue.pos = 0;
>+ snapshot->queue_timestamp = 0;
>+ snapshot->queue_timestamp_ms = 0;
> }
> snapshot->ctx_job_timestamp = xe_lrc_ctx_job_timestamp(lrc);
> return snapshot;
>@@ -2528,6 +2580,8 @@ void xe_lrc_snapshot_print(struct xe_lrc_snapshot *snapshot, struct drm_printer
> drm_printf(p, "\tSeqno: (memory) %d\n", snapshot->seqno);
> drm_printf(p, "\tTimestamp: 0x%016llx\n", snapshot->ctx_timestamp);
> drm_printf(p, "\tTimestamp ms: %llu\n", snapshot->ctx_timestamp_ms);
>+ drm_printf(p, "\tQueue Timestamp: 0x%016llx\n", snapshot->queue_timestamp);
>+ drm_printf(p, "\tQueue Timestamp ms: %llu\n", snapshot->queue_timestamp_ms);
> drm_printf(p, "\tJob Timestamp: 0x%08x\n", snapshot->ctx_job_timestamp);
> if (snapshot->multi_queue.primary_context_desc) {
> drm_printf(p, "\tMulti queue primary Context Desc: 0x%08x\n",
>diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
>index d0deb916e4f1..131bd2b0ceab 100644
>--- a/drivers/gpu/drm/xe/xe_lrc.h
>+++ b/drivers/gpu/drm/xe/xe_lrc.h
>@@ -39,6 +39,8 @@ struct xe_lrc_snapshot {
> u32 seqno;
> u64 ctx_timestamp;
> u64 ctx_timestamp_ms;
>+ u64 queue_timestamp;
>+ u64 queue_timestamp_ms;
> u32 ctx_job_timestamp;
> struct {
> u32 primary_context_desc;
>diff --git a/drivers/gpu/drm/xe/xe_lrc_types.h b/drivers/gpu/drm/xe/xe_lrc_types.h
>index 0a5c13ec2ad7..53ef48feebfc 100644
>--- a/drivers/gpu/drm/xe/xe_lrc_types.h
>+++ b/drivers/gpu/drm/xe/xe_lrc_types.h
>@@ -64,6 +64,9 @@ struct xe_lrc {
> /** @ctx_timestamp: readout value of CTX_TIMESTAMP on last update */
> u64 ctx_timestamp;
>
>+ /** @queue_timestamp: value of QUEUE_TIMESTAMP on last update */
>+ u64 queue_timestamp;
>+
> /** @multi_queue: Multi queue LRC related information */
> struct {
> /** @multi_queue.primary_lrc: Primary lrc of this multi-queue group*/
>--
>2.51.0
>
next prev parent reply other threads:[~2026-05-07 0:29 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-06 22:35 [PATCH v4 00/11] Support run ticks for multi-queue use case Umesh Nerlige Ramappa
2026-05-06 22:35 ` [PATCH v4 01/11] drm/xe/lrc: Use 64 bit ctx timestamp in the LRC snapshot Umesh Nerlige Ramappa
2026-05-06 22:35 ` [PATCH v4 02/11] drm/xe: Add timestamp_ms to " Umesh Nerlige Ramappa
2026-05-06 22:35 ` [PATCH v4 03/11] drm/xe/lrc: Refactor xe_lrc_timestamp to simplify logic Umesh Nerlige Ramappa
2026-05-06 22:35 ` [PATCH v4 04/11] drm/xe/multi_queue: Refactor check for multi queue support for engine class Umesh Nerlige Ramappa
2026-05-07 0:28 ` Niranjana Vishwanathapura
2026-05-06 22:35 ` [PATCH v4 05/11] drm/xe/multi_queue: Store primary LRC and position info in LRC Umesh Nerlige Ramappa
2026-05-07 0:35 ` Niranjana Vishwanathapura
2026-05-07 1:39 ` Niranjana Vishwanathapura
2026-05-06 22:35 ` [PATCH v4 06/11] drm/xe/multi_queue: Add helpers to access CS QUEUE TIMESTAMP from lrc Umesh Nerlige Ramappa
2026-05-07 0:29 ` Niranjana Vishwanathapura [this message]
2026-05-06 22:35 ` [PATCH v4 07/11] drm/xe/lrc: Refactor out engine id to hwe conversion Umesh Nerlige Ramappa
2026-05-06 22:35 ` [PATCH v4 08/11] drm/xe/multi_queue: Capture queue run times for active queues Umesh Nerlige Ramappa
2026-05-06 22:35 ` [PATCH v4 09/11] drm/xe/multi_queue: Add trace event for the multi queue timestamp Umesh Nerlige Ramappa
2026-05-07 0:28 ` Niranjana Vishwanathapura
2026-05-06 22:35 ` [PATCH v4 10/11] drm/xe/multi_queue: Use QUEUE_TIMESTAMP as job timestamp for multi-queue Umesh Nerlige Ramappa
2026-05-06 22:35 ` [PATCH v4 11/11] drm/xe/multi_queue: Whitelist QUEUE_TIMESTAMP register Umesh Nerlige Ramappa
2026-05-06 22:41 ` ✗ CI.checkpatch: warning for Support run ticks for multi-queue use case (rev4) Patchwork
2026-05-06 22:42 ` ✓ CI.KUnit: success " Patchwork
2026-05-06 23:44 ` ✓ Xe.CI.BAT: " Patchwork
2026-05-07 0:44 ` ✗ Xe.CI.FULL: failure " Patchwork
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