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Fri, 2 Feb 2024 07:30:36 -0500 (EST) From: Jiaxun Yang Date: Fri, 02 Feb 2024 12:30:27 +0000 Subject: [PATCH v2 2/3] MIPS: Clear Cause.BD in instruction_pointer_set Precedence: bulk X-Mailing-List: linux-arch@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240202-exception_ip-v2-2-e6894d5ce705@flygoat.com> References: <20240202-exception_ip-v2-0-e6894d5ce705@flygoat.com> In-Reply-To: <20240202-exception_ip-v2-0-e6894d5ce705@flygoat.com> To: Oleg Nesterov , Thomas Bogendoerfer , Andrew Morton , Ben Hutchings Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, linux-mm@kvack.org, Jiaxun Yang X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=860; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=eEckd5oJQ3BVb3TI50bExWCbMqs/5XPSjzMz9OXoNmg=; b=owGbwMvMwCXmXMhTe71c8zDjabUkhtQ9D9KbxBb5s2avMMxZk/Fa1OTF/ICgHV78MjaFTJtvf f35OXBNRykLgxgXg6yYIkuIgFLfhsaLC64/yPoDM4eVCWQIAxenAEzE9Dsjwz6v/vdH3Fze1/99 FOW6+OMuxxvHUq8msNTf6zrBPE9PsIThr3h4jgr7uXVaRkt3sXl2P3nPWfRUcFd+muzkppu3Vhz /zQAA X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 Clear Cause.BD after we use instruction_pointer_set to override EPC. This can prevent exception_epc check against instruction code at new return address. It won't be considered as "in delay slot" after epc being overridden anyway. Signed-off-by: Jiaxun Yang --- arch/mips/include/asm/ptrace.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h index 701a233583c2..d14d0e37ad02 100644 --- a/arch/mips/include/asm/ptrace.h +++ b/arch/mips/include/asm/ptrace.h @@ -60,6 +60,7 @@ static inline void instruction_pointer_set(struct pt_regs *regs, unsigned long val) { regs->cp0_epc = val; + regs->cp0_cause &= ~CAUSEF_BD; } /* Query offset/name of register from its name/offset */ -- 2.43.0