From: Andi Shyti <andi.shyti@kernel.org>
To: Tudor Ambarus <tudor.ambarus@linaro.org>
Cc: broonie@kernel.org, arnd@arndb.de, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
alim.akhtar@samsung.com, linux-spi@vger.kernel.org,
linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-arch@vger.kernel.org,
andre.draszik@linaro.org, peter.griffin@linaro.org,
semen.protsenko@linaro.org, kernel-team@android.com,
willmcvicker@google.com
Subject: Re: [PATCH 07/21] spi: s3c64xx: use bitfield access macros
Date: Thu, 25 Jan 2024 23:50:27 +0100 [thread overview]
Message-ID: <ri7gerw4ov4jnmmkhtumhhtgfgxtr6kpsopdxjlx6fylbqznna@3qgvejyhjirw> (raw)
In-Reply-To: <20240123153421.715951-8-tudor.ambarus@linaro.org>
Hi Tudor,
On Tue, Jan 23, 2024 at 03:34:06PM +0000, Tudor Ambarus wrote:
> Use the bitfield access macros in order to clean and to make the driver
> easier to read.
most of the changes done here are allignment. I would mention it
in the log.
> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
> ---
...
> -#define S3C64XX_SPI_CLKSEL_SRCMSK (3<<9)
> -#define S3C64XX_SPI_CLKSEL_SRCSHFT 9
> -#define S3C64XX_SPI_ENCLK_ENABLE (1<<8)
> -#define S3C64XX_SPI_PSR_MASK 0xff
> -
> -#define S3C64XX_SPI_MODE_CH_TSZ_BYTE (0<<29)
> -#define S3C64XX_SPI_MODE_CH_TSZ_HALFWORD (1<<29)
> -#define S3C64XX_SPI_MODE_CH_TSZ_WORD (2<<29)
> -#define S3C64XX_SPI_MODE_CH_TSZ_MASK (3<<29)
> -#define S3C64XX_SPI_MODE_BUS_TSZ_BYTE (0<<17)
> -#define S3C64XX_SPI_MODE_BUS_TSZ_HALFWORD (1<<17)
> -#define S3C64XX_SPI_MODE_BUS_TSZ_WORD (2<<17)
> -#define S3C64XX_SPI_MODE_BUS_TSZ_MASK (3<<17)
> +#define S3C64XX_SPI_CH_CFG 0x00
> +#define S3C64XX_SPI_CLK_CFG 0x04
> +#define S3C64XX_SPI_MODE_CFG 0x08
> +#define S3C64XX_SPI_CS_REG 0x0C
> +#define S3C64XX_SPI_INT_EN 0x10
> +#define S3C64XX_SPI_STATUS 0x14
> +#define S3C64XX_SPI_TX_DATA 0x18
> +#define S3C64XX_SPI_RX_DATA 0x1C
> +#define S3C64XX_SPI_PACKET_CNT 0x20
> +#define S3C64XX_SPI_PENDING_CLR 0x24
> +#define S3C64XX_SPI_SWAP_CFG 0x28
> +#define S3C64XX_SPI_FB_CLK 0x2C
> +
> +#define S3C64XX_SPI_CH_HS_EN BIT(6) /* High Speed Enable */
> +#define S3C64XX_SPI_CH_SW_RST BIT(5)
> +#define S3C64XX_SPI_CH_SLAVE BIT(4)
> +#define S3C64XX_SPI_CPOL_L BIT(3)
> +#define S3C64XX_SPI_CPHA_B BIT(2)
> +#define S3C64XX_SPI_CH_RXCH_ON BIT(1)
> +#define S3C64XX_SPI_CH_TXCH_ON BIT(0)
> +
> +#define S3C64XX_SPI_CLKSEL_SRCMSK GENMASK(10, 9)
> +#define S3C64XX_SPI_ENCLK_ENABLE BIT(8)
> +#define S3C64XX_SPI_PSR_MASK GENMASK(15, 0)
I find it easier as 0xff to be honest, but I'm not going to be
picky.
> +
> +#define S3C64XX_SPI_MODE_CH_TSZ_MASK GENMASK(30, 29)
> +#define S3C64XX_SPI_MODE_CH_TSZ_BYTE 0
> +#define S3C64XX_SPI_MODE_CH_TSZ_HALFWORD 1
> +#define S3C64XX_SPI_MODE_CH_TSZ_WORD 2
I personally find this pattern harder to read. Perhaps you can
already define these as FIELD_PREP here.
> +#define S3C64XX_SPI_MAX_TRAILCNT_MASK GENMASK(28, 19)
> +#define S3C64XX_SPI_MODE_BUS_TSZ_MASK GENMASK(18, 17)
...
> -#define S3C64XX_SPI_FBCLK_MSK (3<<0)
> +#define S3C64XX_SPI_FBCLK_MASK GENMASK(1, 0)
0x3 to me is more understandable than (3<<0) and GENMASK(1, 0).
Bit operation defines should be used when they really simplify
the reading. But when they make it more difficult, then, I don't
see the point.
Overall looks good, though.
Andi
next prev parent reply other threads:[~2024-01-25 22:50 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-23 15:33 [PATCH 00/21] spi: s3c64xx: winter cleanup and gs101 support Tudor Ambarus
2024-01-23 15:34 ` [PATCH 01/21] spi: dt-bindings: samsung: add google,gs101-spi compatible Tudor Ambarus
2024-01-23 19:05 ` Sam Protsenko
2024-01-23 21:29 ` Krzysztof Kozlowski
2024-01-23 22:00 ` Andi Shyti
2024-01-23 15:34 ` [PATCH 02/21] spi: s3c64xx: sort headers alphabetically Tudor Ambarus
2024-01-23 22:01 ` Andi Shyti
2024-01-23 15:34 ` [PATCH 03/21] spi: s3c64xx: remove extra blank line Tudor Ambarus
2024-01-23 19:06 ` Sam Protsenko
2024-01-23 22:02 ` Andi Shyti
2024-01-23 15:34 ` [PATCH 04/21] spi: s3c64xx: remove unneeded (void *) casts in of_match_table Tudor Ambarus
2024-01-23 22:25 ` Andi Shyti
2024-01-23 15:34 ` [PATCH 05/21] spi: s3c64xx: explicitly include <linux/bits.h> Tudor Ambarus
2024-01-23 22:28 ` Andi Shyti
2024-01-23 22:42 ` Mark Brown
2024-01-23 15:34 ` [PATCH 06/21] spi: s3c64xx: remove else after return Tudor Ambarus
2024-01-23 19:12 ` Sam Protsenko
2024-01-23 22:30 ` Andi Shyti
2024-01-23 15:34 ` [PATCH 07/21] spi: s3c64xx: use bitfield access macros Tudor Ambarus
2024-01-25 22:50 ` Andi Shyti [this message]
2024-01-23 15:34 ` [PATCH 08/21] spi: s3c64xx: move error check up to avoid rechecking Tudor Ambarus
2024-01-24 9:21 ` André Draszik
2024-01-24 9:32 ` Tudor Ambarus
2024-01-23 15:34 ` [PATCH 09/21] spi: s3c64xx: use full mask for {RX, TX}_FIFO_LVL Tudor Ambarus
2024-01-23 15:34 ` [PATCH 10/21] spi: s3c64xx: move common code outside if else Tudor Ambarus
2024-01-23 15:34 ` [PATCH 11/21] spi: s3c64xx: check return code of dmaengine_slave_config() Tudor Ambarus
2024-01-23 15:34 ` [PATCH 12/21] spi: s3c64xx: propagate the dma_submit_error() error code Tudor Ambarus
2024-01-23 15:34 ` [PATCH 13/21] spi: s3c64xx: rename prepare_dma() to s3c64xx_prepare_dma() Tudor Ambarus
2024-01-23 15:34 ` [PATCH 14/21] spi: s3c64xx: return ETIMEDOUT for wait_for_completion_timeout() Tudor Ambarus
2024-01-23 15:34 ` [PATCH 15/21] spi: s3c64xx: simplify s3c64xx_wait_for_pio() Tudor Ambarus
2024-01-23 15:34 ` [PATCH 16/21] spi: s3c64xx: add missing blank line after declaration Tudor Ambarus
2024-01-23 19:28 ` Sam Protsenko
2024-01-24 9:54 ` Tudor Ambarus
2024-01-24 19:49 ` Sam Protsenko
2024-01-23 15:34 ` [PATCH 17/21] spi: s3c64xx: downgrade dev_warn to dev_dbg for optional dt props Tudor Ambarus
2024-01-23 15:34 ` [PATCH 18/21] asm-generic/io.h: add iowrite{8,16}_32 accessors Tudor Ambarus
2024-01-23 15:34 ` [PATCH 19/21] spi: s3c64xx: add support for google,gs101-spi Tudor Ambarus
2024-01-23 19:25 ` Sam Protsenko
2024-01-24 10:40 ` Tudor Ambarus
2024-01-24 19:43 ` Sam Protsenko
2024-01-25 13:32 ` Mark Brown
2024-01-23 15:34 ` [PATCH 20/21] spi: s3c64xx: make the SPI alias optional for newer SoCs Tudor Ambarus
2024-01-23 15:34 ` [PATCH 21/21] MAINTAINERS: add Tudor Ambarus as R for the samsung SPI driver Tudor Ambarus
2024-01-23 19:00 ` Sam Protsenko
2024-01-23 19:00 ` [PATCH 00/21] spi: s3c64xx: winter cleanup and gs101 support Mark Brown
2024-01-24 5:01 ` Tudor Ambarus
2024-01-25 22:25 ` Andi Shyti
2024-01-25 22:34 ` Sam Protsenko
2024-01-23 19:04 ` Sam Protsenko
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