From: Shengjiu Wang <shengjiu.wang@nxp.com>
To: abelvesa@kernel.org, peng.fan@nxp.com, mturquette@baylibre.com,
sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de,
kernel@pengutronix.de, festevam@gmail.com, marex@denx.de,
imx@lists.linux.dev, shengjiu.wang@gmail.com
Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: [PATCH v2 3/4] clk: imx: clk-audiomix: Add CLK_SET_RATE_PARENT flags for clocks
Date: Thu, 9 May 2024 09:43:57 +0800 [thread overview]
Message-ID: <1715219038-32453-4-git-send-email-shengjiu.wang@nxp.com> (raw)
In-Reply-To: <1715219038-32453-1-git-send-email-shengjiu.wang@nxp.com>
Add CLK_SET_RATE_PARENT flags that when the device driver sets the
child clock rate, parent clock frequency can be refined accordingly.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
---
drivers/clk/imx/clk-imx8mp-audiomix.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8mp-audiomix.c b/drivers/clk/imx/clk-imx8mp-audiomix.c
index e84365cef71b..6ed44cd5001b 100644
--- a/drivers/clk/imx/clk-imx8mp-audiomix.c
+++ b/drivers/clk/imx/clk-imx8mp-audiomix.c
@@ -347,12 +347,12 @@ static int clk_imx8mp_audiomix_probe(struct platform_device *pdev)
for (i = 0; i < ARRAY_SIZE(sels); i++) {
if (sels[i].num_parents == 1) {
hw = devm_clk_hw_register_gate_parent_data(dev,
- sels[i].name, &sels[i].parent, 0,
+ sels[i].name, &sels[i].parent, CLK_SET_RATE_PARENT,
base + sels[i].reg, sels[i].shift, 0, NULL);
} else {
hw = devm_clk_hw_register_mux_parent_data_table(dev,
sels[i].name, sels[i].parents,
- sels[i].num_parents, 0,
+ sels[i].num_parents, CLK_SET_RATE_PARENT,
base + sels[i].reg,
sels[i].shift, sels[i].width,
0, NULL, NULL);
@@ -395,7 +395,8 @@ static int clk_imx8mp_audiomix_probe(struct platform_device *pdev)
clk_hw_data->hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_BYPASS] = hw;
hw = devm_clk_hw_register_gate(dev, "sai_pll_out", "sai_pll_bypass",
- 0, base + SAI_PLL_GNRL_CTL, 13,
+ CLK_SET_RATE_PARENT,
+ base + SAI_PLL_GNRL_CTL, 13,
0, NULL);
if (IS_ERR(hw)) {
ret = PTR_ERR(hw);
@@ -404,7 +405,8 @@ static int clk_imx8mp_audiomix_probe(struct platform_device *pdev)
clk_hw_data->hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_OUT] = hw;
hw = devm_clk_hw_register_fixed_factor(dev, "sai_pll_out_div2",
- "sai_pll_out", 0, 1, 2);
+ "sai_pll_out",
+ CLK_SET_RATE_PARENT, 1, 2);
if (IS_ERR(hw)) {
ret = PTR_ERR(hw);
goto err_clk_register;
--
2.34.1
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next prev parent reply other threads:[~2024-05-09 2:03 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-09 1:43 [PATCH v2 0/4] clk: imx: clk-audiomix: Improvement for audiomix Shengjiu Wang
2024-05-09 1:43 ` [PATCH v2 1/4] dt-bindings: clock: imx8mp: Add #reset-cells property Shengjiu Wang
2024-05-09 7:01 ` Krzysztof Kozlowski
2024-05-09 1:43 ` [PATCH v2 2/4] clk: imx: clk-audiomix: Add reset controller Shengjiu Wang
2024-05-09 22:04 ` Stephen Boyd
2024-05-10 4:02 ` Shengjiu Wang
2024-05-14 7:22 ` Shengjiu Wang
2024-05-09 1:43 ` Shengjiu Wang [this message]
2024-05-09 1:43 ` [PATCH v2 4/4] clk: imx: clk-audiomix: Corrent parent clock for earc_phy and audpll Shengjiu Wang
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