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From: Nicolin Chen <nicolinc@nvidia.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: <will@kernel.org>, <robin.murphy@arm.com>, <joro@8bytes.org>,
	<thierry.reding@gmail.com>, <vdumpa@nvidia.com>,
	<jonathanh@nvidia.com>, <linux-kernel@vger.kernel.org>,
	<iommu@lists.linux.dev>, <linux-arm-kernel@lists.infradead.org>,
	<linux-tegra@vger.kernel.org>
Subject: Re: [PATCH v7 5/6] iommu/arm-smmu-v3: Add in-kernel support for NVIDIA Tegra241 (Grace) CMDQV
Date: Sun, 12 May 2024 14:00:59 -0700	[thread overview]
Message-ID: <ZkEuC+EN1BzGzSg6@nvidia.com> (raw)
In-Reply-To: <ZkDmSe5XPTbMb+q2@nvidia.com>

On Sun, May 12, 2024 at 12:54:49PM -0300, Jason Gunthorpe wrote:
> On Tue, May 07, 2024 at 10:56:53PM -0700, Nicolin Chen wrote:
> > +#define vcmdq_page1_readl(_vcmdq, reg) \
> > +	readl((_vcmdq)->page1 + TEGRA241_VCMDQ_##reg)
> > +#define vcmdq_page1_readl_relaxed(_vcmdq, reg) \
> > +	readl_relaxed((_vcmdq)->page1 + TEGRA241_VCMDQ_##reg)
> > +#define vcmdq_page1_readq_relaxed(_vcmdq, reg) \
> > +	readq_relaxed((_vcmdq)->page1 + TEGRA241_VCMDQ_##reg)
> > +#define vcmdq_page1_writel(_vcmdq, val, reg) \
> > +	writel((val), (_vcmdq)->page1 + TEGRA241_VCMDQ_##reg)
> > +#define vcmdq_page1_writel_relaxed(_vcmdq, val, reg) \
> > +	writel_relaxed((val), (_vcmdq)->page1 + TEGRA241_VCMDQ_##reg)
> > +#define vcmdq_page1_writeq(_vcmdq, val, reg) \
> > +	writeq((val), (_vcmdq)->page1 + TEGRA241_VCMDQ_##reg)
> > +#define vcmdq_page1_writeq_relaxed(_vcmdq, val, reg) \
> > +	writeq_relaxed((val), (_vcmdq)->page1 + TEGRA241_VCMDQ_##reg)
> 
> These still need to be trimmed to only the ones being used. I still
> think it is a bad idea, maybe a middle ground is to wrapper the
> regsiter coding
> 
> writeq_relaxed(val, REG_CMDQ_PAGE1(vcmdq, XXX));
> 
> Is still short enough and safe enough without creating so much obfuscation..

I think that is a much better practice! Let me try with it.

Thanks!
Nicolin

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  reply	other threads:[~2024-05-12 21:01 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-08  5:56 [PATCH v7 0/6] Add Tegra241 (Grace) CMDQV Support (part 1/2) Nicolin Chen
2024-05-08  5:56 ` [PATCH v7 1/6] iommu/arm-smmu-v3: Make symbols public for CONFIG_TEGRA241_CMDQV Nicolin Chen
2024-05-08  5:56 ` [PATCH v7 2/6] iommu/arm-smmu-v3: Issue a batch of commands to the same cmdq Nicolin Chen
2024-05-12 15:34   ` Jason Gunthorpe
2024-05-08  5:56 ` [PATCH v7 3/6] iommu/arm-smmu-v3: Enforce arm_smmu_cmdq_build_sync_cmd Nicolin Chen
2024-05-12 15:39   ` Jason Gunthorpe
2024-05-12 20:56     ` Nicolin Chen
2024-05-08  5:56 ` [PATCH v7 4/6] iommu/arm-smmu-v3: Add CS_NONE quirk for CONFIG_TEGRA241_CMDQV Nicolin Chen
2024-05-08  5:56 ` [PATCH v7 5/6] iommu/arm-smmu-v3: Add in-kernel support for NVIDIA Tegra241 (Grace) CMDQV Nicolin Chen
2024-05-12 15:54   ` Jason Gunthorpe
2024-05-12 21:00     ` Nicolin Chen [this message]
2024-05-08  5:56 ` [PATCH v7 6/6] iommu/tegra241-cmdqv: Limit CMDs for guest owned VINTF Nicolin Chen
2024-05-12 16:06   ` Jason Gunthorpe
2024-05-12 22:09     ` Nicolin Chen
2024-05-14 15:15       ` Jason Gunthorpe
2024-05-14 22:20         ` Nicolin Chen

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