From: Brian Raiter <breadbox@muppetlabs.com>
To: linux-assembly@vger.kernel.org
Subject: Re: Question regarding EIP instruction pointer
Date: Fri, 30 Mar 2007 09:55:52 -0800 [thread overview]
Message-ID: <17933.20264.343127.500858@eidolon.muppetlabs.com> (raw)
In-Reply-To: <BAY133-F35089BE38C90DC5E52C15CF5630@phx.gbl>
> I know that EIP register is the instruction pointer. But how does it
> know how many bytes it needs to increment to the next instruction?
It doesn't "know", per se. The processor simply decodes the current
instruction. As the instruction is unpacked, it fetches bytes from
memory as they are called for. When it's done, the EIP register will
be pointing at the next instruction.
Of course, the above description is only notional. With the highly
parallel processing that goes on in the Pentium family of processors,
there is special circuitry whose job it is to pull instructions out of
memory ahead of time and prepare them for decoding. This circuitry
knows just enough about each instruction to work out how long it is.
b
next prev parent reply other threads:[~2007-03-30 17:55 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-03-30 13:38 Question regarding EIP instruction pointer A D
2007-03-30 13:58 ` leslie.polzer
2007-03-30 14:29 ` A D
2007-03-30 16:14 ` Robert Plantz
2007-03-30 17:55 ` Brian Raiter [this message]
[not found] <873AB473-8332-49C7-9612-FF6357FCD5CD@ticino.com>
2007-03-31 3:24 ` A D
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