From: Stephen Boyd <sboyd@kernel.org>
To: Michael Turquette <mturquette@baylibre.com>,
Yang Xiwen <forbidden405@outlook.com>,
Yang Xiwen via B4 Relay
<devnull+forbidden405.outlook.com@kernel.org>
Cc: David Yang <mmyangfl@gmail.com>,
Igor Opaniuk <igor.opaniuk@foundries.io>,
Jorge Ramirez-Ortiz Gmail <jorge.ramirez.ortiz@gmail.com>,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH RFC 1/2] clk: hisilicon: rename hi3519 PLL registration function
Date: Thu, 11 Apr 2024 20:03:04 -0700 [thread overview]
Message-ID: <15b31289dfafa2516e524aadcb02a6af.sboyd@kernel.org> (raw)
In-Reply-To: <SEZPR06MB69596A0104AA2385391049EA96052@SEZPR06MB6959.apcprd06.prod.outlook.com>
Quoting Yang Xiwen (2024-04-11 03:31:58)
> On 4/11/2024 3:53 PM, Stephen Boyd wrote:
> > Quoting Yang Xiwen (2024-04-11 00:44:33)
> >> On 4/11/2024 2:52 PM, Stephen Boyd wrote:
> >>> Quoting Yang Xiwen via B4 Relay (2024-02-24 08:56:09)
> >>>> diff --git a/drivers/clk/hisilicon/clk-hi3559a.c b/drivers/clk/hisilicon/clk-hi3559a.c
> >>>> index ff4ca0edce06..77fa4203a428 100644
> >>>> --- a/drivers/clk/hisilicon/clk-hi3559a.c
> >>>> +++ b/drivers/clk/hisilicon/clk-hi3559a.c
> >>>> @@ -452,7 +452,7 @@ static const struct clk_ops hisi_clk_pll_ops = {
> >>>> .recalc_rate = clk_pll_recalc_rate,
> >>>> };
> >>>>
> >>>> -static void hisi_clk_register_pll(struct hi3559av100_pll_clock *clks,
> >>>> +static void _hisi_clk_register_pll(struct hi3559av100_pll_clock *clks,
> >>> Prefix it with hi3559a then to be SoC specific please. But this is also
> >>> static so I'm not sure why this patch is needed at all.
> >>
> >> it includes the header that marks this function non-static. Also the
> >> prototype is incompatible.
> > What is 'it'?
>
>
> The line 18 `#include "clk.h"`, and please see patch 2.
>
>
> Patch 2 added 2 functions to "clk.h", one of them reused the
> `hisi_clk_register_pll` name with a different prototype.
>
>
> >
> > $ git grep hisi_clk_register_pll
> > drivers/clk/hisilicon/clk-hi3559a.c:static void hisi_clk_register_pll(struct hi3559av100_pll_clock *clks,
> > drivers/clk/hisilicon/clk-hi3559a.c: hisi_clk_register_pll(hi3559av100_pll_clks,
>
>
> a snippet copied from patch 2:
>
>
> +int hisi_clk_register_pll(struct device *dev, const struct hisi_pll_clock *clks,
> + int nums, struct hisi_clock_data *data);
>
>
Ok, got it. Prefix the existing hisi_clk_register_pll() as
hi3559a_clk_register_pll().
next prev parent reply other threads:[~2024-04-12 3:03 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-24 16:56 [PATCH RFC 0/2] clk: hisilicon: add support for PLL Yang Xiwen via B4 Relay
2024-02-24 16:56 ` [PATCH RFC 1/2] clk: hisilicon: rename hi3519 PLL registration function Yang Xiwen via B4 Relay
2024-04-11 6:52 ` Stephen Boyd
2024-04-11 7:44 ` Yang Xiwen
2024-04-11 7:53 ` Stephen Boyd
2024-04-11 10:31 ` Yang Xiwen
2024-04-12 3:03 ` Stephen Boyd [this message]
2024-02-24 16:56 ` [PATCH RFC 2/2] clk: hisilicon: add support for PLL Yang Xiwen via B4 Relay
2024-04-11 6:59 ` Stephen Boyd
2024-04-11 7:54 ` Yang Xiwen
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