From: Michael Opdenacker <michael.opdenacker@bootlin.com>
To: Inochi Amaoto <inochiama@outlook.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Chao Wei <chao.wei@sophgo.com>,
Chen Wang <unicorn_wang@outlook.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>
Cc: michael.opdenacker@bootlin.com,
Jisheng Zhang <jszhang@kernel.org>,
Liu Gui <kenneth.liu@sophgo.com>,
Jingbao Qiu <qiujingbao.dlmu@gmail.com>,
dlan@gentoo.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org
Subject: Re: (subset) [PATCH v9 0/6] riscv: sophgo: add clock support for Sophgo CV1800/SG2000 SoCs
Date: Mon, 15 Apr 2024 09:44:32 +0200 [thread overview]
Message-ID: <16df0d66-991a-4d9c-9321-b139555a5e64@bootlin.com> (raw)
In-Reply-To: <IA1PR20MB495304E9A53F0893C821DD78BB0A2@IA1PR20MB4953.namprd20.prod.outlook.com>
Hi Inochi
On 4/14/24 at 11:41, Inochi Amaoto wrote:
>> Gotcha for the CONFIG_CLK_SOPHGO_CV1800 setting. However, I'm confused. Why
>> is this setting available in linux-next, but neither in
>> git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git ("master" and
>> "for-next") nor in github.com/sophgo/linux.git ("master" and "for-next") ?
> At now, we only maintain the dts related change, but not the driver
> code. The driver code is usually applied by the subsystem maintainer.
> This is why you only see the clk changes in the linux-next.
>
>> What's the tree used to push to linux-next?
>>
> As you see, the driver code applied to the clk/for-next. That is the
> tree used to push.
It makes perfect sense, thanks!
So, I tried to boot my Milk-V Duo S board with the latest linux-next
kernel (with CONFIG_CLK_SOPHGO_CV1800=y). Here's what I'm getting:
[ 1.933301] mmc0: SDHCI controller on 4310000.mmc [4310000.mmc] using ADMA 64-bit
[ 1.947274] Legacy PMU implementation is available
[ 1.954001] clk: Disabling unused clocks
[ 1.959283] PM: genpd: Disabling unused power domains
[ 1.964840] ALSA device list:
[ 1.968165] No soundcards found.
[ 1.975652] dw-apb-uart 4140000.serial: forbid DMA for kernel console
[ 2.133075] mmc0: Internal clock never stabilised.
[ 2.138256] mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
[ 2.145082] mmc0: sdhci: Sys addr: 0x00000000 | Version: 0x00000000
[ 2.151906] mmc0: sdhci: Blk size: 0x00000000 | Blk cnt: 0x00000000
[ 2.158725] mmc0: sdhci: Argument: 0x00000000 | Trn mode: 0x00000000
[ 2.165543] mmc0: sdhci: Present: 0x00000000 | Host ctl: 0x00000000
[ 2.172362] mmc0: sdhci: Power: 0x00000000 | Blk gap: 0x00000000
[ 2.179220] mmc0: sdhci: Wake-up: 0x00000000 | Clock: 0x00000000
[ 2.186056] mmc0: sdhci: Timeout: 0x00000000 | Int stat: 0x00000000
[ 2.192878] mmc0: sdhci: Int enab: 0x00000000 | Sig enab: 0x00000000
[ 2.199699] mmc0: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00000000
[ 2.206520] mmc0: sdhci: Caps: 0x00000000 | Caps_1: 0x00000000
[ 2.213342] mmc0: sdhci: Cmd: 0x00000000 | Max curr: 0x00000000
[ 2.220162] mmc0: sdhci: Resp[0]: 0x00000000 | Resp[1]: 0x00000000
[ 2.226983] mmc0: sdhci: Resp[2]: 0x00000000 | Resp[3]: 0x00000000
[ 2.233798] mmc0: sdhci: Host ctl2: 0x00000000
[ 2.238558] mmc0: sdhci: ADMA Err: 0x00000000 | ADMA Ptr: 0x0000000000000000
[ 2.246189] mmc0: sdhci: ============================================
[ 2.256290] /dev/root: Can't open blockdev
[ 2.261025] VFS: Cannot open root device "/dev/mmcblk0p2" or unknown-block(0,0): error -6
Here's my device tree (compiled with the sophgo for-next) branch:
/dts-v1/;
#include "cv1812h.dtsi"
/ {
model = "Milk-V Duo S";
compatible = "milkv,duos", "sophgo,cv1812h";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x20000000>;
};
};
&osc {
clock-frequency = <25000000>;
};
&sdhci0 {
status = "okay";
bus-width = <4>;
no-mmc;
no-sdio;
disable-wp;
};
&uart0 {
status = "okay";
};
What's frustrating is that I got the mmc working a few days back :-)
Hoping this helps...
Cheers
Michael.
--
Michael Opdenacker, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
prev parent reply other threads:[~2024-04-15 7:44 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-09 9:01 [PATCH v9 0/6] riscv: sophgo: add clock support for Sophgo CV1800/SG2000 SoCs Inochi Amaoto
2024-03-09 9:02 ` [PATCH v9 1/6] dt-bindings: clock: sophgo: Add clock controller of SG2000 series SoC Inochi Amaoto
2024-04-11 7:07 ` Stephen Boyd
2024-03-09 9:02 ` [PATCH v9 2/6] clk: sophgo: Add clock support for CV1800 SoC Inochi Amaoto
2024-04-11 7:07 ` Stephen Boyd
2024-03-09 9:02 ` [PATCH v9 3/6] clk: sophgo: Add clock support for CV1810 SoC Inochi Amaoto
2024-04-11 7:07 ` Stephen Boyd
2024-03-09 9:02 ` [PATCH v9 4/6] clk: sophgo: Add clock support for SG2000 SoC Inochi Amaoto
2024-04-11 7:07 ` Stephen Boyd
2024-03-09 9:02 ` [PATCH v9 5/6] riscv: dts: sophgo: add clock generator for Sophgo CV1800 series SoC Inochi Amaoto
2024-03-09 9:02 ` [PATCH v9 6/6] riscv: dts: sophgo: add uart clock " Inochi Amaoto
2024-03-15 6:19 ` [PATCH v9 0/6] riscv: sophgo: add clock support for Sophgo CV1800/SG2000 SoCs Inochi Amaoto
2024-04-11 7:38 ` (subset) " Inochi Amaoto
2024-04-14 5:56 ` Michael Opdenacker
2024-04-14 6:41 ` Inochi Amaoto
2024-04-14 6:43 ` Inochi Amaoto
2024-04-14 9:11 ` Michael Opdenacker
2024-04-14 9:41 ` Inochi Amaoto
2024-04-15 7:44 ` Michael Opdenacker [this message]
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