From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Marc Gonzalez <mgonzalez@freebox.fr>,
Bjorn Andersson <andersson@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>
Cc: MSM <linux-arm-msm@vger.kernel.org>,
linux-clk <linux-clk@vger.kernel.org>,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
Bryan O Donoghue <bryan.odonoghue@linaro.org>,
Vikash Garodia <quic_vgarodia@quicinc.com>,
Jeffrey Hugo <quic_jhugo@quicinc.com>,
Douglas Anderson <dianders@chromium.org>,
Pierre-Hugues Husson <phhusson@freebox.fr>,
Arnaud Vrac <avrac@freebox.fr>
Subject: Re: [PATCH v2] clk: qcom: mmcc-msm8998: fix venus clock issue
Date: Sat, 27 Apr 2024 02:47:58 +0200 [thread overview]
Message-ID: <2f4eaba9-9e82-48e2-bb17-4e09e947a700@linaro.org> (raw)
In-Reply-To: <2394efa5-713a-421d-84cf-f6c1b2ad26ac@freebox.fr>
On 25.04.2024 1:25 PM, Marc Gonzalez wrote:
> On 15/04/2024 21:56, Konrad Dybcio wrote:
>
>> On 4/10/24 13:13, Marc Gonzalez wrote:
>>
>>> Video decoder (venus) was broken on msm8998.
>>>
>>> PH found crude work-around:
>>> Drop venus_sys_set_power_control() call.
>>>
>>> Bryan suggested proper fix:
>>> Set required register offsets in venus GDSC structs.
>>> Set HW_CTRL flag.
>>>
>>> GDSC = Globally Distributed Switch Controller
>>>
>>> Use same code as mmcc-msm8996 with:
>>> s/venus_gdsc/video_top_gdsc/
>>> s/venus_core0_gdsc/video_subcore0_gdsc/
>>> s/venus_core1_gdsc/video_subcore1_gdsc/
>>>
>>> https://git.codelinaro.org/clo/la/kernel/msm-4.4/-/blob/caf_migration/kernel.lnx.4.4.r38-rel/include/dt-bindings/clock/msm-clocks-hwio-8996.h
>>> https://git.codelinaro.org/clo/la/kernel/msm-4.4/-/blob/caf_migration/kernel.lnx.4.4.r38-rel/include/dt-bindings/clock/msm-clocks-hwio-8998.h
>>>
>>> 0x1024 = MMSS_VIDEO GDSCR (undocumented)
>>> 0x1028 = MMSS_VIDEO_CORE_CBCR
>>> 0x1030 = MMSS_VIDEO_AHB_CBCR
>>> 0x1034 = MMSS_VIDEO_AXI_CBCR
>>> 0x1038 = MMSS_VIDEO_MAXI_CBCR
>>> 0x1040 = MMSS_VIDEO_SUBCORE0 GDSCR (undocumented)
>>> 0x1044 = MMSS_VIDEO_SUBCORE1 GDSCR (undocumented)
>>> 0x1048 = MMSS_VIDEO_SUBCORE0_CBCR
>>> 0x104c = MMSS_VIDEO_SUBCORE1_CBCR
>>>
>>> Suggested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
>>> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
>>> Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr>
>>> ---
>>
>> [...]
>>
>>
>>> static struct gdsc video_top_gdsc = {
>>> .gdscr = 0x1024,
>>> + .cxcs = (unsigned int []){ 0x1028, 0x1034, 0x1038 },
>>> + .cxc_count = 3,
>>
>> Marc, have you verified all three are necessary for stuff to work?
>>
>> I'd expect 0x1028/venus core to be absolutely necessary fwiw
>
> Considering the absence of public documentation, these register offsets
> mostly boil down to cargo-cult programming.
>
> Thus, using different code on 8996 and 8998 risks provoking the wrath
> of the embedded gods. Better, safer to cast the same incantations.
I don't think many maintainers believe in such embedded gods and would rather
see the thing tested and answered considering it's more or less deterministic..
Konrad
prev parent reply other threads:[~2024-04-27 0:48 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-10 11:13 [PATCH v2] clk: qcom: mmcc-msm8998: fix venus clock issue Marc Gonzalez
2024-04-11 3:07 ` Bjorn Andersson
2024-04-12 14:49 ` Jeffrey Hugo
2024-04-15 19:56 ` Konrad Dybcio
2024-04-25 11:25 ` Marc Gonzalez
2024-04-25 22:31 ` Bryan O'Donoghue
2024-04-27 0:47 ` Konrad Dybcio [this message]
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